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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
171

Harmonic rejection mixers for wideband receivers

Rafi, Aslamali Ahmed 31 October 2013 (has links)
This dissertation presents novel Harmonic Rejection (HR) Mixer architectures to obtain a high level of harmonic rejection. This is achieved by reducing the sensitivity to mismatches in devices operating at high frequencies. Consequently, the HR performance for this mixer architecture is primarily determined by resistor and capacitor matching at low intermediate frequencies (IF). Since large resistor areas can be used at relatively less power penalty in the low frequency IF section, superior HR performance is realized. A design fabricated in 110 nm CMOS process, rejects up to the fi rst 14 local oscillator (LO) harmonics and achieves 3rd, 5th and 7th HR ratios in excess of 52, 54 and 55 dB respectively, without any calibration or trimming. This mixer architecture also rejects flicker noise, has improved image rejection (IR) and second-order input-intercept-point (IIP2) performance. By using a clock N times the desired LO frequency, this scheme rejects the (N-1)th LO harmonic only by an amount of 20log(N-1) dB. A new technique is presented that enables better HR for the (N-1)th harmonic while preserving the level of rejection for other harmonics. This mixer fabricated in 55 nm standard CMOS process has a programmable number of 8, 10, 12 or 14 mixer phases and achieves an improvement of 29 dB for the (N-1)th harmonic while achieving 52 dB of rejection for the 3rd harmonic. It also rejects flicker noise and has an IIP2 performance of 68 dBm. The mixers presented in this dissertation set the state-of-the-art in HR performance for single-stage mixers with configurable number of phases without using any calibration or trimming. / text
172

Circuit techniques for programmable broadband radio receivers

Forbes, Travis Michael, 1986- 02 March 2015 (has links)
The functionality provided by mobile devices such as cellular phones and tablets continues to increase over the years, with integration of an ever larger number of wireless standards within a given device. In several of these designs, each standard supported by a device requires its own IC receiver to be mounted on the device’s PCB. In multistandard and multimode radios, it is desirable to integrate all receivers onto the same IC as the digital processors for the standards, in order to reduce device cost and size. Ideally all the receivers should also share a single signal chain. Since each standard has its own requirements for linearity and noise figure, and each standard operates at a different RF carrier frequency, implementing such a receiver is very challenging. Such a receiver could be theoretically implemented using a broadband mixing receiver or by direct sampling by a high-speed analog-to-digital converter (ADC). Broadband mixing requires the use of a harmonic rejection mixer (HRM) or tunable band pass filter to remove harmonic mixing effects, which in the past have suffered from a large primary clock tuning range and high power consumption. However, direct sampling of the RF input requires a high-speed ADC with large dynamic range which is typically limited by clock timing skew, clock jitter, or harmonic folding. In this dissertation, techniques for programmable broadband radio receivers are proposed. A local oscillator (LO) synthesis method within HRMs is proposed which reduces the required primary clock tuning range in broadband receivers. The LO synthesis method is implemented in 130-nm CMOS. A clocking technique is introduced within the two-stage HRM, which helps in achieving state-of-the-art harmonic rejection performance without calibration or harmonic filtering. An analog frequency synthesis based broadband channelizer is proposed using the LO synthesis method which is capable of channelizing a broadband input using a single mixing stage and primary clock frequency. A frequency-folded ADC architecture is proposed which enables high-speed sampling with high dynamic range. A receiver based on the frequency-folded ADC architecture is implemented in 65-nm CMOS and achieves a sample rate of 2-GS/s, a mean 49-dB SNDR, and 8.5-dB NF. / text
173

Automatic target recognition using passive bistatic radar signals.

Pisane, Jonathan 04 April 2013 (has links) (PDF)
We present the design, development, and test of three novel, distinct automatic target recognition (ATR) systems for the recognition of airplanes and, more specifically, non-cooperative airplanes, i.e. airplanes that do not provide information when interrogated, in the framework of passive bistatic radar systems. Passive bistatic radar systems use one or more illuminators of opportunity (already present in the field), with frequencies up to 1 GHz for the transmitter part of the systems considered here, and one or more receivers, deployed by the persons managing the system, and not co-located with the transmitters. The sole source of information are the signal scattered on the airplane and the direct-path signal that are collected by the receiver, some basic knowledge about the transmitter, and the geometrical bistatic radar configuration. The three distinct ATR systems that we built respectively use the radar images, the bistatic complex radar cross-section (BS-RCS), and the bistatic radar cross-section (BS-RCS) of the targets. We use data acquired either on scale models of airplanes placed in an anechoic, electromagnetic chamber or on real-size airplanes using a bistatic testbed consisting of a VOR transmitter and a software-defined radio (SDR) receiver, located near Orly airport, France. We describe the radar phenomenology pertinent for the problem at hand, as well as the mathematical underpinnings of the derivation of the bistatic RCS values and of the construction of the radar images.For the classification of the observed targets into pre-defined classes, we use either extremely randomized trees or subspace methods. A key feature of our approach is that we break the recognition problem into a set of sub-problems by decomposing the parameter space, which consists of the frequency, the polarization, the aspect angle, and the bistatic angle, into regions. We build one recognizer for each region. We first validate the extra-trees method on the radar images of the MSTAR dataset, featuring ground vehicles. We then test the method on the images of the airplanes constructed from data acquired in the anechoic chamber, achieving a probability of correct recognition up to 0.99.We test the subspace methods on the BS-CRCS and on the BS-RCS of the airplanes extracted from the data acquired in the anechoic chamber, achieving a probability of correct recognition up to 0.98, with variations according to the frequency band, the polarization, the sector of aspect angle, the sector of bistatic angle, and the number of (Tx,Rx) pairs used. The ATR system deployed in the field gives a probability of correct recognition of $0.82$, with variations according to the sector of aspect angle and the sector of bistatic angle.
174

Sidokanalattack mot knappsats för elektroniskt passersystem / Side-channel attack against electronic entry system keypad

Alasjö, Alexander January 2017 (has links)
Genom ett undersökande experiment med elektromagnetisk sidokanalattack mot en knappsats för ett kommersiellt passersystem påvisas att informationsläckage i sidokanaler är ett fortsatt aktuellt problem och hur det gör fysisk åtkomstkontroll sårbart genom avlyssning och kopiering av användaruppgifter. Med enkel radioutrustning kan knapptryckningar registreras och avkodas genom oönskad elektromagnetisk strålning och teoretiskt är det möjligt att genomföra avlyssningen på en längre distans med särskilt utformad antenn och anpassad mottagare. Rapporten diskuterar problematiken med emission security hos konsumentprodukter som i militära sammanhang benämns Tempest eller RÖS (röjande signaler) och kräver kostsamma tester för att detekteras och hanteras. I regelverk för EMC (elektromagnetisk kompatibilitet) behandlas elektriska apparaters och näts utstrålning och påverkan av elektromagnetiska vågor, men inte direkt hur information kan läcka från informationsteknologisk utrustning vilket denna rapport vill problematisera. / Through an exploratory experiment using electromagnetic side-channel attack against a keypad for a commercial entry system it is demonstrated that information leakage through side-channels are an ongoing issue and may make entry systems vulnerable by recording of user data. Using simple radio equipment, keypresses can be recorded and decoded by undesired electromagnetic radiation and theoretically it is possible to carry out the attack on a longer distance with a specially designed antenna and a custom recieiver. The report discusses emission security in consumer products which in military context is termed Tempest or compromising emanations (Swedish: RÖS) and requires expensive tests to be detected and handled. The EMC regulations (electromagnetic compatibility) handles radiation and influence of electromagnetic waves in electronic apparatus and nets, but not directly how information can leak from information technology equipment which this report wants to problematize.
175

Conception d’un crypto-système reconfigurable pour la radio logicielle sécurisée

Grand, Michaël 02 December 2011 (has links)
Les travaux de recherche détaillés dans ce document portent sur la conception et l’implantation d’un composant matériel jouant le rôle du sous-système cryptographique d’une radio logicielle sécurisée.A partir du début des années 90, les systèmes radios ont peu à peu évolué de la radio classique vers la radio logicielle. Le développement de la radio logicielle a permis l’intégration d’un nombre toujours plus grand de standards de communication sur une même plateforme matérielle. La réalisation concrète d’une radio logicielle sécurisée amène son concepteur à faire face à de nombreuses problématiques qui peuvent se résumer par la question suivante : Comment implanter un maximum de standards de communication sur une même plateforme matérielle et logicielle ? Ce document s’intéresse plus particulièrement à l’implantation des standards cryptographiques destinés à protéger les radiocommunications.Idéalement, la solution apportée à ce problème repose exclusivement sur l’utilisation de processeurs numériques. Cependant, les algorithmes cryptographiques nécessitent le plus souvent une puissance de calcul telle que leur implantation sous forme logicielle n’est pas envisageable. Il s’ensuit qu’une radio logicielle doit parfois intégrer des composants matériels dédiés dont l'utilisation entre en conflit avec la propriété de flexibilité propre aux radios logicielles.Or depuis quelques années, le développement de la technologie FPGA a changé la donne. En effet, les derniers FPGA embarquent un nombre de ressources logiques suffisant à l’implantation des fonctions numériques complexes utilisées par la radio logicielle. Plus précisément, la possibilité offerte par les FPGA d'être reconfiguré dans leur totalité (voir même partiellement pour les derniers d’entre eux) fait d’eux des candidats idéaux à l’implantation de composants matériels flexibles et évolutifs dans le temps. À la suite de ces constatations, des travaux de recherche ont été menés au sein de l’équipe Conception des Systèmes Numériques du Laboratoire IMS. Ces travaux ont d’abord débouché sur la publication d’une architecture de sous-système cryptographique pour la radio logicielle sécurisée telle qu’elle est définie par la Software Communication Architecture. Puis, ils se sont poursuivis par la conception et l’implantation d’un cryptoprocesseur multi-cœur dynamiquement reconfigurable sur FPGA. / The research detailed in this document deal with the design and implementation of a hardware integrated circuit intended to be used as a cryptographic sub-system in secure software defined radios.Since the early 90’s, radio systems have gradually evolved from traditional radio to software defined radio. Improvement of the software defined radio has enabled the integration of an increasing number of communication standards on a single radio device. The designer of a software defined radio faces many problems that can be summarized by the following question: How to implement a maximum of communication standards into a single radio device? Specifically, this work focuses on the implementation of cryptographic standards aimed to protect radio communications.Ideally, the solution to this problem is based exclusively on the use of digital processors. However, cryptographic algorithms usually require a large amount of computing power which makes their software implementation inefficient. Therefore, a secure software defined radio needs to incorporate dedicated hardware even if this usage is conflicting with the property of flexibility specific to software defined radios.Yet, in recent years, the improvement of FPGA circuits has changed the deal. Indeed, the latest FPGAs embed a number of logic gates which is sufficient to meet the needs of the complex digital functions used by software defined radios. The possibility offered by FPGAs to be reconfigured in their entirety (or even partially for the last of them) makes them ideal candidates for implementation of hardware components which have to be flexible and scalable over time.Following these observations, research was conducted within the Conception des Systèmes Numériques team of the IMS laboratory. These works led first to the publication of an architecture of cryptographic subsystem compliant with the security supplement of the Software Communication Architecture. Then, they continued with the design and implementation of a partially reconfigurable multi-core cryptoprocessor intended to be used in the latest FPGAs.
176

Fully Integrated CMOS Transmitter and Power Amplifier for Software-Defined Radios and Cognitive Radios

Raja, Immanuel January 2017 (has links) (PDF)
Software Defined Radios (SDRs) and Cognitive Radios (CRs) pave the way for next-generation radio technology. They promise versatility, flexibility and cognition which can revolutionize communications systems. However they present greater challenges to the design of radio frequency (RF) front-ends. RF front-ends for the radios in use today are narrow-band in their frequency response and are optimized and tuned to the carrier frequency of interest. SDRs and CRs demand front-ends which are versatile, configurable, tunable and be capable of transmitting and receiving signals with different bandwidths and modulation schemes. Integrating power amplifiers (PAs) with transmitters in CMOS has many advantages and challenges. This thesis deals with the design of an RF transmitter front-end for SDRs and CRs in CMOS. The thesis begins with an introduction to SDRs and the requirements they place on transmitters and the challenges involved in designing them in CMOS. After a brief overview of the existing techniques, the proposed architecture is presented and explained. A digitally intensive transmitter solution is proposed. The transmitter covers a wide frequency range of 750 MHz to 2.5 GHz. The inputs to the proposed transmitter are in-phase and quadrature (I & Q) data bit streams. Multiple stages of up-sampling and filtering are used to remove all spurs in the spectrum such that only the harmonics of the carrier remain. Differential rail-to-rail quadrature clocks are generated from a continuous wave signal at twice the carrier frequency. The clocks are corrected for their duty cycle and quadrature impairments. The heart of the transmitter is an integrated reconfigurable CMOS power amplifier (PA). A methodology to design reconfigurable Class E PAs with a series fixed inductor has been presented. A CMOS power amplifier that can span a wide frequency range with sufficient output power and efficiency, supporting varying envelope complex modulation signals, with good linearity has been designed. Digital pre-distortion (DPD) is used to linearize the PA. The full transmitter and the clock correction blocks have been designed and fabricated in a commercial 130-nm CMOS process and experimentally characterized. The PA delivers a maximum power of 13 dBm with an efficiency of 27% at 1 GHz. While transmitting a 16-QAM signal at 1 GHz, the measured EVM is 4%. It delivers a maximum power of around 11-13 dBm from 750 MHz to 1.5 GHz and up to 6.5 dBm of power till 2.5 GHz. Comparing the proposed system with recently published literature, it can be seen that the proposed design is one of the very few transmitters which has an integrated matching network, tunable across the frequency range. The proposed PA produces the highest output power and with largest efficiency for systems with on-chip output networks.
177

Software defined radio for cognitive wireless sensor networks : a reconfigurable IEEE 802.15.4 reconfigurable / Radio logicielle pour des réseaux de capteurs sans fil cognitifs : un standard IEEE 802.15.4 reconfigurable

Zitouni, Rafik 14 October 2015 (has links)
Le nombre croissant d'applications des Réseaux de Capteurs Sans Fils (RCSFs) a conduit les industriels à concevoir ces réseaux avec une couche Physique (PHY) suivant le standard IEEE 802.15.4. Actuellement, cette couche est implémentée en matériel souffrant d'un manque de flexibilité du changement des paramètres radio, telles que bandes de fréquences et modulations. Ce problème est accentué par la rareté du spectre radio fréquences. La Radio Logiciel (RL) est une nouvelle solution pour reconfigurer plus facilement ces paramètres. A partir d'une RL, il est possible de développer une radio cognitive permettant une écoute de spectre et un Accès Dynamique au Spectre (ADS). Ces deux possibilités sont utiles pour surmonter le problème de la rareté du spectre. Cette thèse propose une nouvelle solution Radio logicielle pour un RCSF basé sur le standard IEEE 802.15.4. Notre objectif est de caractériser une plate-forme RL qui implémente à la fois deux couches PHY standardisées et une radio cognitive pour des RCSFs. Dans cette thèse, nous avons réalisé des implémentations RL en utilisant une plateforme composée de la solution Universal Software Peripheral Radio (USRP) d'Ettus Research et de GNU Radio. Nous avons choisi cette plateforme particulière puisqu'elle est parmi les outils les plus performants et les plus pratiques d'après notre état de l'art. Une étude minutieuse a été effectuée pour analyser l'architecture logicielle de la GNU Radio avant son utilisation. Des USRPs avec leurs cartes filles ont été aussi analysés à travers des mesures expérimentales radio fréquences. L'analyse de cette plate-forme a apporté une description détaillée de son architecture et de ses performances. Nous avons prouvé que les performances mesurées sont plus faibles que ceux attendus pour certaines cartes filles d'USRP. Malgré ces résultats, certaines cartes ont de nombreuses caractéristiques intéressantes, comme de grandes bandes de fréquences couvertes et une puissance de sortie linéaire. Un modèle empirique a été introduit pour caractériser avec précision la puissance de sortie moyenne d'une carte fille particulière. Nous avons ensuite implémenté une nouvelle couche PHY standardisée pour la bande de fréquence 868/915 MHz basée sur le standard 802.15.4. Un processus de rétro-ingénierie d'une autre implémentation développée pour la bande 2.4GHz a été effectué. Ces deux couches ont été décrites par des chaines de communications ou des graphes de flux. Nous avons finalement proposé une nouvelle radio cognitive par une reconfiguration de ces graphes de flux dans les deux bandes de fréquences correspondantes. La particularité de notre radio cognitive est de reconfigurer les graphes de flux en fonction de la fréquence sélectionnée. Cette sélection est effectuée par un ADS et une écoute de spectre basé sur une détection d'énergie, validés tous les deux au travers des réelles communications sans fil. Nous avons introduit un algorithme à base de messages afin de reconfigurer les graphes de flux et de synchroniser la sélection sur une fréquence porteuse. Les deux couches physiques en RL pour les bandes 2.4 GHz et 868/915 MHz ont été testées et sont fonctionnelles. La première a été testée en échangeant des paquets de données avec des nœuds capteurs réels. La deuxième a été expérimentée par l'échange de paquets, à travers une communication entre deux radios logicielles USRP/GNU Radio. Nous avons réussi à mesurer deux paramètres réels d'une communication sans fil : le taux d'erreur binaire et le taux de succès des paquets. Les couches PHY résultantes ont servi à la réalisation et à l'expérimentation d'un ADS de notre radio cognitive. Un ADS a amélioré significativement le taux de succès de paquets par rapport à celui obtenu avec un accès statique dans un environnement indoor. Les résultats de cette thèse conduisent à expérimenter une radio cognitive avec une RL non seulement pour un RCSF, mais pour d'autres réseaux sans fil et standards radio / The Increasing number of Wireless Sensor Networks (WSNs) applications has led industries to design the physical layer (PHY) of these networks following the IEEE 802.15.4 standard. The traditional design of that layer is on hardware suffering from a lack of flexibility of radio parameters, such as changing both frequency bands and modulations. This problem is emphasized by the scarcity of the radio-frequency spectrum. Software Defined Radio (SDR) is an attracting solution to easily reconfigure radio parameters. In addition to SDR, a cognitive radio concept can be proposed by spectrum sensing and Dynamic Spectrum Access (DSA) both to overcome the spectrum scarcity problem. This thesis proposes a new SDR solution for WSNs based on the IEEE 802.15.4 standard. Our aim is to characterize an SDR platform that implements two standardized PHY layers and cognitive radio for WSNs. In this thesis, we carried out SDR implementations using a GNU Radio and Universal Software Peripheral Radio (USRP) platform. We chose this particular platform because it is one of the most practical and well-performed ones. A thorough study was performed to analyze GNU Radio software architecture before its usage. USRPs and their daughter boards were also analyzed through experimental radio-frequency measurements. The analysis of the GNU Radio USRP platform brought a detailed description of its architecture and performances as well as the way to implement an SDR. This description particularly assists researchers to quickly develop efficient SDR receivers and transmitters. We show through our experiments that the measured performances of daughter boards mounted on a USRP are lower than expected ones. Despite these results, some daughter boards have many interesting features such as large covered frequency bands and with a linear output power. An empirical model was introduced to accurately characterize the average output power of a particular daughter board. Then, we implemented a new possible standardized PHY layer for the 868/915 MHz frequency band. A reverse engineering process of another implementation was performed for the 2450 MHz frequency band. These two PHY layers were described by communication chains or flow graphs. We suggested a new Cognitive Radio by a reconfiguration of these flow graphs within the corresponding frequency bands. The particularity of our cognitive radio is to reconfigure flow graphs in function to the selected frequency. This selection is performed by DSA and spectrum sensing based on energy detection both through real wireless communications. We introduced a message based algorithm in order to reconfigure the flow graphs and to synchronize the selection of a carrier frequency. Our two implemented PHY layers for the 2450 MHz and the 868/915 frequency bands were found functional. The first one was tested by exchanging data packets with real sensor nodes. The second was also experienced by a packet exchange, but via GNURadio/USRP communications. Both tests were carried out through real communications. We were also able to measure two wireless communication parameters: Bit Error Rate (BER) and the Packet Success Rate (PSR). The result of functional PHY layers was beneficial for realization and experiments of our cognitive radio. We found that our DSA significantly improves the packet success rate compared to that obtained with static spectrum access in an indoor environment. The results of this thesis lead to experiment a cognitive radio with an SDR not only for a WSN, but for other wireless networks and radio standards
178

Telemetrický archiv družic / Satellite Telemetry Archive

Vorálek, Jan January 2020 (has links)
This thesis deals with a design of telemetry archive of PSAT, PSAT-2 and BRICSat sattelites. This telemetry data need to be extracted from SDR IQ records. The thesis contains a Doppler effect theory and description of structure of telemetry data. Then it presents a design of a program for Doppler effect correction, demodulation and decoding of these records and saving the data to telemetry archive. Thesis also deals with analysis of decoded data.
179

A Calibration Method for a Controlled Reception Pattern Antenna and Software Defined Radio Configuration

Bauer, Zachary Obenour 12 June 2013 (has links)
No description available.
180

Ultra-wideband Spread Spectrum Communications using Software Defined Radio and Surface Acoustic Wave Correlators

Gallagher, Daniel 01 January 2015 (has links)
Ultra-wideband (UWB) communication technology offers inherent advantages such as the ability to coexist with previously allocated Federal Communications Commission (FCC) frequencies, simple transceiver architecture, and high performance in noisy environments. Spread spectrum techniques offer additional improvements beyond the conventional pulse-based UWB communications. This dissertation implements a multiple-access UWB communication system using a surface acoustic wave (SAW) correlator receiver with orthogonal frequency coding and software defined radio (SDR) base station transmitter. Orthogonal frequency coding (OFC) and pseudorandom noise (PN) coding provide a means for spreading of the UWB data. The use of orthogonal frequency coding (OFC) increases the correlator processing gain (PG) beyond that of code division multiple access (CDMA); providing added code diversity, improved pulse ambiguity, and superior performance in noisy environments. Use of SAW correlators reduces the complexity and power requirements of the receiver architecture by eliminating many of the components needed and reducing the signal processing and timing requirements necessary for digital matched filtering of the complex spreading signal. The OFC receiver correlator code sequence is hard-coded in the device due to the physical SAW implementation. The use of modern SDR forms a dynamic base station architecture which is able to programmatically generate a digitally modulated transmit signal. An embedded Xilinx Zynq ™ system on chip (SoC) technology was used to implement the SDR system; taking advantage of recent advances in digital-to-analog converter (DAC) sampling rates. SDR waveform samples are generated in baseband in-phase and quadrature (I & Q) pairs and upconverted to a 491.52 MHz operational frequency. The development of the OFC SAW correlator ultimately used in the receiver is presented along with a variety of advanced SAW correlator device embodiments. Each SAW correlator device was fabricated on lithium niobate (LiNbO3) with fractional bandwidths in excess of 20%. The SAW correlator device presented for use in system was implemented with a center frequency of 491.52 MHz; matching SDR transmit frequency. Parasitic electromagnetic feedthrough becomes problematic in the packaged SAW correlator after packaging and fixturing due to the wide bandwidths and high operational frequency. The techniques for reduction of parasitic feedthrough are discussed with before and after results showing approximately 10:1 improvement. Correlation and demodulation results are presented using the SAW correlator receiver under operation in an UWB communication system. Bipolar phase shift keying (BPSK) techniques demonstrate OFC modulation and demodulation for a test binary bit sequence. Matched OFC code reception is compared to a mismatched, or cross-correlated, sequence after correlation and demodulation. Finally, the signal-to-noise power ratio (SNR) performance results for the SAW correlator under corruption of a wideband noise source are presented.

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