Global ETD Search

11	STEP : planejamento, geração e seleção de auto-teste on-line para processadores embarcados / STEP : planning, generation and selection of on-line self-test for embedded processors Moraes, Marcelo de Souza January 2006 (has links) Sistemas embarcados baseados em processadores têm sido largamente aplicados em áreas críticas no que diz respeito à segurança de seres humanos e do meio ambiente. Em tais aplicações, que compreendem desde o controle de freio de carros a missões espaciais, pode ser necessária a execução confiável de todas as funcionalidades do sistema durante longos períodos e em ambientes desconhecidos, hostis ou instáveis. Mesmo em aplicações não críticas, nas quais a confiabilidade do sistema não é um requisito primordial, o usuário final deseja que seu produto apresente comportamento estável e livre de erros. Daí vem a importância de se considerar o auto-teste on-line no projeto dos sistemas embarcados atuais. Entretanto, a crescente complexidade de tais sistemas somada às fortes restrições a que eles estão sujeitos torna o projeto do auto-teste um problema cada vez mais desafiador. Em aplicações de tempo-real a dificuldade é ainda maior, uma vez que, além dos cuidados com as restrições do sistema alvo, deve-se levar em conta o atendimento dos requisitos temporais da aplicação. Entre as técnicas de auto-teste on-line atualmente pesquisadas, uma tem se destacado pela eficácia obtida a um baixo custo de projeto e sem grande impacto no atendimento dos requisitos e restrições do sistema: o auto-teste baseado em software (SBST – Software-Based Self-Test). Neste trabalho, é proposta uma metodologia para o projeto e aplicação de auto-teste on-line para processadores embarcados, considerando-se também aplicações de temporeal. Tal metodologia, denominada STEP (Self-Test for Embedded Processors), tem como base a técnica SBST e prevê o planejamento, a geração e a seleção de rotinas de teste para o processador alvo. O método proposto garante a execução periódica do autoteste, com o menor período permitido pela aplicação de tempo-real, e assegura o atendimento de todas as restrições do sistema embarcado. Além disso, a solução fornecida pelo método alcança uma boa qualidade de teste enquanto auxilia a redução de custos do sistema final. Como estudo de caso, a metodologia proposta é aplicada a diferentes arquiteturas de processadores Java e os resultados obtidos comprovam a eficiência da mesma. Por fim, é apresentada uma ferramenta que implementa a metodologia STEP, automatizando, assim, o projeto e a aplicação de auto-teste on-line para os processadores estudados. / Processor-based embedded systems have been widely used in safety-critical applications. In such applications, which include from cars break control to spatial missions, the whole system operation must be reliable during long periods even within unknown, hostile and unstable environments. In non-critical applications, system reliability is not a prime requirement, but the final user requires an error free product, with stable behavior. Hence, one can realize the importance of on-line self-testing in current embedded systems. Self-testing is becoming an important challenge due to the increasing complexity of the systems allied to their strong constraints. In real-time applications this problem becomes even more complex, since, besides meeting systems constraints, one must take into consideration the application timing requirements. Among all on-line self-testing techniques studied, Software-Based Self-Test (SBST) has been distinguished by its effectiveness, low-cost and small impact on system constraints and requirements. This work proposes a methodology for the design and implementation of on-line self-test in embedded processors, considering real-time applications. Such a methodology, called STEP (Self-Test for Embedded Processors), is based on SBST technique and encloses planning, generation and selection of test routines for the target processor. The proposed method guarantees periodical self-test execution, at the smallest period allowed by the real-time application, and ensures that all embedded system constraints are met. Furthermore, provided solution achieves high test quality while helping in the optimization of the costs of the final system. The proposed methodology is applied to different architectures of Java processors to demonstrate its efficiency. Finally, this work presents a tool that automates the design and implementation of on-line self-test in the studied processors by implementing the STEP methodology. Microeletrônica Sistemas embarcados Processadores Self-test design On-line testing Software-based self-test Processors testing Embedded processors Real-time systems
12	STEP : planejamento, geração e seleção de auto-teste on-line para processadores embarcados / STEP : planning, generation and selection of on-line self-test for embedded processors Moraes, Marcelo de Souza January 2006 (has links) Sistemas embarcados baseados em processadores têm sido largamente aplicados em áreas críticas no que diz respeito à segurança de seres humanos e do meio ambiente. Em tais aplicações, que compreendem desde o controle de freio de carros a missões espaciais, pode ser necessária a execução confiável de todas as funcionalidades do sistema durante longos períodos e em ambientes desconhecidos, hostis ou instáveis. Mesmo em aplicações não críticas, nas quais a confiabilidade do sistema não é um requisito primordial, o usuário final deseja que seu produto apresente comportamento estável e livre de erros. Daí vem a importância de se considerar o auto-teste on-line no projeto dos sistemas embarcados atuais. Entretanto, a crescente complexidade de tais sistemas somada às fortes restrições a que eles estão sujeitos torna o projeto do auto-teste um problema cada vez mais desafiador. Em aplicações de tempo-real a dificuldade é ainda maior, uma vez que, além dos cuidados com as restrições do sistema alvo, deve-se levar em conta o atendimento dos requisitos temporais da aplicação. Entre as técnicas de auto-teste on-line atualmente pesquisadas, uma tem se destacado pela eficácia obtida a um baixo custo de projeto e sem grande impacto no atendimento dos requisitos e restrições do sistema: o auto-teste baseado em software (SBST – Software-Based Self-Test). Neste trabalho, é proposta uma metodologia para o projeto e aplicação de auto-teste on-line para processadores embarcados, considerando-se também aplicações de temporeal. Tal metodologia, denominada STEP (Self-Test for Embedded Processors), tem como base a técnica SBST e prevê o planejamento, a geração e a seleção de rotinas de teste para o processador alvo. O método proposto garante a execução periódica do autoteste, com o menor período permitido pela aplicação de tempo-real, e assegura o atendimento de todas as restrições do sistema embarcado. Além disso, a solução fornecida pelo método alcança uma boa qualidade de teste enquanto auxilia a redução de custos do sistema final. Como estudo de caso, a metodologia proposta é aplicada a diferentes arquiteturas de processadores Java e os resultados obtidos comprovam a eficiência da mesma. Por fim, é apresentada uma ferramenta que implementa a metodologia STEP, automatizando, assim, o projeto e a aplicação de auto-teste on-line para os processadores estudados. / Processor-based embedded systems have been widely used in safety-critical applications. In such applications, which include from cars break control to spatial missions, the whole system operation must be reliable during long periods even within unknown, hostile and unstable environments. In non-critical applications, system reliability is not a prime requirement, but the final user requires an error free product, with stable behavior. Hence, one can realize the importance of on-line self-testing in current embedded systems. Self-testing is becoming an important challenge due to the increasing complexity of the systems allied to their strong constraints. In real-time applications this problem becomes even more complex, since, besides meeting systems constraints, one must take into consideration the application timing requirements. Among all on-line self-testing techniques studied, Software-Based Self-Test (SBST) has been distinguished by its effectiveness, low-cost and small impact on system constraints and requirements. This work proposes a methodology for the design and implementation of on-line self-test in embedded processors, considering real-time applications. Such a methodology, called STEP (Self-Test for Embedded Processors), is based on SBST technique and encloses planning, generation and selection of test routines for the target processor. The proposed method guarantees periodical self-test execution, at the smallest period allowed by the real-time application, and ensures that all embedded system constraints are met. Furthermore, provided solution achieves high test quality while helping in the optimization of the costs of the final system. The proposed methodology is applied to different architectures of Java processors to demonstrate its efficiency. Finally, this work presents a tool that automates the design and implementation of on-line self-test in the studied processors by implementing the STEP methodology. Microeletrônica Sistemas embarcados Processadores Self-test design On-line testing Software-based self-test Processors testing Embedded processors Real-time systems
13	Comparative Analysis of In-Body to Out-Body Wireless CommunicationModules: Test Design and PerformanceEvaluation Sree Rema Bhai, Remya, Stellus, Sisymol January 2024 (has links) Wireless communication for biomedical equipment is rapidly improving with the invention of new technologies. Due to the absence of cables, wireless technology is a growing area of interest for biomedical applications. As technology advances, many gadgets are becoming smaller and more portable. Often, there is a need for these medical devices to transfer data in real-time. However, it is critical to recognize the special obstacles connected with the creation of novel products that need in-body to off-body communication. Unlike standard wireless communication scenarios, such as Wi-Fi or cellular networks, where data passes through the air; in-body to off-body communication occurs within or on the surface of the human body. Itis a significant technological challenge to provide dependable and secure communication inside the body’s dynamic and changing environment. The human body’s dielectric characteristics, attenuation, received power, transmitted power, and distance to the receiver must be considered when designing any wireless implantable device. In this thesis, we designed tests with a lossy medium that simulates the human body and a few test protocols that can facilitate the testing and development of wireless communications from in-body to off-body for a medical device intended to support pelvic muscle floor training. We designed the test protocols based on this application and safety requirements. These tests were then used to evaluate and compare two commercially available transceivers operating at 433MHz and 2.4 GHz.We created and implemented several experiments using the communication models. This thesis investigated the properties of a lossy medium in the context of electromagnetic signals in wireless communication. The tests included a study of connectivity, range, latency, and packet errors that occur during signal transmission across the medium. The findings indicate that BLE modules might be more favorable for future advances. The outcomes of this thesis can be utilized as a starting point for the future development of the intended application.BLE technology is distinctive largely by its low power consumption, which is critical for applications where energy efficiency is the main concern. Especially important in the context of IoT (Internet of Things) and wearable devices, where long-lasting battery life is required. Furthermore, BLE provides a more robust and standardized communication protocol, making it easy to integrate and compatible with a wide range of devices and platforms. While 433 MHz modules have advantages such as a longer range and simpler technology, BLE’s increased transmission rate capabilities and broad acceptance in current smartphones and tablets make it more adaptable for applications that require frequent data exchange and compatibility with consumer devices. In-Body to Off-Body Communication prototype test-design test protocol medical device wireless communication. Sport and Fitness Sciences Idrottsvetenskap
14	An Integrated System-Level Design for Testability Methodology Larsson, Erik January 2000 (has links) HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems. The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the total test cost. The objective is achieved by developing several new methods to help the designers to analyze the testability and improve it as well as to perform test scheduling and test access mechanism design. The developed methods have been integrated into a systematic methodology for the testing of system-on-chip. The methodology consists of several efficient techniques to support test scheduling, test access mechanism design, test set selection, test parallelization and test resource placement. An optimization strategy has also been developed which minimizes test application time and test access mechanism cost, while considering constraints on tests, power consumption and test resources. Several novel approaches to analyzing the testability of a system at behavioral level and register-transfer level have also been developed. Based on the analysis results, difficult-to-test parts of a design are identified and modified by transformations to improve testability of the whole system. Extensive experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodology and techniques. The experimental results show clearly the advantages of considering testability in the early design stages at the system level. Digital systems Test design System-on-chip Hardware Systems design Testing Dissertations Hårdvara Systemutveckling Testning Databehandling Systemutveckling Computer and systems science Data- och systemvetenskap
15	Kontexteffekte in Large-Scale Assessments Weirich, Sebastian 13 August 2015 (has links) Im Rahmen der Item-Response-Theorie evaluiert die kumulative Dissertationsschrift verschiedene Methoden und Modelle zur Identifikation von Kontexteffekten in Large-Scale Assessments. Solche Effekte können etwa in quantitativen empirischen Schulleistungsstudien auftreten und zu verzerrten Item- und Personenparametern führen. Um in Einzelfällen abschätzen zu können, ob Kontexteffekte auftreten und dadurch die Gefahr verzerrter Parameter gegeben ist (und falls ja, in welcher Weise), müssen IRT-Modelle entwickelt werden, die zusätzlich zu Item- und Personeneffekten Kontexteffekte parametrisieren. Solch eine Parametrisierung ist im Rahmen Generalisierter Allgemeiner Linearer Modelle möglich. In der Dissertation werden Positionseffekte als ein Beispiel für Kontexteffekte untersucht, und es werden die statistischen Eigenschaften dieses Messmodells im Rahmen einer Simulationsstudie evaluiert. Hier zeigt sich vor allem die Bedeutung des Testdesigns: Um unverfälschte Parameter zu gewinnen, ist nicht nur ein adäquates Messmodell, sondern ebenso ein adäquates, also ausbalanciertes Testdesign notwendig. Der dritte Beitrag der Dissertation befasst sich mit dem Problem fehlender Werte auf Hintergrundvariablen in Large-Scale Assessments. Als Kontexteffekt wird in diesem Beispiel derjenige Effekt verstanden, der die Wahrscheinlichkeit eines fehlenden Wertes auf einer bestimmten Variablen systematisch beeinflusst. Dabei wurde das Prinzip der multiplen Imputation auf das Problem fehlender Werte auf Hintergrundvariablen übertragen. Anders als bisher praktizierte Ansätze (Dummy-Codierung fehlender Werte) konnten so in einer Simulationsstudie für fast alle Simulationsbedingungen unverfälschte Parameter auf der Personenseite gefunden werden. / The present doctoral thesis evaluates various methods and models of the item response theory to parametrize context effects in large-scale assessments. Such effects may occur in quantitative educational assessments and may cause biased item and person parameter estimates. To decide whether context effects occur in individual cases and lead to biased parameters, specific IRT models have to be developed which parametrize context effects additionally to item and person effects. The present doctoral thesis consists of three single contributions. In the first contribution, a model for the estimation of context effects in an IRT framework is introduced. Item position effects are examined as an example of context effects in the framework of generalized linear mixed models. Using simulation studies, the statistical properties of the model are investigated, which emphasizes the relevance of an appropriate test design. A balanced incomplete test design is necessary not only to obtain valid item parameters in the Rasch model, but to guarantee for unbiased estimation of position effects in more complex IRT models. The third contribution deals with the problem of missing background data in large-scale assessments. The effect which predicts the probability of a missing value on a certain variable, is considered as a context effect. Statistical methods of multiple imputation were brought up to the problem of missing background data in large-scale assessments. In contrast to other approaches used so far in practice (dummy coding of missing values) unbiased population and subpopulation estimates were received in a simulation study for most conditions. Kontexteffekte Testdesign Large-Scale Assessments Item-Response-Theorie Itempositionseffekte missing data multiple Imputation context effects item response theory test design Large-scale assessments item position effects missing data multiple imputation 150 Psychologie 11 Psychologie CM 3000 CM 3200 ddc:150
16	Návrh průkazných statických pevnostních zkoušek letounu v kategorii UL / Design of certification static strength tests of the aircraft UL category Serediuk, Vadym January 2021 (has links) The diploma thesis involves the design of certification static strength tests for the newly developed aircraft of the TL-Ultralight company. At the beginning of the work, the theory of aircraft testing is generally discussed with emphasis on static strength tests. Furthermore, an analysis of the requirements of the Czech regulation UL 2 and the German LTF-UL, which represent the certification basis for this aircraft, is performed. The requirements of regulations on the construction of the aircraft (or its individual parts) and the requirements for strength tests are discussed in detail. Based on the regulation and the provided calculation protocols, individual test cases and test plans of the wing, tail surfaces, engine bed, and chassis are calculated and prepared. In the end, the calculation of the rocker system and the basic design of jigs are performed.
17	Optimierung von Messinstrumenten im Large-scale Assessment Hecht, Martin 21 July 2015 (has links) Messinstrumente stellen in der wissenschaftlichen Forschung ein wesentliches Element zur Erkenntnisgewinnung dar. Das Besondere an Messinstrumenten im Large-scale Assessment in der Bildungsforschung ist, dass diese normalerweise für jede Studie neu konstruiert werden und dass die Testteilnehmer verschiedene Versionen des Tests bekommen. Hierbei ergeben sich potentielle Gefahren für die Akkuratheit und Validität der Messung. Um solche Gefahren zu minimieren, sollten (a) die Ursachen für Verzerrungen der Messung und (b) mögliche Strategien zur Optimierung der Messinstrumente eruiert werden. Deshalb wird in der vorliegenden Dissertation spezifischen Fragestellungen im Rahmen dieser beiden Forschungsanliegen nachgegangen. / Measurement instruments are essential elements in the acquisition of knowledge in scientific research. Special features of measurement instruments in large-scale assessments of student achievement are their frequent reconstruction and the usage of different test versions. Here, threats for the accuracy and validity of the measurement may emerge. To minimize such threats, (a) sources for potential bias of measurement and (b) strategies to optimize measuring instruments should be explored. Therefore, the present dissertation investigates several specific topics within these two research areas. Psychologie Bildungsforschung Optimierung Kontexteffekte Bearbeitungszeit Blockpaarbalance Designeffekte Designbalancierung Generalisierte lineare Mischmodelle IQB IRT Lineare Mischmodelle Messmodell Messinstrument Multi-Matrix Design Parameterschätzung Parameterverzerrung Positionsbalance Rasch-Modell Testhefteffekte Testheftschwierigkeit Testheftleichtigkeit Testdesign Unvollständige Blockdesigns Positionseffekte Schulleistungsstudien context effects optimization linear mixed models generalized linear mixed models response time educational assessment cluster pair balance design effects design balance item response theory measurement model measurement instrument parameter estimation parameter bias position balance psychology Rasch model 1PL model booklet effects booklet difficulty booklet easiness test design booklet design incomplete block design multiple matrix sampling position effects large-scale assessment 150 Psychologie 11 Psychologie CM 3000 CM 3200 ddc:150

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