Silicon Oxide/Oxynitride (SiO2/SiON) has been the mainstream material used for gate dielectric for MOS transistors for the past 30 years. The aggressive scaling of the feature size of MOS transistor has limited the ability of SiO2/SiON to work effectively as the gate dielectric to modulate the conduction of current of MOS transistors due to excess leakage current dominated by direct quantum tunneling. Due to this constraint, alternative gate dielectric/high-k is being employed to reduce the leakage current in order to maintain the rate of scaling of MOS transistors. However, the cost involved in the implementation of these new gate dielectric materials are high due to the requirements of a change in the process flow for device fabrication. This work presents the results of a novel processing method implementing the use of rapid thermal processing (RTP) on conventional SiO2/SiON gate dielectric to reduce the gate leakage current by three to five orders of magnitude. Electrical properties of the effect were characterized on fabricated MOS capacitors using semiconductor parameter analyzer and LCR meter. Material characterization was performed using FT-IR to understand the mechanism involved in this novel processing method, named PECE (Phonon-Energy-Coupling-Enhancement). By implementing this novel process, the use of SiO2/SiON as gate dielectric can be scaled further in conventional process flow of device fabrication.

Several results were reviewed on the charge injection into thin conjugated polymer films. The space charge limited tunneling current (SCTC) and space-charge limited current (SCLC) models were used to explain the charge injection and transport in conjugated polymer films such as those used in organic light emitting diodes. On the basis of regional approximation, the effect of the space charge on the current density of electrons tunneling from metal electrodes to the lowest unoccupied molecular orbital of a polymer film is calculated. The space charge is considered to decrease with increasing distance of the injecting electrode. If the space charge occupies only a limited region between the tunneling (short) distance and the collecting electrode, the current (I) is found to be independent on a power law of the applied voltage (V). However, if the space charge occupies all the region between the tunneling distance and the collecting electrode, I is found to vary exponentially on V for lower V values, and that follow approximately the law of Child at high V in region I, the law of Trap filled limited current at middle voltage in region II and the region III show Ohm¡¦s law at lower voltage. The space charge limited tunneling current (SCTC) theory gives the same results of the space charge limited conduction theory when the energy barrier for charge carrier injection is small or when the polymer layer is thick. Under various bias voltages, the charge transport mechanism was analyzed to investigate the effects on the thin conjugated polymer films induced by the parameters such as background concentration, trap-state density and space charge etc... The results show the transport current decrease with increasing the trap-state density and also increase the characteristic temperature parameters. In this study, the regional approximation is applied to calculate the charge injection and current transport mechanism in the organic thin film. The SCTC and SCLC models are compared to the experimental data. It shows that there is a good agreement between theory and experiment, concerning both current magnitude and current versus voltage dependence. It is very important that our model gave a new way to simplify the calculation and to discuss the charge transport of organic light emitting diode.

L'objectif de la thèse est l'élaboration de lois de commande de haute performance et leur validation en temps réel sur une plateforme expérimentale 3D de nano-positionnement à base de courant à effet tunnel, développée au laboratoire GIPSA-lab. Elle s'inscrit donc dans le cadre des systèmes micro-/nano-mécatronique (MEMS), et de la commande. Plus précisément, le principal enjeu considéré est de positionner la pointe métallique à effet tunnel (comme en microscopie à effet tunnel STM) contre la surface métallique en utilisant des actionneurs piézoélectriques en X, Y et Z et un micro-levier (comme en microscopie à force atomique AFM) actionné électrostatiquement en Z avec une grande précision et une bande passante élevée. Cependant, la présence de différents effets indésirables apparaissant à cette petite échelle (comme le bruit de mesure, des non-linéarités de natures différentes, les couplages, les vibrations) affectent fortement la performance globale du système 3D. En conséquence, une commande de haute performance est nécessaire. Pour cela, un nouveau modèle 3D du système a été développé et des méthodes de contrôle appropriées pour un tel système ont été élaborées. Tout d'abord l'accent est mis sur de positionnement selon les axes X et Y. Les effets d'hystérésis et de fluage non linéaires présents dans les actionneurs piézoélectriques ont été compensés et une comparaison entre les différentes méthodes de compensation est effectuée. Des techniques modernes de commande robuste SISO et MIMO sont ensuite utilisées pour réduire les effets des vibrations piézoélectriques et des couplages entre les axes X et Y. Le mouvement horizontal est alors combiné avec le mouvement vertical (Axe Z) et une commande du courant tunnel et du micro-levier. Des résultats expérimentaux illustrent le nano positionnement 3D de la pointe, et des résultats de simulation pour la reconstruction de la topographie de la surface ainsi que le positionnement du micro-levier à base d'un modèle multi-modes. / The objective of this thesis was to elaborate high performance control strategies and their real-time validation on a tunneling current-based 3D nanopositioning system developed in GIPSA-lab. The thesis lies in the domain of micro-/nano mechatronic systems (MEMS) focused on applications of fast and precise positioning and scanning tunneling microscopy (STM). More precisely, the aim is to position the metallic tunneling tip (like in STM) over the metallic surface using piezoelectric actuators in X, Y and Z directions and actuated micro-cantilever (like in Atomic Force Microscope AFM), electrostatically driven in Z direction, with high precision, over possibly high bandwidth. However, the presence of different adverse effects appearing at such small scale (e.g. measurement noise, nonlinearities of different nature, cross-couplings, vibrations) strongly affect the overall performance of the 3D system. Therefore a high performance control is needed. To that end, a novel 3D model of the system has been developed and appropriate control methods for such a system have been elaborated. First the focus is on horizontal X and Y directions. The nonlinear hysteresis and creep effects exhibited by piezoelectric actuators have been compensated and a comparison between different compensation methods is provided. Modern SISO and MIMO robust control methods are next used to reduce high frequency effects of piezo vibration and cross-couplings between X and Y axes. Next, the horizontal motion is combined with the vertical one (Z axis) with tunneling current and micro-cantilever control. Illustrative experimental results for 3D nanopositioning of tunneling tip, as well as simulation results for surface topography reconstruction and multi-mode cantilever positioning, are finally given.

L'objet de la thèse était la commande d'un système de nano-positionnement par couranttunnel, avec application sur la plateforme expérimentale développée au laboratoire Gipsa-lab.Cette thèse s'inscrit dans le cadre de la commande des systèmes micro et nano-mécatronique,pour des applications en microscopie en champ proche ou dans des systèmes depositionnement ultra-précis. A l'échelle nanométrique, des problèmes de bruits de différentesnatures, vibrations, non-linéarités et instabilité influencent la précision et la qualité de mesuredu système. L'objectif était donc de pouvoir faire face à ces contraintes en utilisant destechniques modernes de commande robuste. Dans cette thèse, un système de mesure à couranttunnel a été modélisé et le problème de contrôle lié aux performances de mesure souhaitées aété formulé. Les performances souhaitées, à savoir la précision de la mesure et le rejet decertaines perturbations avec la robustesse adéquate, ont été atteints en utilisant des lois decommande robuste. Ces lois de commande ont été validées expérimentalement (àl'atmosphère ambiante) sur une plateforme du Gipsa-lab. À la fin de cette thèse, pour uneapplication de scanner de surface à l'échelle atomique, une modélisation dynamique MIMOdu système a été proposée et un régulateur MIMO afin de réduire l'erreur de positionnementdûe au couplage a été validé en simulations. / The objective of this thesis was to control the nano-positioning system using tunneling current with the real-time validation over an experimental platform developed in Gipsa-lab. This thesis lies in the domain of control for micro and nano-mechatronics systems for the applications of scanning probe microscopy and ultra-precise positioning. At nanometer scale, the problems of noise, vibrations, nonlinearity and instability influence the precision of the measurement. The objective was to deal with these constraints by using the modern techniques of robust control. In this thesis, a system of tunneling current measurement has been modelled and the control problem has been formulated in terms of desired measurement performances. Then, robust control design laws are analyzed in order to achieve better performances in terms of measurement precision and rejection of certain disturbances with robustness. These control laws are experimentally validated (at ambient atmosphere) for a platform of Gipsa-lab. At the end of this thesis, a dynamic modelling of MIMO system for an application of scanning the surface with an atomic resolution has been proposed and a MIMO controller in order to reduce the positioning error due to coupling has been validated in simulations.

Neste trabalho foram fabricados diodos túnel MOS Al/SiOxNy/Si(p) e TiN/SiOxNy/Si(p) com áreas de 300µm x 300?m e de 700?m x 700µm. Para o crescimento do oxinitreto de silício (SiOxNy), como dielétrico de porta, foi utilizado um forno térmico junto com um aparato de quartzo para processamento de apenas uma lâmina por vez. Foi empregada uma temperatura de processamento de 850°C e fluxos de gases ultrapuros ajustados na proporção em volume de 5N2 : 1O2 (2 l/min. de N2 e 0,4 l/min. de O2). Foi constatado que a nitretação térmica rápida do silício introduz armadilhas no dielétrico de porta de duas naturezas: a) armadilhas do tipo K na interface dielétrico-silício devido à existência de ligações Si?N que podem armazenar elétron, lacuna ou ficar em um estado neutro e b) armadilhas geradas devido à quebra das cadeias Si-O-Si durante a oxinitretação. As armadilhas criadas durante a nitretação térmica rápida, tanto na interface como no corpo, influíram no mecanismo de tunelamento através do dielétrico de porta que foi predominantemente do tipo tunelamento assistido por armadilhas (TAT). A partir da característica J-V típica de diodos túnel MOS com porta de Al, verificou-se para VG =-1V que os níveis de densidade de corrente atingem 64mA/cm2, valor que é superior aos valores obtidos para óxidos de porta com espessura na faixa de 1-1,5nm na literatura apesar do nosso dielétrico apresentar espessura média de 2,1nm. Tal fato foi uma evidência clara de que um outro mecanismo diferente de tunelamento direto ocorreu no oxinitreto de silício crescido. Nos diodos túnel MOS, com porta de Al, observou-se a presença de dois picos característicos na curva C-V, o primeiro deles em tensão de porta mais negativa com uma fenomenologia que permitiu extrair a tensão de faixa plana (VG = VFB). O segundo pico na característica C-V do diodo MOS com porta de Al ocorreu em uma tensão menos negativa VG=VK= -0,78V o que foi atribuído à uma capacitância devido às armadilhas de interface Si?N localizadas dentro da banda proibida junto à interface silício-dielétrico e cerca de 0,16eV abaixo do nível de energia intrínseco do semicondutor. Para tensões de porta positivas, foi também constatada uma clara dependência da densidade de corrente com a intensidade da luz (0,05W/cm2 e 0,1W/cm2) devido à taxa de geração dentro do semicondutor. Da modelagem do tunelamento de corrente na região de depleção, verificou-se que a largura de depleção resultou sistematicamente maior do que a largura de depleção de equilíbrio, fato que permitiu concluir que o diodo túnel MOS entra em um estado de depleção profunda quase estacionária induzida pela corrente de tunelamento que atravessa o dielétrico de porta. / In this work Al/ SiOxNy/Si(p) and TiN/SiOxNy/Si(p) MOS tunnel diodes were fabricated with areas of 300µm x 300µm x 700µm and 700µm. For the growth of silicon oxynitrides (SiOxNy) as gate dielectrics, it was used a heating furnace with a quartz apparatus for single wafer processing. It was employed a processing temperature of 850°C and ultrapure gas flows adjusted in a volume proportion of 5N2:1O2 (2 l/min of N2 and 0.4l/min of O2). It has been found that the rapid thermal nitridation of silicon introduces traps in the gate dielectrics of two natures: a) K-type traps at the dielectric-silicon interface due to Si?N bonds that can store electrons or holes or can stay in a neutral state and b) traps generated from broken Si-O-Si chains during the oxynitridation. The traps created at the interface and in the oxynitride bulk, both influenced the tunneling mechanism through the gate dielectrics, which was predominantly a trap assisted tunneling (TAT). For VG = -1V, the current density of the Al-gate MOS tunnel diodes reached 64mA/cm2, a value which is higher than the reported values obtained for gate oxides with thickness in the range of 1-1.5nm in spite of our oxynitride thickness is 2.1nm. This fact is a clear evidence that another mechanism, different from direct tunneling, occurred in the silicon oxynitrides. For Al-gate MOS tunnel diodes, it was observed the presence of two characteristic peaks in the C-V curve: the first for more negative gate voltage with a phenomenology that allows one to extract the flat band voltage (VG = VFB). The second peak was located at a gate voltage VG = VK = -0.78V corresponding to a depletion regime and its maximum of capacitance was attributed to Si?N interface traps located in the bandgap at the silicon-dielectric interface, about 0.16eV below the intrinsic energy of the semiconductor. It was also observed a clear dependence of the current density against the light intensity (0.05/cm2 to 0.10W/cm2) due to the carriers generation inside the semiconductor. From the modeling of the current mechanism through the depletion region, it was found that the depletion width was systematically higher than the depletion width at the thermal equilibrium regime, a fact showing that the MOS tunnel diode achieves an almost stationary deep depletion, which is feeded by the tunneling current through the gate dielectrics.

Neste trabalho foram fabricados diodos túnel MOS Al/SiOxNy/Si(p) e TiN/SiOxNy/Si(p) com áreas de 300µm x 300?m e de 700?m x 700µm. Para o crescimento do oxinitreto de silício (SiOxNy), como dielétrico de porta, foi utilizado um forno térmico junto com um aparato de quartzo para processamento de apenas uma lâmina por vez. Foi empregada uma temperatura de processamento de 850°C e fluxos de gases ultrapuros ajustados na proporção em volume de 5N2 : 1O2 (2 l/min. de N2 e 0,4 l/min. de O2). Foi constatado que a nitretação térmica rápida do silício introduz armadilhas no dielétrico de porta de duas naturezas: a) armadilhas do tipo K na interface dielétrico-silício devido à existência de ligações Si?N que podem armazenar elétron, lacuna ou ficar em um estado neutro e b) armadilhas geradas devido à quebra das cadeias Si-O-Si durante a oxinitretação. As armadilhas criadas durante a nitretação térmica rápida, tanto na interface como no corpo, influíram no mecanismo de tunelamento através do dielétrico de porta que foi predominantemente do tipo tunelamento assistido por armadilhas (TAT). A partir da característica J-V típica de diodos túnel MOS com porta de Al, verificou-se para VG =-1V que os níveis de densidade de corrente atingem 64mA/cm2, valor que é superior aos valores obtidos para óxidos de porta com espessura na faixa de 1-1,5nm na literatura apesar do nosso dielétrico apresentar espessura média de 2,1nm. Tal fato foi uma evidência clara de que um outro mecanismo diferente de tunelamento direto ocorreu no oxinitreto de silício crescido. Nos diodos túnel MOS, com porta de Al, observou-se a presença de dois picos característicos na curva C-V, o primeiro deles em tensão de porta mais negativa com uma fenomenologia que permitiu extrair a tensão de faixa plana (VG = VFB). O segundo pico na característica C-V do diodo MOS com porta de Al ocorreu em uma tensão menos negativa VG=VK= -0,78V o que foi atribuído à uma capacitância devido às armadilhas de interface Si?N localizadas dentro da banda proibida junto à interface silício-dielétrico e cerca de 0,16eV abaixo do nível de energia intrínseco do semicondutor. Para tensões de porta positivas, foi também constatada uma clara dependência da densidade de corrente com a intensidade da luz (0,05W/cm2 e 0,1W/cm2) devido à taxa de geração dentro do semicondutor. Da modelagem do tunelamento de corrente na região de depleção, verificou-se que a largura de depleção resultou sistematicamente maior do que a largura de depleção de equilíbrio, fato que permitiu concluir que o diodo túnel MOS entra em um estado de depleção profunda quase estacionária induzida pela corrente de tunelamento que atravessa o dielétrico de porta. / In this work Al/ SiOxNy/Si(p) and TiN/SiOxNy/Si(p) MOS tunnel diodes were fabricated with areas of 300µm x 300µm x 700µm and 700µm. For the growth of silicon oxynitrides (SiOxNy) as gate dielectrics, it was used a heating furnace with a quartz apparatus for single wafer processing. It was employed a processing temperature of 850°C and ultrapure gas flows adjusted in a volume proportion of 5N2:1O2 (2 l/min of N2 and 0.4l/min of O2). It has been found that the rapid thermal nitridation of silicon introduces traps in the gate dielectrics of two natures: a) K-type traps at the dielectric-silicon interface due to Si?N bonds that can store electrons or holes or can stay in a neutral state and b) traps generated from broken Si-O-Si chains during the oxynitridation. The traps created at the interface and in the oxynitride bulk, both influenced the tunneling mechanism through the gate dielectrics, which was predominantly a trap assisted tunneling (TAT). For VG = -1V, the current density of the Al-gate MOS tunnel diodes reached 64mA/cm2, a value which is higher than the reported values obtained for gate oxides with thickness in the range of 1-1.5nm in spite of our oxynitride thickness is 2.1nm. This fact is a clear evidence that another mechanism, different from direct tunneling, occurred in the silicon oxynitrides. For Al-gate MOS tunnel diodes, it was observed the presence of two characteristic peaks in the C-V curve: the first for more negative gate voltage with a phenomenology that allows one to extract the flat band voltage (VG = VFB). The second peak was located at a gate voltage VG = VK = -0.78V corresponding to a depletion regime and its maximum of capacitance was attributed to Si?N interface traps located in the bandgap at the silicon-dielectric interface, about 0.16eV below the intrinsic energy of the semiconductor. It was also observed a clear dependence of the current density against the light intensity (0.05/cm2 to 0.10W/cm2) due to the carriers generation inside the semiconductor. From the modeling of the current mechanism through the depletion region, it was found that the depletion width was systematically higher than the depletion width at the thermal equilibrium regime, a fact showing that the MOS tunnel diode achieves an almost stationary deep depletion, which is feeded by the tunneling current through the gate dielectrics.

Die vorliegende Arbeit beschäftigt sich mit der mikroskopischen Modellierung von strominduziertem Schalten der Magnetisierung in magnetischen Tunnelstrukturen. Die Tunnelstruktur besteht aus zwei durch einen nichtmagnetischen Isolator voneinander getrennten Ferromagneten und einem Paramagneten, der als Elektronenreservoir dient. Die Ferromagnete werden beide durch das Hubbard-Modell beschrieben. Durch Anlegen einer Spannung verschieben sich die chemischen Potentiale auf beiden Seiten des Isolators, wodurch ein endlicher Tunnelstrom entsteht. Dieser wird im Rahmen des Modells durch eine Hybridisierung zwischen benachbarten Schichten simuliert. Das Modell muss im Nichtgleichgewicht gelöst werden, da aufgrund der unterschiedlichen chemischen Potentiale thermodynamisches Gleichgewicht nicht angenommen werden darf. Daher wird zur analytischen Auswertung der Keldysh-Formalismus verwendet, der eine Erweiterung der Viel-Teilchen-Theorie ins Nichtgleichgewicht darstellt. Da es sich beim Hubbard-Modell um ein nicht exakt lösbares Viel-Teilchen-Modell handelt, wurde in der Arbeit eine approximative Lösung, der sogenannte Nichtgleichgewichtsspektraldichteansatz, entwickelt. Dieser beruht auf einer Hochenergieentwicklung der retardierten Greenfunktion mit Hilfe der exakt berechenbaren Spektralmomente. Die numerischen Resultate stimmen qualitativ mit dem Experiment überein. Insbesondere gelingt es, das Hystereseverhalten der Magnetisierung des freien Ferromagneten in Abhängigkeit der angelegten Spannung korrekt zu reproduzieren. Es kann somit allein durch Anlegen einer Spannung kontrolliert zwischen paralleler und antiparalleler Ausrichtung der Magnetisierungen geschaltet werden. Dieses Phänomen ist anhand der entsprechenden Quasiteilchenzustandsdichten erklärbar. Weiterhin wird das Verhalten der kritischen Spannung systematisch in Form von Phasendiagrammen dargestellt und diskutiert. / This thesis is concerned with the microscopic modelling of current-induced switching of magnetization in magnetic tunnel junctions. The tunnel junction consists of two ferromagnets which are divided by a nonmagnetic insulator and a paramagnet, which acts as an electron reservoir. The ferromagnets are both described by the Hubbard model. By applying a voltage the chemical potentials on both sides of the insulator are shifted which results in a finite tunneling current. Within the model the current is simulated by a hybridization between neighbouring regions. The model has to be solved in non-equilibrium since thermal equilibrium requires a constant chemical potential for the whole system, which is not the case due to the voltage. Thus the Keldysh formalism will be used for evaluating the model. Since the Hubbard model is not exactly solvable one needs approximations. In this work a non-equilbrium spectral density approach is developed. It is based on a high-energy expansion of the retarded Green''s function and takes interactions beyond the mean field level into account. The numerical results of the theory are in qualitative agreement with experiments. It will be shown that it is possible to correctly get the hysterisis behaviour of the magnetization of the free ferromagnet in dependence on the applied voltage. Thus the relative alignment of the two magnetizations can be switched just by applying an electric field. This can be explained with the corresponding quasiparticle densities of state. Furthermore the behaviour of the critical voltage will be discussed systematically by calculating phase diagrams of the tunnel junction.

The low dimensions of the state-of-the-art nanoscale transistors exhibit increasing quantum mechanical effects, which are no longer negligible. Gate tunneling current is one of such effects, that is responsible for high power consumption and high working temperature in microprocessors. This in turn put limits on further down scaling of devices. Therefore modeling and calculation of tunneling current is of a great interest. This work provides a review of existing models for the calculation of the gate tunneling current in MOSFETs. The quantum mechanical effects are studied with a model, based on a self-consistent solution of the Schrödinger and Poisson equations within the effective mass approximation. The calculation of the tunneling current is focused on models based on the calculation of carrier’s lifetime on quasi-bound states (QBSs). A new method for the determination of carrier’s lifetime is suggested and then the tunneling current is calculated for different samples and compared to measurements. The model is also applied to the extraction of the “tunneling effective mass” of electrons in ultrathin oxynitride gate dielectrics. Ultrathin gate dielectrics (tox<2 nm) consist of only few atomic layers. Therefore, atomic scale deformations at interfaces and within the dielectric could have great influences on the performance of the dielectric layer and consequently on the tunneling current. On the other hand the specific material parameters would be changed due to atomic level deformations at interfaces. A combination of DFT and NEGF formalisms has been applied to the tunneling problem in the second part of this work. Such atomic level ab initio models take atomic level distortions automatically into account. An atomic scale model interface for the Si/SiO2 interface has been constructed and the tunneling currents through Si/SiO2/Si stack structures are calculated. The influence of single and double oxygen vacancies on the tunneling current is investigated. Atomic level distortions caused by a tensile or compression strains on SiO2 layer as well as their influence on the tunneling current are also investigated. / Die vorliegende Arbeit beschäftigt sich mit der Berechnung von Tunnelströmen in MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). Zu diesem Zweck wurde ein quantenmechanisches Modell, das auf der selbstkonsistenten Lösung der Schrödinger- und Poisson-Gleichungen basiert, entwickelt. Die Gleichungen sind im Rahmen der EMA gelöst worden. Die Lösung der Schrödinger-Gleichung unter offenen Randbedingungen führt zur Berechnung von Ladungsverteilung und Lebensdauer der Ladungsträger in den QBSs. Der Tunnelstrom wurde dann aus diesen Informationen ermittelt. Der Tunnelstrom wurde in verschiedenen Proben mit unterschiedlichen Oxynitrid Gatedielektrika berechnet und mit gemessenen Daten verglichen. Der Vergleich zeigte, dass die effektive Masse sich sowohl mit der Schichtdicke als auch mit dem Stickstoffgehalt ändert. Im zweiten Teil der vorliegenden Arbeit wurde ein atomistisches Modell zur Berechnung des Tunnelstroms verwendet, welche auf der DFT und NEGF basiert. Zuerst wurde ein atomistisches Modell für ein Si/SiO2-Schichtsystem konstruiert. Dann wurde der Tunnelstrom für verschiedene Si/SiO2/Si-Schichtsysteme berechnet. Das Modell ermöglicht die Untersuchung atom-skaliger Verzerrungen und ihren Einfluss auf den Tunnelstrom. Außerdem wurde der Einfluss einer einzelnen und zwei unterschiedlich positionierter neutraler Sauerstoffleerstellen auf den Tunnelstrom berechnet. Zug- und Druckspannungen auf SiO2 führen zur Deformationen in den chemischen Bindungen und ändern den Tunnelstrom. Auch solche Einflüsse sind anhand des atomistischen Modells berechnet worden.

Apresentamos neste trabalho um estudo do efeito da depleção do silício policristalino e da corrente de tunelamento em dispositivos com óxidos de porta finos. Utilizamos curvas características da capacitância em função da tensão de porta (C-V), para analisar a degradação causada por estes efeitos.Quanto ao efeito da depleção do silício policristalino a capacitância total na região de inversão apresenta uma redução conforme a concentração de dopantes do silício policristalino diminui. Este efeito foi observado em curvas C-V tanto de alta como de baixa freqüência, sendo esta última mais afetada. A corrente de tunelamento através do óxido de porta apresentou uma influência na largura da região de depleção no silício, que aumentou devido ao tunelamento de portadores do substrato. Como resultado, uma diminuição na capacitância do silício foi observada, fazendo a curva C-V diminuir na região de inversão. Quando considerado o efeito de depleção no silício policristalino junto com o efeito do tunelamento, observou-se que na região da porta houve um excesso de portadores, causando uma diminuição na região de depleção do silício policristalino. Neste caso a curva C-V sofreu uma maior redução, tornando-se difícil separar os dois efeitos. A curva C-V de baixa freqüência foi a mais atingida, pois como os portadores tem tempo de resposta, pode-se observar a influência da corrente de tunelamento nas cargas de inversão. Apresentamos ainda um novo método para a determinação da concentração de dopantes no substrato e no silício policristalino, através de curvas C-V de alta freqüência. Simulações numéricas bidimensionais e medidas experimentais foram utilizadas para validação do método. Os resultados obtidos indicam que o método proposto apresenta um grande potencial, tendo como principal vantagem a simplicidade de aplicação. / In this work we present the study of polysilicon depletion and the gate tunneling current effects in thin-gate oxide devices. Characteristic curves of capacitance as a function of the gate voltage (C-V) were used to analyze the degradation caused for these effects. Regarding the poly depletion effect, a reduction of the total capacitance in the inversion region was verified as the polysilicon doping concentration decreases. This effect was observed in C-V curves in high and low frequency, being the last one more affected. The gate tunneling current presented an influence on the width of the depletion silicon region, which increased due to the carriers tunneling from the substrate. As a result, a reduction in the silicon capacitance was observed, causing the C-V curve reduction in the inversion region. When the polysilicon depletion effect is considered together with the tunneling effect, it was observed that there is a carriers excess in the gate region, causing a reduction of the polysilicon depletion region width. In this case, the C-V curve suffered a larger reduction, making difficult to separate both effects. The most affected characteristic was the C-V curve at low frequency, due to existence of the carrier response time that allows observing the influence of the tunneling current in inversion charges. A new method for the determination of the doping concentration of substrate and polysilicon was also presented, through C-V curves at high frequency. Two-dimensional simulations and experimental measurements were used to validate the method. The obtained results indicate that the propose method present a higher potential, having as principal advantage the simplicity of application.

Apresentamos neste trabalho um estudo do efeito da depleção do silício policristalino e da corrente de tunelamento em dispositivos com óxidos de porta finos. Utilizamos curvas características da capacitância em função da tensão de porta (C-V), para analisar a degradação causada por estes efeitos.Quanto ao efeito da depleção do silício policristalino a capacitância total na região de inversão apresenta uma redução conforme a concentração de dopantes do silício policristalino diminui. Este efeito foi observado em curvas C-V tanto de alta como de baixa freqüência, sendo esta última mais afetada. A corrente de tunelamento através do óxido de porta apresentou uma influência na largura da região de depleção no silício, que aumentou devido ao tunelamento de portadores do substrato. Como resultado, uma diminuição na capacitância do silício foi observada, fazendo a curva C-V diminuir na região de inversão. Quando considerado o efeito de depleção no silício policristalino junto com o efeito do tunelamento, observou-se que na região da porta houve um excesso de portadores, causando uma diminuição na região de depleção do silício policristalino. Neste caso a curva C-V sofreu uma maior redução, tornando-se difícil separar os dois efeitos. A curva C-V de baixa freqüência foi a mais atingida, pois como os portadores tem tempo de resposta, pode-se observar a influência da corrente de tunelamento nas cargas de inversão. Apresentamos ainda um novo método para a determinação da concentração de dopantes no substrato e no silício policristalino, através de curvas C-V de alta freqüência. Simulações numéricas bidimensionais e medidas experimentais foram utilizadas para validação do método. Os resultados obtidos indicam que o método proposto apresenta um grande potencial, tendo como principal vantagem a simplicidade de aplicação. / In this work we present the study of polysilicon depletion and the gate tunneling current effects in thin-gate oxide devices. Characteristic curves of capacitance as a function of the gate voltage (C-V) were used to analyze the degradation caused for these effects. Regarding the poly depletion effect, a reduction of the total capacitance in the inversion region was verified as the polysilicon doping concentration decreases. This effect was observed in C-V curves in high and low frequency, being the last one more affected. The gate tunneling current presented an influence on the width of the depletion silicon region, which increased due to the carriers tunneling from the substrate. As a result, a reduction in the silicon capacitance was observed, causing the C-V curve reduction in the inversion region. When the polysilicon depletion effect is considered together with the tunneling effect, it was observed that there is a carriers excess in the gate region, causing a reduction of the polysilicon depletion region width. In this case, the C-V curve suffered a larger reduction, making difficult to separate both effects. The most affected characteristic was the C-V curve at low frequency, due to existence of the carrier response time that allows observing the influence of the tunneling current in inversion charges. A new method for the determination of the doping concentration of substrate and polysilicon was also presented, through C-V curves at high frequency. Two-dimensional simulations and experimental measurements were used to validate the method. The obtained results indicate that the propose method present a higher potential, having as principal advantage the simplicity of application.