A 2T2C ferroelectric memory cell consisting of a select transistor, a read transistor and two ferroelectric capacitors that can be operated either in FeRAM mode or in memristive ferroelectric tunnel junction mode is proposed. The two memory devices can be programmed individually. By performing a combined readout operation, the two stored bits of the memory cells can be combined to perform in-memory logic operation. Moreover, additional input logic signals that are applied as external readout voltage pulses can be used to perform logic operation together with the stored logic states of the ferroelectric capacitors. Electrical characterization results of the logic-in-memory (LiM) functionality is presented.

This thesis deals with concept of universal frequency filter by application of a switched-capacitor functional block. The concept is based on the theory of switched-capacitor circuits and the theory of a design of classical frequency filters. The printed circuit board was designed based on the filter connection developed by using a software Eagle. The filter was implemented as a laboratory product. This product has been revitalized and the frequency response of all types of filters has been measured. The measured parameters were compared with the parameters set out in the technical documentation of functional block.

Improved fabrication of poly(vinylindenefluoride)-hexafluoropropylene (PVDF-HFP) thin films is of particular interest due to the high electric coercivity found in the beta-phase structure of the thin film. We show that it is possible to obtain high-quality, beta-phase dominant PVDF-HFP thin films using a direct approach to Langmuir-Blodgett deposition without the use of annealing or additives. To improve sample quality, an automated Langmuir-Blodgett thin film deposition system was developed; a custom dipping trough was fabricated, a sample dipping mechanism was designed and constructed, and the system was automated using custom LabVIEW software. Samples were fabricated in the form of ferroelectric capacitors on substrates of glass and silicon, and implement a unique step design with a bottom electrode of copper with an aluminum wetting layer and a top electrode of gold with an aluminum wetting layer. Samples were then characterized using a custom ferroelectric measurement program implemented in LabVIEW with a Keithley picoammeter/voltage supply to confirm electric coercivity properties. Further characterization using scanning electron microscopy and atomic force microscopy confirmed the improvement in thin film fabrication over previous methods.

A 2TnC ferroelectric memory gain cell consisting of two transistors and two or more ferroelectric capacitors (FeCAP) is proposed. While a pre-charge transistor allows to access the single cell in an array, the read transistor amplifies the small read signals from small-scaled FeCAPs that can be operated either in FeRAM mode by sensing the polarization reversal current, or in ferroelectric tunnel junction (FTJ) mode by sensing the polarization dependent leakage current. The simultaneous read or write operation of multiple FeCAPs is used to realize compute-in-memory (CiM) algorithms that enable processing of data being represented by both, non-volatilely internally stored data and externally applied data. The internal gain of the cell mitigates the need for 3D integration of the FeCAPs, thus making the concept very attractive especially for embedded memories. Here we discuss design constraints of the 2TnC cell and present the proof-of-concept for realizing versatile (CiM) approaches by means of electrical characterization results.

Printing since many years has been a well-known high throughput technology for producing replications of graphic arts entities (texts, images, aesthetics, gloss and physical impressions) over large varieties of substrates which are dedicated for various needful applications like newspapers, magazines, posters, official documents, packages, braille, textiles, decorative articles and many more. Due to the fact, that printing is a liquid-solution based replication process, where basic ink and substrate are needed, it is now not only limited to printing of graphic arts. Whenever an ink is deposited over a defined substrate and the process can be multiplied, it can be termed as printing and once the final product contains a functionality other than graphic arts application, it can be called as “Printed Functionality”. Some examples for printed functionalities can be found in the following fields: A. Printed electronics (using inks having electronic properties); B. Printed micro-fluidics (using inks having polymeric and elastic properties for directive purposes); C. 3-Dimensional printing (using inks containing binding properties for developing three dimensional structures); D. Printed photonics (using inks having self-assembling properties for building-up symmetric micro-structures); E. Printed pyroelectrics (using inks containing thermally flammable properties); F. Printed ceramics (using inks with ceramic particles) and G. Printed optics and functional surfaces (using inks with transparency, absorbency and reflective properties). All these mentioned applications require functional inks which in turn exhibits some physical-chemical properties e.g. particle size, particle loading, fluid’s rheological properties etc. These properties determine the feasibility of the material’s deposition (in this case the functional inks) with a suitable printing technology. The inkjet printing technology among others has several advantages such as contactless deposition processability, digitalization (batch size one & turn-over time zero), user defined customization and adaptation, industrial relevance, minimal ink demand for R&Ds, freedom of substrate regularity and µm-scale print accuracy etc. Some of the imminent players in the inkjet printing technology market are Canon, Kodak, Hewlett Packard, Fujifilm Dimatix, Konica Minolta and XAAR. They provide print solutions from small to industrial scale printheads, printers, equipments and accessories for the realization of huge variety of application ideas. The inkjet is a versatile, but yet matured technology which finds its use in various application areas e.g. home office documentation, large format posters, variable data printing, security printing, textile printing, wallpapers, household articles, curved surfaces like bottles, printing over edible items, printing of elevated surfaces etc. And, hence there are several literatures published which show the use of the inkjet printing technology in the development of products for printed electronics. Some of the common examples are development of passive and active devices e.g. capacitors, resistors, thin-film-transistors, photovoltaics, sensors, circuits like logic gates for electronic switching, device arrays for detection purposes, point of care health applications, energy harvesting applications etc. But, the exploitation of the inkjet technology has not been intense enough to declare the industrial relevance of the technology to be utilized as a fabrication tool in the market. Meanwhile, all the researchers around the globe aim at a single goal, which is the development of “Proof of Concept” devices and applications. Thus, here in this dissertation the implementation of the inkjet printing technology as a digital fabrication tool is exploited to manufacture and up-scale the printed electronic products, which can show an industrial relevance to the commercial market. The main motivation why printed electronics is in great demand (scientific point of view) and has intensely emerged in the last decades, is because of the primary challenges faced in the fabrication process steps of the µ-electronics society. It is know that the classically fabricated µ-electronic products are in the market since long time due to their high reliability, consistent performance and defined applications in circuitry. But, what cannot be ignored is the involved fabrication steps promote several demerits such as the in-flexibility towards the fabrication process, material wastage, in-ability to up-scale into larger areas and huge quantities, and physical rigidity. Some of these mentioned problems are commonly seen e.g. spin coating, chemical vapor-phase deposition, physical vapor-phase deposition, atomic layer deposition and sputtering fabrication technologies. In this present dissertation, on the contrary, the challenges linked with the manufacturing process of the µ-electronic devices using the inkjet technology are focused and attempts are made to counteract them. Some of the foreseen challenges are: A. process workflow adaptation in device manufacturing; B. validation and evaluation of device performance; C. industrializing the inkjet technology (manufacturing µ-electronics in massive quantities); D. evaluating the fabrication yield of printed devices; D. Generating statistics regarding reliability and scalability; and E. demonstrating tolerances in electronic performances. These are definitely the challenges which must be overcome, and these key research points are addressed in the dissertation.

Indiana University-Purdue University Indianapolis (IUPUI) / Improved fabrication of poly(vinylindenefluoride)-hexafluoropropylene (PVDF-HFP) thin films is of particular interest due to the high electric coercivity found in the beta-phase structure of the thin film. We show that it is possible to obtain high-quality, beta-phase dominant PVDF-HFP thin films using a direct approach to Langmuir-Blodgett deposition without the use of annealing or additives. To improve sample quality, an automated Langmuir-Blodgett thin film deposition system was developed; a custom dipping trough was fabricated, a sample dipping mechanism was designed and constructed, and the system was automated using custom LabVIEW software. Samples were fabricated in the form of ferroelectric capacitors on substrates of glass and silicon, and implement a unique step design with a bottom electrode of copper with an aluminum wetting layer and a top electrode of gold with an aluminum wetting layer. Samples were then characterized using a custom ferroelectric measurement program implemented in LabVIEW with a Keithley picoammeter/voltage supply to confirm electric coercivity properties. Further characterization using scanning electron microscopy and atomic force microscopy confirmed the improvement in thin film fabrication over previous methods.

Micro-technology relies on a highly parallel fabrication of 2D electronic and/or microelectromechanical devices, where in most cases silicon wafers are used as substrates. In contrast 3D fabrication shows unique advantages, such as footprint reduction or the possibility to obtain additional functionalities. For example, in the case of a sensor, knowledge of the acceleration in all possible directions, the surrounding electric or magnetic field among other quantities can help to determine the exact position of an object in 3D space. To do that it is crucial to retrieve all components of a vector field, which requires at least one out of plane component. In other fields like integrated optics three dimensional structures can enhance the coupling efficiency with free space interactions. As such 3D micro-structures will be crucial for upcoming products and devices. A highly parallel fabrication is required to enable mass-adaption, self-assembly is an emerging technology that could deliver this purpose. Examples of 3D structures created by self-assembly include polyhedrons like cubes, pyramids or micro tubular structures such as tubes or spirals. Following a self assembly scheme, 3D devices would be created through the fabrication of standard 2D structures that are reshaped through a self-assembly step into a 3D object. In this thesis a novel dry release protocol was developed to roll-up strained nanomembranes from a silicon sacrificial layer employing dry fluorine chemistry. This way a wet release is totally circumvented thus preventing damage of the created structures due to turbulent flow or capillary forces. Additionally the developed process enabled the use of standard CMOS deposition and processing tools, leading to a high increase in yield and quality, with yields exceeding 99% for microtubes. Building on the developed technology various devices where fabricated, for example rolled-up micro capacitors at a wafer scale with an increased yield and a low spread of electrical characteristics. For the E12 industrial standard more than 90% of devices behaved within the required performance characteristics. Furthermore the yield and Q-factor of roll-up whispering gallery mode resonators was strongly improved, making it possible to self assemble 3D coupled photonic molecules, which showed a mode splitting exceeding the FSR, as well as hybrid supermodes at points of energy degeneracy.:Contents Bibliographic Record i List of Abbreviations vii List of Chemical Substances ix 1 Introduction 1 1.1 Microelectromechanical Systems 1 1.2 Strain Engineering 2 1.3 Rolled - Up Nanotechnology 3 1.4 Objective and Structure of the Thesis 5 2 Materials and Methods 9 2.1 Fabrication Techniques 9 2.1.1 Substrates 9 2.1.2 Plasma Enhanced Chemical Vapor Deposition 9 2.1.3 Dry Etching12 2.1.4 Deep Reactive Ion Etching 18 2.1.5 Atomic Layer Deposition 19 2.1.6 Lithography 20 2.2 Characterization Techniques 22 2.2.1 Strain Measurement 22 2.2.2 Ellipsometry 23 3 Dry Roll-Up of Strained Nanomembranes 25 3.1 Rolled - Up Nanotechnology 25 3.2 Fabrication 26 3.2.1 Release 29 3.3 Conclusions 33 4 Rolled-UpMicro Capacitors 35 4.1 Micro Capacitors 35 4.2 Fabrication 38 4.3 Characterization 39 4.4 Conclusion 41 5 Optical Micro-Cavities 43 5.1 Optical Micro Cavities 43 5.2 Theorectical Background 45 5.2.1 Quality - factor 49 5.2.2 FDTD 52 6 Optical Microtube Resonators 55 6.1 Optical Whispering Gallery Mode Microtube Resonators 55 6.2 Fabrication 57 6.3 Active Characterization 60 6.4 Conclusions 64 7 Photonic Molecules 65 7.1 Coupled Photonic Systems 65 7.2 Fabrication 68 7.3 Device Characterization 71 7.4 Multimode Waveguides 84 7.5 Conclusions 85 8 Conclusions and Outlook 87 8.1 Conclusions 87 8.2 Outlook 88 Bibliography 91 List of Figures 109 List of Tables 117 A Equipment 119 Cover Pages 121 Selbstständigkeitserklärung 123 Acknowledgements 125 List of Publications 127 List of Presentations 129 Curriculum Vitae 131

Three-level diode-clamped inverter is being widely used these days. Extensive research has been carried out on pulse width modulation (PWM) strategies for a three-level inverter. The most widely used PWM strategies are sine-triangle pulse width modulation (SPWM) and centered space vector pulse width modulation (CSVPWM). The influence of these PWM strategies on the DC-link capacitor current and voltage ripple is studied in this thesis. The sizing of the DC capacitor depends on value of the maximum RMS current flowing through it. In this work, an analytical expression for capacitor RMS current is derived as a function of operating conditions like modulation index, power factor angle of the load and peak load current. The worst case current stress on the capacitor is evaluated using the analytical expression. The capacitor RMS current is found to be the same in SPWM and CSVPWM schemes. The analytical expression is validated through simulations and experiments on a 3kVA MOSFET based three-level inverter. Harmonic analysis of the capacitor current is helpful in better evaluation of capacitor power loss. Therefore, harmonic analysis of the capacitor current is carried out, using the techniques of geometric wall model and double Fourier integral for SPWM and CSVPWM schemes. The theoretical predictions are validated through experiments. The capacitor RMS current is divided into low-frequency RMS current (where low frequency component is defined as a component whose frequency is less than half the switching frequency) and high-frequency RMS current. The capacitor voltage ripple is estimated analytically for SPWM and CSVPWM schemes, using the low-frequency and high-frequency capacitor RMS current. The voltage ripples due to SPWM and CSVPWM schemes are compared. It is found that the voltage ripple with SPWM is higher than that with CSVPWM. A simplified method to estimate the capacitor power loss, without the requirement of FFT analysis of capacitor current, is proposed. The results from this simplified method agree reasonably well with the results from the detailed method. A space vector based modulation scheme is proposed, which reduces the capacitor RMS current at high power factor angles. However, the proposed method leads to higher total harmonic distortion (THD) than CSVPWM. Simulation and experimental results, comparing CSVPWM and the proposed PWM, are presented.

The marine industry has increased its adoption of pure-electric, diesel-electric, and other non-traditional propulsion architectures to reduce ship emissions and fuel consumption. While these technologies can improve performance, the design of a propulsion system becomes challenging, given that no single technology is superior across all vessel types. Furthermore, even identical ships with different operating patterns may be better suited to different propulsion technologies. Addressing this problem, previous research has shown that if key elements of a vessel's operational pro file are known, simulation and optimization techniques can be employed to evaluate multiple propulsion architectures and result in a better propulsion system design and energy management strategy for a given vessel. While these studies have demonstrated the performance improvements that can be achieved from optimizing clean marine propulsion systems, they rely on vessel operational profiles obtained through physical measurement from existing ships. From a practical point of view, the optimization of a vessel's propulsion system needs to occur prior to a vessel's construction and thus precludes physical measurement. To this end, this thesis introduces a marine simulation platform for producing vessel operational profiles which enable propulsion system optimization during the ship design process. Core subsystem modules are constructed for simulating ship motions in 3 degrees of freedom and result in operational profile time-series, including propulsion power. Data is acquired from a benchmark vessel to validate the simulation. Results show the proposed approach strikes a balance between speed, accuracy, and complexity compared with other available tools. / Graduate

This thesis deals with the utilization of new principles of characterization of gate capacitances for sigma-delta modulators. Sigma-delta modulators are the integral part of sigma-delta analog-to-digital converters. The proposed new method is characterized by high resolution and modest requirements for laboratory equipment. It allows characterizing capacitances whose values are within the range which is used in sigma-delta modulators. The thesis contains description of the new method, the analysis of measurement accuracy and experimental results.