Les réseaux logistiques et les prestations qui y sont associées mobilisent des moyens ‎de ‎transport et de stockage pour répondre aux demandes des acteurs des chaînes ‎logistiques. ‎Toutefois, ces réseaux très majoritairement dédiés à un acteur et sont dès lors très ‎peu ‎interconnectés entre eux. De cette fragmentation résulte une difficulté de consolidation des ‎flux ‎et donc un manque d'efficience. Pour faire face à l'antagonisme croissant entre le besoin ‎en ‎fret atomisé et l'objectif de la Commission Européenne de réduire drastiquement les ‎émissions ‎de CO2, une amélioration majeure dans la structure des réseaux logistiques est ‎recherchée. On propose à ce titre ‎d'interconnecter les réseaux logistiques comme l'a fait ‎l'Internet Digital pour les réseaux ‎informatiques. Le premier objectif de la thèse est de ‎contribuer à la définition des premiers ‎éléments clefs nécessaires à l'interconnexion des réseaux ‎logistiques. A cette fin, cette thèse explicite, d'une part, les analogies possibles avec le monde ‎des réseaux informatiques, et, d'autre part, caractérise les transpositions réalisables aux ‎réseaux logistiques. En effet, comme cette thèse le montre, il existe de fortes similitudes entre ‎ces réseaux, en dépit de différences fondamentales dans la nature des objets qui y sont ‎mouvementés.Au-delà des concepts de l'Internet Physique et des méthodes proposées, aucune ‎démonstration ‎du potentiel de l'interconnexion des réseaux logistiques n'a encore été réalisée. ‎C'est ‎précisément le second objectif de ce travail que d'évaluer les enjeux à cette approche. ‎Pour ce ‎faire des flux réels de la grande consommation en France ont été traités avec ‎différents ‎protocoles de transport et suivants plusieurs scénarios, révélant des résultats ‎encourageants ‎avec des gains en émissions de CO2, coûts, etc. S'agissant d'un premier ‎travail ‎dans ce domaine de l'interconnexion des réseaux logistiques, le modèle de simulation ‎fournit de ‎nombreuses nouvelles pistes de recherche. / Logistics networks intensely use transportation means and storage facilities to respond to ‎supply chain's demands. However, these networks are overwhelmingly dedicated to an actor ‎and are therefore poorly interconnected. This fragmentation explains the lack of consolidation ‎and thus efficiency. To cope with the seeming antagonism between atomized freight and the ‎objective of the European Commission to drastically reduce CO2 emissions, a major ‎improvement in supply networks is sought. We propose then to interconnect ‎logistics networks ‎like the Digital Internet did with computer networks. The first objective of this thesis is to ‎contribute to the definition of the first key elements of logistics networks interconnection‎. To this ‎purpose, ‎we explore the possible transpositions between computer networks, in ‎particular ‎Internet, and ‎logistic networks. In fact, there are strong similarities between these ‎networks in ‎spite of the basic differences in the type of objects.Beyond Physical Internet concepts and proposed methods, no demonstration of the potential of ‎interconnected logistics networks has been carried out. This is precisely the second objective of ‎this work to assess the associated stakes. To reach this goal, we use a set of actual flows from ‎the Fast Moving Consumer Goods sector (FMCG) in France. Various transportation protocols ‎and scenarios are tested, revealing encouraging with gains in CO2 emissions, cost, and so ‎forth. As this is a first work in the field of interconnected logistics networks, the simulation ‎model suggests many further research avenues.

Independent de la performance remarquable accomplie par la logistique d’aujourd’hui, les réseaux actuels sont majoritairement dédiés à un acteur et donc très peu interconnectés. Cette fragmentation conduit une difficulté de mutualisation des flux et dès lors à une efficacité limitée. Ces organisations dédiées et hétérogènes sont de plus en plus challengées par les nouveaux défis d’aujourd’hui posés à l’efficacité, l’efficience et la résilience. Pour répondre à cet antagonisme, un innovant concept logistique - l’Internet Physique (PI) - a été proposé. Dans ce système, les infrastructures et les moyens de transport peuvent être organisés de façon dynamique et attribués à court ou à long terme en fonction des besoins. Par conséquent, les décisions des opérations logistiques peuvent être prises de façon dynamique, agile, et donc de manière plus optimale. Cette thèse concentre les perspectives de PI concernant la gestion de stocks et du transport par rapport aux défis de l’efficacité et de la résilience.Comme l’étude de l’efficacité de PI par rapport au transport a été déjà effectuée, le premier objectif de cette recherche est d’explorer les potentiels de l’interconnexion des réseaux dans la gestion de stocks, qui n’a par encore été adressé. À cette fin, nous examinons d'abord les trois nouvelles pratiques apportées par PI : 1) les stocks distribués à proximité des clients finaux; 2) le transbordement de stocks entre les hubs; 3) de multiples options dynamiques de sélection de la source pour chaque commande. Deux modèles de gestion de stocks correspondants sont proposés. Cette étude sert de guide pour des décisions de stockage pour les vendeurs dans un tel système logistique ouvert.Après l’analyse d’efficacité de PI, la deuxième partie de cette thèse concerne la résilience des modèles de stockage et de transport dans PI confrontés à des interruptions dans la chaîne logistique. On a étendu les modèles de stockage et de transport avec interruptions imprévisibles dans les infrastructures telles que l’usine ou les hubs. Des stratégies différentes sont développées pour atténuer les risques de perturbation des flux. Des études numériques sont effectuées pour évaluer la performance des modèles proposés.En résumé, cette recherche est la première qui étudie le potentiel de l’Internet Physique pour la gestion de stock et la résilience de ce système. D’après les résultats, il n’y a aucun doute que le PI change le design de chaîne logistique d’aujourd’hui et améliore la performance de gestion de logistique à la fois en efficience et en résilience. / Irrespective of significant performance achieved, today’s logistics networks are overwhelmingly dedicated to an actor and therefore poorly interconnected. This fragmentation exhibits inevitable inefficiency and needs to be changed in respond to today’s new arising challenges in efficiency and resilience. To solve this antagonism, an innovative concept - Physical Internet (PI) - has been proposed which is a fully interconnected, open, dynamic logistics system. In such a system, the facilities and means of transportation can be dynamically organized and allocated in the short-term or long-term according to the economic environment. As a result, decisions can be made dynamically, agilely, and thus optimally. This thesis studies the perspectives of the PI to inventory management and transportation regarding the challenges in efficiency and resilience.As the efficiency of the PI to transportation has been carried out in literature, the first objective of this thesis is to explore the potentials of the PI to inventory management. To this end, we firstly qualitatively examine the new practices brought by the PI and conclude three main characteristics: 1) Distributed stocks near end customers; 2) Transshipment of inventories; and 3) multiple dynamic source options. Corresponding inventory models and solutions are proposed and evaluated with numerical experiments in Fast Moving Consumer Goods (FMCG). This part of study gives a guideline for the vendors applying the PI to make inventory decisions in such an open logistic system.The second objective is to analyze the resilience of the proposed PI enabled inventory and transportation model confronted to disruptions. The proposed inventory and transportation model are extended with different disruptions at facilities including plants and hubs. Different disruption strategies are developed. Numerical studies in FMCG are carried out.In a word, this research investigates the inventory management in the PI and the resilience of PI enabled logistics models. It is the first time such a work is done and it should be upfront. From the results of studies, there is no doubt that the PI changes today’s supply chains design and improve the performance of supply chain management both in efficiency, effectiveness and resilience.

Submitted by Emanuel Varela Cardoso (emanuel.varela@ufcg.edu.br) on 2018-08-27T19:35:43Z No. of bitstreams: 1 AYSLAN CAISSON NORÕES MAIA – TESE (PPGEEI) 2016.pdf: 13981392 bytes, checksum: 9ea0aa715fdf8400283e71381b49a21b (MD5) / Made available in DSpace on 2018-08-27T19:35:43Z (GMT). No. of bitstreams: 1 AYSLAN CAISSON NORÕES MAIA – TESE (PPGEEI) 2016.pdf: 13981392 bytes, checksum: 9ea0aa715fdf8400283e71381b49a21b (MD5) Previous issue date: 2016-02-22 / Nesse trabalho são apresentadas contribuições na área de identificação de sistemas representados em espaço de estados. É proposta uma metodologia completa para estimação de modelos que representem as principais dinâmicas de proessos industriais. O fluxo natural dos procedimentos de identificação consiste da coleta experimental dos dados, seguido pela esolha dos modelos candidatos e da utilização de um critério de ajuste que selecione o melhor modelo possível. Nesse sentido é proposta uma metodologia para estimativa de modelos em espaço de estados, utilizando excitações pulsadas. A abordagem desenvolvida combina algoritmos precisos e eficientes com experimentos rápidos, adequados a ambientes industriais. O projeto das excitações é realizado em tempo real, por meio de informações coletadas em um curto experimento inicial, baseado em uma única oscilação de uma estrutura realimentada por um relé. Esse mecanismo possibilita uma estimativa preliminar do atraso e da constante de tempo dominante do sistema. O método de identificação proposto é baseado na teoria de realizações de Kalman. É apresentada uma reformulação do problema de realizações clássico, para comportar sinais de entrada pulsados. Essa abordagem se mostra computacionalmente e cliente, assim como apresentar resultados semelhantes aos métodos de benchmark. A técnica possibilita também a estimativa de atrasos de transporte e a inserção de conhecimentos prévios por meio de um problema de otimização com restrições via LMI Linear Matrix Inequalities. Em muitos casos, somente as caraterísticas principais dos sistema são relevantes em um projeto de sistema de controle. Portanto é proposta uma técnica para obtenção de modelos de primeira ordem com atraso, a partir da redução de modelos balanceados em espaço de estados. Por fim, todas as contribuições discutidas nesse trabalho de teses não validadas em uma série de plantas experimentais em salas de laboratório. Plantas essas, projetadas e construídas com o intuito de emular o cotidiano operacional de instalações industriais reais. / Static converters are a widely used equipment in power systems to control the electrical energy low between sources and loads. In this context, it is observed a demand for converters topologies that generate high quality waveforms and are capable of supplying loads with ever larger powers. In high power applications such as industrial and power systems, the development of a special class of converters topologies, denominated multilevel converters, has been widely recognized as a viable solution to overcome the operational limits of semiconductor devices. In this work are developed and analyzed multilevel structures of type DC-AC applied to the six-phase machines drives and of type AC-DC-AC feeding singlephase and three-phase loads. These topologies are obtained by interconnecting two-level converters modules in order to optimize the system: reduction of losses in the semiconductor devices, harmonic distortion of the signals and ratings of voltage and/or current in the power switches. For this investigation were performed steady state analyzes, where the operatinglimits of the structures to the imposed control conditions and the behavior of the fundamental component of voltage and current are evaluated. In addition, for each investigated topology, were developed: dynamic models, PWM techniques, control strategies, simulation results and experimental results. The impact of this optimization is quanti ed by calculating the THD and WTHD of the current and voltage signals generated by the converter and by estimating losses in the semiconductor devices. Finally, a comparative study is done using conventional converters as reference in order to evaluate the performance of the proposed topologies

Les inductances et interconnexions des composants passifs intégrés pour la téléphonie mobile, sont sujettes à des défaillances dues à l’électromigration et l’auto-échauffement. L’électromigration n’est pas un risque majeur, au regard des grandes dimensions de cuivre de la technologie étudiée et de l’application. L’auto-échauffement est, en revanche, le principal phénomène qui limite le choix des dimensions des inductances et interconnexions lors de leurs conceptions.L’effet Joule pour les interconnexions et les inductances, a été étudié par le biais de caractérisations et de simulations électrothermiques. La méthodologie des plans d’expériences a été utilisée afin de modéliser le comportement électrothermique des inductances et des interconnexions. Un modèle prédictif de l’auto-échauffement en fonction des dimensions et de l’intensité, a été déterminé permettant d’étudier et de déterminer l’influence de chaque facteur dimensionnel, en régime continu. En radiofréquence, une méthodologie de mesure de l’auto-échauffement a été déterminée permettant sa caractérisation sur des composants sur plaquette. Une corrélation entre les régimes continus et alternatifs ne donnant pas de résultat concluant, une méthodologie de couplage faible, entre un simulateur électromagnétique et électrothermique a été effectuée, permettant la simulation du phénomène d’auto-échauffement sous contrainte radiofréquentielle. / Electrothermal and electromigration failure are likely to occur on copper inductor and interconnection in integrated passive devices for wireless telephony application. Electromigration is not a concern considering the high thickness of the copper and the application but the Joule heating is the main restriction on the dimensions during the component design. Joule heating on interconnections and inductors has been studied by electrothermal characterization and simulation. We have shown that Joule heating depends of several parameters such as material layers parameters and component dimensions. Design of experiments methodology has been used in order to model the inductor and interconnection electrothermal behavior. A self-heating predictive model has been determined allowing the study and the determination of dimensions impact in direct current.In radiofrequency, a self-heating measurement methodology has been determined allowing its characterization at wafer level. A correlation between direct current and radiofrequency is not satisfactory and a weak coupling between an electromagnetic and electrothermal simulator has been performed, providing the self-heating simulation under radiofrequency stress.

Multi-Processor System-on-Chip (MPSoC) possui vários processadores, em um único chip. Várias aplicações podem ser executadas de maneira paralela ou uma aplicação paralelizável pode ser particionada e alocada em cada processador, a fim de acelerar a sua execução. Um problema em MPSoCs é a comunicação entre os processadores, necessária para a execução destas aplicações. Neste trabalho, propomos uma arquitetura de rede de interconexão baseada na topologia crossbar, com memória compartilhada. Esta arquitetura é parametrizável, possuindo N processadores e N módulos de memórias. A troca de informação entre os processadores é feita via memória compartilhada. Neste tipo de implementação cada processador executa a sua aplicação em seu próprio módulo de memória. Através da rede, todos os processadores têm completo acesso a seus módulos de memória simultaneamente, permitindo que cada aplicação seja executada concorrentemente. Além disso, um processador pode acessar outros módulos de memória, sempre que necessite obter dados gerados por outro processador. A arquitetura proposta é modelada em VHDL e seu desempenho é analisado através da execução paralela de uma aplicação, em comparação à sua respectiva execução sequencial. A aplicação escolhida consiste na otimização de funções objetivo através do método de Otimização por Enxame de Partículas (Particle Swarm Optimization - PSO). Neste método, um enxame de partículas é distribuído igualmente entre os processadores da rede e, ao final de cada interação, um processador acessa o módulo de memória de outro processador, a fim de obter a melhor posição encontrada pelo enxame alocado neste. A comunicação entre processadores é baseada em três estratégias: anel, vizinhança e broadcast. Essa aplicação foi escolhida por ser computacionalmente intensiva e, dessa forma, uma forte candidata a paralelização. / Multi-Processor System-on-Chip (MPSoC) has multiple processors in a single chip. Multiple applications can be executed in parallel or a parallelizable application can be partitioned and allocated to each processor in order to accelerate their execution. One problem in MPSoCs is the communication between the processors required to implement these applications. In this work, we propose the architecture of an interconnection network based on the crossbar topology, with shared memory. This architecture is parameterizable, having N processors and N memory modules. The exchange of information between processors is done via shared memory. In this type of implementation each processor executes its application stored in its own memory module. Through the network, all processors have complete access to their own memory modules simultaneously allowing each application to run concurrently. Moreover, a processor can access other memory modules, whenever it needs to retrieve data generated by another processor. The proposed architecture is modelled in VHDL and its performance is analysed by the execution of a parallel aplication, in comparison to its sequencial one. The chosen application consists of optimizing some objetive functions by using the Particle Swarm Optimization method. In this method, particles of a swarm are distributed among the processors and, at the end of each iteration, a processor accesses the memory module of another one in order to obtain the best position found in the swarm. The communication between processors is based on three strategies: ring, neighbourhood and broadcast. This application was chosen due to its computational intensive characteristic and, therefore, a strong candidate for parallelization.

L'utilisation de la troisième dimension peut entraîner une réduction significative de la puissance et de la latence moyenne du trafic dans les réseaux sur puce (Network-on-Chip). La technologie des vias à travers le substrat (ou Through-Silicon Via) est la technologie la plus prometteuse pour l'intégration 3D, car elle offre des liens verticaux courts qui remédient au problème des longs fils dans les NoCs-2D. Les TSVs sont cependant énormes et les processus de fabrication sont immatures, ce qui réduit le rendement des systèmes sur puce à base de NoC-3D. Par conséquent, l'idée de réseaux sur puce 3D partiellement connectés verticalement a été introduite pour bénéficier de la technologie 3D tout en conservant un haut rendement. En outre, de tels réseaux sont flexibles, car le nombre, l'emplacement et l'affectation des liens verticaux dans chaque couche peuvent être décidés en fonction des exigences de l'application. Cependant, ce type de réseaux pose un certain nombre de défis : Le routage est le problème majeur, car l'élimination de certains liens verticaux fait que l'on ne peut utiliser les algorithmes classiques qui suivent l'ordre des dimensions. Pour répondre à cette question nous expliquons et évaluons un algorithme de routage déterministe appelé “Elevator First”, qui garanti d'une part que si un chemin existe, alors on le trouve, et que d'autre part il n'y aura pas d'interblocages. Fondamentalement, la performance du NoC est affecté par a) la micro architecture des routeurs et b) l'architecture d'interconnexion. L'architecture du routeur a un effet significatif sur la performance du NoC, à cause de la latence qu'il induit. Nous présentons la conception et la mise en œuvre de la micro-architecture d'un routeur à faible latence implantant​​l'algorithme de routage Elevator First, qui consomme une quantité raisonnable de surface et de puissance. Du point de vue de l'architecture, le nombre et le placement des liens verticaux ont un rôle important dans la performance des réseaux 3D partiellement connectés verticalement, car ils affectent le nombre moyen de sauts et le taux d'utilisation des FIFOs dans le réseau. En outre, l'affectation des liens verticaux vers les routeurs qui n'ont pas de ports vers le haut ou/et le bas est une question importante qui influe fortement sur les performances. Par conséquent, l'exploration architecturale des réseaux sur puce 3D partiellement connectés verticalement est importante. Nous définissons, étudions et évaluons des paramètres qui décrivent le comportement du réseau, de manière à déterminer le placement et l'affectation des liens verticaux dans les couches de manière simple et efficace. Nous proposons une méthode d'estimation quadratique visantà anticiper le seuil de saturation basée sur ces paramètres. / Utilization of the third dimension can lead to a significant reduction in power and average hop-count in Networks- on-Chip (NoC). TSV technology, as the most promising technology in 3D integration, offers short and fast vertical links which copes with the long wire problem in 2D NoCs. Nonetheless, TSVs are huge and their manufacturing process is still immature, which reduces the yield of 3D NoC based SoC. Therefore, Vertically-Partially-Connected 3D-NoC has been introduced to benefit from both 3D technology and high yield. Moreover, Vertically-Partially-Connected 3D-NoC is flexible, due to the fact that the number, placement, and assignment of the vertical links in each layer can be decided based on the limitations and requirements of the design. However, there are challenges to present a feasible and high-performance Vertically-Partially-Connected Mesh-based 3D-NoC due to the removed vertical links between the layers. This thesis addresses the challenges of Vertically-Partially-Connected Mesh-based 3D-NoC: Routing is the major problem of the Vertically-Partially-Connected 3D-NoC. Since some vertical links are removed, some of the routers do not have up or/and down ports. Therefore, there should be a path to send a packet to upper or lower layer which obviously has to be determined by a routing algorithm. The suggested paths should not cause deadlock through the network. To cope with this problem we explain and evaluate a deadlock- and livelock-free routing algorithm called Elevator First. Fundamentally, the NoC performance is affected by both 1) micro-architecture of routers and 2) architecture of interconnection. The router architecture has a significant effect on the performance of NoC, as it is a part of transportation delay. Therefore, the simplicity and efficiency of the design of NoC router micro architecture are the critical issues, especially in Vertically-Partially-Connected 3D-NoC which has already suffered from high average latency due to some removed vertical links. Therefore, we present the design and implementation the micro-architecture of a router which not only exactly and quickly transfers the packets based on the Elevator First routing algorithm, but it also consumes a reasonable amount of area and power. From the architecture point of view, the number and placement of vertical links have a key role in the performance of the Vertically-Partially-Connected Mesh-based 3D-NoC, since they affect the average hop-count and link and buffer utilization in the network. Furthermore, the assignment of the vertical links to the routers which do not have up or/and down port(s) is an important issue which influences the performance of the 3D routers. Therefore, the architectural exploration of Vertically-Partially-Connected Mesh-based 3D-NoC is both important and non-trivial. We define, study, and evaluate the parameters which describe the behavior of the network. The parameters can be helpful to place and assign the vertical links in the layers effectively. Finally, we propose a quadratic-based estimation method to anticipate the saturation threshold of the network's average latency.

Submitted by Bruna Rodrigues (bruna92rodrigues@yahoo.com.br) on 2016-10-04T14:34:19Z No. of bitstreams: 1 TeseSEAC.pdf: 3684768 bytes, checksum: a136420f3341c6db3a9b1a868c33424a (MD5) / Approved for entry into archive by Marina Freitas (marinapf@ufscar.br) on 2016-10-14T14:23:42Z (GMT) No. of bitstreams: 1 TeseSEAC.pdf: 3684768 bytes, checksum: a136420f3341c6db3a9b1a868c33424a (MD5) / Approved for entry into archive by Marina Freitas (marinapf@ufscar.br) on 2016-10-14T14:23:53Z (GMT) No. of bitstreams: 1 TeseSEAC.pdf: 3684768 bytes, checksum: a136420f3341c6db3a9b1a868c33424a (MD5) / Made available in DSpace on 2016-10-14T14:24:02Z (GMT). No. of bitstreams: 1 TeseSEAC.pdf: 3684768 bytes, checksum: a136420f3341c6db3a9b1a868c33424a (MD5) Previous issue date: 2016-04-29 / Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) / The purpose of this thesis was to analyze the emergence of industrial practices of PET recycling in Brazil. A predominantly qualitative research based on the principles of reflexive sociology proposed by Pierre Bourdieu was developed. Theoretical tools proposed by this author were combined with the ones of the Strategic Action Fields approach and with insights of the pragmatic sociology of critique. Primary and secondary data were collected, analyzed and articulated in the historical narrative presented here. We argue that the configuration of this market was conditioned by moral aspects associated with the emergence of the environmentalism and also by structural aspects of Brazilian society. The joint operation of these macro structures explained the rise of the "Brazilian model of recycling", based on a compromise between economic and environmental objectives, usually embraced by recycling, and the pursuit of "social inclusion" of recyclable material collectors, who traditionally accept working in the informal waste collection and constitute the foundations of recycling chains in the country. The dynamics of soft drinks and municipal solid waste management sectors was also influenced decisively the emergence and expansion of PET recycling practices. These practices appeared mainly in the textile, in the paint and resins and PET industries as part of the strategies of the companies to reduce costs. We found that companies tend to use more intensely moral justifications associated with recycling in periods of instability. Additionally to the practical understanding about this recycling market, this study helped to build connections between influential contemporary sociological approaches of organizational studies and economic sociology and offered novel ways to use their theoretical tools in empirical research. We highlight the contribution to understanding the connections between social and moral structures and to make sense of the dynamics relationships of multiple fields / O objetivo da pesquisa foi analisar a emergência das práticas industriais de reciclagem de PET no Brasil. Realizamos uma pesquisa predominantemente qualitativa com base nos princípios da sociologia reflexiva propostos por Pierre Bourdieu. Combinando as ferramentas teóricas relacionais propostas por esse autor, com as das abordagens dos Campos da Ação Estratégica e da sociologia pragmática da crítica, dados primários e secundários foram levantados, analisados e articulados na narrativa histórica aqui apresentada. Argumentamos que a construção desse mercado é condicionada tanto por aspectos morais associados ao surgimento do que é conhecido como ambientalismo quanto por aspectos estruturais da sociedade brasileira que influenciam decisivamente sua configuração. A operação conjunta desses mecanismos é que possibilita explicar a ascensão do chamado “modelo brasileiro de reciclagem”, baseado em um compromisso entre objetivos econômicos e ambientais, que, em geral, estão abarcados na reciclagem, e a busca pela “inclusão social” dos catadores de materiais recicláveis, tradicionalmente “dispostos” a trabalhar com a coleta informal dos resíduos e que formam a base das cadeias de reciclagem no país. As dinâmicas da indústria de refrigerantes e do setor de gestão de resíduos sólidos municipais também influenciaram decisivamente o surgimento e expansão das práticas de reciclagem, que passaram a ocorrer, sobretudo, nas indústrias têxtil, de tintas e resinas e do PET como parte das estratégias das empresas para reduzir custos. Verificamos que essas empresas tendem a se utilizar mais intensamente das justificativas morais associadas à reciclagem em períodos de instabilidade dos seus referidos campos. Além da compreensão prática dos mercados de reciclagem, o estudo revelou conexões entre as estruturas sociais e as estruturas ideais e possibilitou a compreensão da dinâmica da relação entre campos.

En réponse à la demande croissante de performance par une grande variété d’applications (exemples : modélisation financière, simulation sub-atomique, bio-informatique, etc.), les systèmes informatiques se complexifient et augmentent en taille (nombre de composants de calcul, mémoire et capacité de stockage). L’accroissement de la complexité de ces systèmes se traduit par une évolution de leur architecture vers une hétérogénéité des technologies de calcul et des modèles de programmation. La gestion harmonieuse de cette hétérogénéité, l’optimisation des ressources et la minimisation de la consommation constituent des défis techniques majeurs dans la conception des futurs systèmes informatiques.Cette thèse s’adresse à un domaine de cette complexité en se focalisant sur les sous-systèmes à mémoire partagée où l’ensemble des processeurs partagent un espace d’adressage commun. Les travaux porteront essentiellement sur l’implémentation d’un protocole de cohérence de cache et de consistance mémoire, sur une architecture extensible et sur la méthodologie de validation de cette implémentation.Dans notre approche, nous avons retenu les processeurs 64-bits d’ARM et des co-processeurs génériques (GPU, DSP, etc.) comme composants de calcul, les protocoles de mémoire partagée AMBA/ACE et AMBA/ACE-Lite ainsi que l’architecture associée « CoreLink CCN » comme solution de départ. La généralisation et la paramètrisation de cette architecture ainsi que sa validation dans l’environnement de simulation Gem5 constituent l’épine dorsale de cette thèse.Les résultats obtenus à la fin de la thèse, tendent à démontrer l’atteinte des objectifs fixés / In response to the growing demand for performance by a wide variety of applications (eg, financial modeling, sub-atomic simulation, bioinformatics, etc.), computer systems become more complex and increase in size (number of computing components, memory and storage capacity). The increased complexity of these systems results in a change in their architecture towards a heterogeneous computing technologies and programming models. The harmonious management of this heterogeneity, resource optimization and minimization of consumption are major technical challenges in the design of future computer systems.This thesis addresses a field of this complexity by focusing on shared memory subsystems where all processors share a common address space. Work will focus on the implementation of a cache coherence and memory consistency on an extensible architecture and methodology for validation of this implementation.In our approach, we selected processors 64-bit ARM and generic co-processor (GPU, DSP, etc.) as components of computing, shared memory protocols AMBA / ACE and AMBA / ACE-Lite and associated architecture "CoreLink CCN" as a starting solution. Generalization and parameterization of this architecture and its validation in the simulation environment GEM5 are the backbone of this thesis.The results at the end of the thesis, tend to demonstrate the achievement of objectives

Résumé des travaux de thèse Frédéric DRILLETThèse intitulée : Conception d'un front-end RF de bande passante [20-40] GHz pour un système de communication sur puce utilisant un réseau d'interconnexions RF-NoC.Technologie : NXP Qubic4XI (BiCMOS SiGe:C 250 nm)Résumé :La tendance actuelle dans la conception de systèmes sur puces (SoC) est d'intégrer un très grand nombre d'unités de calcul et de mémoires sur une seule puce. Les possibilités de cette intégration poussée permettent aujourd'hui d'envisager le développement d'une électronique offrant une multitude de services. Néanmoins ces architectures posent de nouveaux challenges concernant les interconnexions entre les unités de calcul. En effet, pour les futures générations technologiques, la mise à l'échelle impactera lourdement les performances des interconnexions globales en termes de débit, latence et consommation. Afin de répondre à la problématique des communications intra-puces, un certain nombre de technologies ont été investiguées comme les technologies d’intégration 3D, les architectures utilisant l'optique ou la RF. L'approche RF pour les communications entre les unités de calcul d’un même circuit de type NoC (Network On Chip) présente l'avantage d'une bonne compatibilité avec les technologies CMOS silicium et peut également répondre aux besoins de communication dans les structures 3D.Cette thèse s'inclue dans le projet ANR WiNoCoD qui propose un réseau d'interconnexion RF-NoC utilisant l'OFDMA. Elle porte sur la conception d'un front-end RF générique permettant de transmettre et de recevoir toute la bande passante soit [20-40] GHz. Cette généricité permet une allocation dynamique des porteuses sans reconfiguration du hardware. On utilise la technologie QubiC4XI de NXP Semiconductors, qui est une technologie BiCMOS SiGe:C 250 nm, afin de vérifier la faisabilité d'un tel système avec des moyens actuels. Ce front-end doit être large bande puisqu'il a une bande passante de 20 GHz entre 20 et 40 GHz. Il doit également consommer le moins possible puisqu'il a pour but d'être intégré dans un système contenant plusieurs NoC et qui est donc très énergivore. Il doit également être compact pour ne pas occuper plus de surface que la partie numérique.Cette thèse inclue la conception des éléments composant le front-end, les résultats de simulation et de mesure, ainsi que les performances du système complet. / Frédéric DRILLET thesis work summaryThesis entitled: Design of a [20-40] GHz RF front-end for an on-chip RF-NoC communication system.Technology: NXP Qubic4XI (BiCMOS SiGe:C 250 nm)Summary:A current trend regarding System On Chip design is to include a very big amount of processors and memories on a single chip. Today, these integrated circuits allow to consider an electronic supplying a multitude of services. However, these architectures are challenging in terms of connection between processing units. It could indeed lead to data rate, latency and consumption degradation. In order to overcome these issues technological solutions were investigated such as 3D integration, or optic and RF networks. An RF Network on Chip (NoC) is compatible with silicon CMOS technologies and with 3D structures.This thesis is a part of the ANR project called WiNoCoD (Wired Network on Chip reconfigurable on Demand) which offers an OFDMA RF-NoC. The main work presents a generic RF front-end allowing to transmit and receive the whole [20-40] GHz bandwidth. This generic architecture allows a dynamic allocation of OFDMA subcarriers without any hardware reconfiguration. The technology used is the NXP Semiconductor QubiC4XI which is a BiCMOS SiGe:C 250 nm technology. A current technology is used to check the feasibility of such a system today. This front-end has to be wideband. The power consumption has to be as low as possible as well, as it is going to be integrated in a system containing several NoCs that consume already a lot of power. The system has to be very compact, its total area has to be smaller than the digital part.This thesis includes the design of the front end, the simulation and measurement results and the performance of the full system.

Standard crystalline silicon photovoltaic (PV) modules are designed to continuously convert solar energy into electricity for 25 years. However, the continual generation of electricity by the PV modules throughout their designed service life has been a concern. The key challenge has been the untimely fatigue failure of solder interconnections of solar cells in the modules due to accelerated thermo-mechanical degradation. The goal of this research is to provide adequate information for proper design of solar cell solder joint against fatigue failure through the study of cyclic thermo-mechanical stresses and strains in the joint. This is carried-out through finite element analysis (FEA) using ANSYS software to develop the solar cell assembly geometric models followed by simulations. Appropriate material constitutive model for solder alloy is employed to predict number of cycles to failure of solder joint, hence predicting its fatigue life. The results obtained from this study indicate that intermetallic compound thickness (TIMC); solder joint thickness (TSJ) and width (WSJ) have significant impacts on fatigue life of solder joint. The impacts of TIMC and TSJ are such that as the thicknesses increases solder joint fatigue life decreases. Conversely, as solder joint width (WSJ) increases, fatigue life increases. Furthermore, optimization of the joint is carried-out towards thermo-mechanical reliability improvement. Analysis of results shows the design with optimal parameter setting to be: TIMC -2.5μm, TSJ -20μm and WSJ -1000μm. In addition, the optimized model has 16,264 cycles to failure which is 18.82% more than the expected 13,688 cycles to failure of a PV module designed to last for 25 years.