Dans le cas des installations photovoltaïques, l’onduleur est le premier élément défaillant dont il est difficile d’anticiper la panne, et peu d’études ont été faites sur la fiabilité de ce type de convertisseur. L'objectif de cette thèse est de proposer des outils et méthodes en vue d'étudier le vieillissement des modules de puissance dans ce type d'application en se focalisant sur les phénomènes de dégradation liés à des aspects thermomécaniques. En règle générale, le vieillissement accéléré des modules de puissance est effectué dans des conditions aggravées de courant (Cyclage Actif) ou de température (Cyclage Passif) pour accélérer les processus de vieillissement. Malheureusement, en appliquant ce type de vieillissement accéléré, des mécanismes de défaillances qui ne se produisent pas dans la vraie application peuvent être observés et, inversement, d'autres mécanismes qui se produisent habituellement peuvent ne pas apparaître. La première partie de la thèse se focalise donc sur la mise en place d'une méthode de vieillissement accéléré des composants semi-conducteurs des onduleurs photovoltaïques. Cela est fait en s’appuyant sur l’analyse des profils de mission du courant efficace de sortie des onduleurs et de la température ambiante, extraits des centrales photovoltaïques situées au sud de la France sur plusieurs années. Ces profils sont utilisés pour étudier les dynamiques du courant photovoltaïque, et sont introduites dans des modèles numériques pour estimer les pertes et les variations de la température de jonction des semi-conducteurs utilisés dans les onduleurs, en utilisant l’algorithme de comptage de cycles "Rainflow". Cette méthode est ensuite mise en œuvre dans deux bancs expérimentaux. Dans le premier, les composants sous test sont des modules IGBT. Les composants sont mis en œuvre dans un banc de cyclage utilisant la méthode d'opposition et mettant en œuvre le profil de vieillissement défini précédemment. Un dispositif in-situ de suivi d'indicateurs de vieillissement (impédance thermique et résistance dynamique) est également proposé et évalué. Le deuxième banc est consacré à l'étude de modules de puissance à base de MOSFET SiC. Le vieillissement est effectué dans les mêmes conditions que pour les modules IGBT et de nombreux indicateurs électriques sont monitorés mais, cette fois ci, en extrayant les composants de l'onduleur de cyclage. Les résultats obtenus ont permis de déterminer des indicateurs de vieillissement d’IGBT et de MOSFET SiC utilisés dans un onduleur photovoltaïque / In the case of photovoltaic installations, the DC/AC inverter has the highest failure rate, and the anticipation of its breakdowns is still difficult, while few studies have been done on the reliability of this type of inverter. The aim of this PhD is to propose tools and methods to study the ageing of power modules in this type of application, by focusing on ageing phenomena related to thermo-mechanical aspects. As a general rule, the accelerated ageing of power modules is carried out under aggravated conditions of current (Active Cycling) or temperature (Passive Cycling) in order to accelerate the ageing process. Unfortunately, when applying this type of accelerated ageing tests, some failure mechanisms that do not occur in the real application could be observed, while inversely, other mechanisms that usually occur could not be recreated. The first part of the PhD focuses on the implementation of an accelerated ageing method of the semiconductor devices inside photovoltaic inverters. This is accomplished by analyzing the mission profiles of the inverter’s output current and ambient temperature, extracted over several years from photovoltaic power plants located in the south of France. These profiles are used to study photovoltaic current dynamics, and are introduced into numerical models to estimate losses and junction temperature variations of semiconductors used in inverters, using the cycle counting algorithm “Rainflow”. This method is then performed in two experimental test benches. In the first one, the devices under test are IGBT modules, where the accelerated ageing profile designed is implemented using the opposition method. Moreover, an in-situ setup for monitoring ageing indicators (thermal impedance and dynamic resistance) is also proposed and evaluated. The second bench is devoted to study the ageing of SiC MOSFET power modules. The accelerated ageing test is carried out under the same conditions as for the IGBT modules with more monitored electrical indicators, but this time by disconnecting the semiconductor devices from the inverter. The results obtained allowed to determine several potential ageing indicators of IGBTs and SiC MOSFETs used in a photovoltaic inverter

Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben der grundlegenden Funktionsweise wird die Auslegung der aktiven Leistungshalbleiter und der passiven Energiespeicher (Zwischenkreiskondensatoren, Flying Capacitors) für die untersuchten Stromrichtertopologien dargestellt. Unter Berücksichtigung verschiedener Modulationsverfahren und Schaltfrequenzen werden Kennwerte für den Oberschwingungsgehalt in der Ausgangsspannung und dem Ausgangsstrom vergleichend evaluiert. Die installierte Schalterleistungen, die Halbleiterausnutzungsfaktoren, die Stromrichterverlustleistungen sowie die Verlustleistungsverteilungen werden für die betrachteten Stromrichtertopologien detailliert gegenübergestellt und bewertet. / The thesis deals with a detailed comparison of voltage source converter topologies with a central dc-link energy storage device for medium voltage applications. The Three-Level Neutral Point Clamped Voltage Source Converter (3L-NPC VSC) is compared with multilevel Flying Capacitor (FLC) and Stacked Multicell (SMC) Voltage Source Converters (VSC) for output voltages of 2.3 kV, 4.16 kV and 6.6 kV by using state-of-the-art 6.5 kV, 3.3 kV, 4.5 kV and 1.7kV IGBTs. The fundamental functionality of the investigated converter topologies as well as the design of the power semiconductors and of the energy storage devices (Flying Capacitors and Dc-Link capacitors) is described. The installed switch power, converter losses, the semiconductor loss distribution, modulation strategies and the harmonic spectra are compared in detail.

For medium and high-voltage drive applications, multilevel inverters are very popular. It is due to their superior performance compared to 2-level inverters such as reduced harmonic content in the output voltage and current, lower common mode voltage and dv=dt, and lesser voltage stress on power switches. The popular circuit topologies for multilevel inverters are neutral point clamped, cascaded H-bridge and flying capacitor based circuits. There exist different combinations of these basic topologies to realize multilevel inverters with modularity, better fault tolerance, and reliability. Due to these advantages, multilevel converters are getting good acceptance from the industry, and researchers all over the world are continuously trying to improve the performance of these converters. To meet such demands, three multilevel inverter topologies are proposed in this thesis. These topologies can be used for high-power induction motor drives, and the concepts presented are also applicable for synchronous motor drives, grid-connected inverters, etc. To get nearly sinusoidal phase current waveforms, the switching frequency of the conventional inverter has to be increased. It will lead to higher switching losses and electromagnetic interference. The problem with lower switching frequency is the intro- duction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching, and it is possible to eliminate these harmonics by dodecagonal switching. Further improvement in the waveform quality is possible by octadecagonal voltage space-vectors. In this case, the complete elimination of 11th and 13th harmonic is possible for the entire modulation range. The concepts of dodecagonal and octadecagonal voltage space-vectors are used in the proposed inverter topologies. The first topology proposed in this thesis consists of cascaded connection of two H-bridge cells. The two cells are fed from unequal DC voltage sources having a ratio of 1 : 0:366, and this inverter can produce six concentric dodecagonal voltage space- vectors. This ratio of voltages can be obtained easily from a combination of star-delta transformers, since 1 : 0:366 = ( p 3 + 1) : 1. The cascaded connection of two H-bridge cells can generate nine asymmetric pole voltage levels, and the combined three-phase inverter can produce 729 voltage space-vectors (9 9 9). From this large number of combinations, only certain voltage space-vectors are selected, which forms dodecagonal pattern. In the case of conventional multilevel inverters, the voltage space-vector diagram consists of equilateral triangles of equal size, but for the proposed inverter, the triangular regions are isosceles and are having different sizes. By properly placing the voltage space-vectors in a sampling period, it is possible to achieve lower switching frequency for the individual cells, with substantial improvement in the harmonic spectrum of the output voltage. During the experimental veri cation, the motor is operated at di erent speeds using open loop v=f control method. The samples taken are always synchronised with the start of the sector to get synchronised PWM. The number of samples per sector is decreased with increase in the fundamental frequency to limit the switching frequency. Even though many topologies are available in literature, the most preferred topology for drives application such as traction drives is the 3-level NPC structure. This implies that the industry is still looking for viable alternatives to construct multilevel inverter topologies based on available power circuits. The second work focuses on the development of a multilevel inverter for variable speed medium-voltage drive application with dodecagonal voltage space-vectors, using lesser number of switches and power sources compared to earlier implementations. It can generate three concentric 12-sided polygonal voltage space-vectors and it is based on commonly available 2-level and 3-level inverters. A simple PWM timing computation method based on the hexagonal space-vector PWM is developed. The sampled values of the three-phase reference voltages are initially converted to the timings of a two-level inverter. These timings are mapped to the dodecagonal timings using a change of basis transformation. The voltage space- vector diagram of the proposed drive consists of sixty isosceles triangular regions, and the dodecagonal timings calculated are converted to the timings of the inner triangles. A searching algorithm is used to identify the triangular region in which the reference vector is located. A front-end recti er that may be easily implemented using standard star-delta transformers is also developed, to provide near-unity power factor. To test the performance of the inverter drive, an open-loop v=f control is used on a three-phase induction motor under no-load condition. The harmonic spectra of the phase voltages were computed in order to analyse the harmonic distortion of the waveforms. The carrier frequency was kept around 1.2 KHz for the entire range of operation. If the switching frequency is decreased, the conventional hexagonal space-vector based switching introduce signifi cant 5th, 7th, 11th and 13th harmonics in the phase currents. Out of these dominant harmonics, the 5th and 7th harmonics can be completely suppressed using dodecagonal voltage space-vector based switching as observed in the first and second work. It is also possible to remove the 11th and the 13th harmonics by using voltage space-vectors with 18 sides. The last topology is based on multilevel octadecagonal (18-sided polygon) voltage space-vectors, and it has better harmonic performance than the previously mentioned topologies. Here, a multilevel inverter system capable of producing three octadecagonal voltage space-vectors is proposed for the fi rst time, along with a simple timing calculation method. The conventional three-level inverters are only required to construct the proposed drive. Four asymmetric power supply voltages with 0:3054Vdc, 0:3473Vdc, 0:2266Vdc and 0:1207Vdc are required for the operation of the drive, and it is the main drawback of the circuit. Generally front-end isolation transformer is essential for high-power drives and these asymmetric voltages can be easily obtained from the multiple windings of the isolation transformer. The total harmonic distortion of the phase current is improved due to the 18-sided voltage space-vector switching. The ratio of the radius of the largest polygon and its inscribing circle is cos10 = 0:985. This ratio in the case of hexagonal voltage space-vector modulation is cos30 = 0:866, which means that the range of the linear modulation for the proposed scheme is signifi cantly higher. The drive is designed for open-end winding induction motors and it has better fault tolerance. It any of the inverter fails, it can be easily bypassed and the drive will be still functional with reduced speed. Open loop v=f control and rotor flux oriented vector control schemes were used during the experimental verifi cation. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the entire range of operation, the carrier was synchronized with the fundamental. For the synchronization, the sampling period is varied dynamically so that the number of samples in a triangular region is fi xed, keeping the switching frequency around 1.2 KHz. The average execution time for the v=f code was found to be 20 S, where as for vector control it took nearly 100 S. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. To convert the triangle number and the timings to IGBT gate drive logic, an FPGA (XC3S200) was used. A constant dead-time of 1.5 S is also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. Hall-effect sensors were used to measure the phase currents and DC bus voltages. An incremental shaft position encoder with 2500 pulse per revolution is also connected to the motor shaft, to measure the angular velocity. 1200 V, 75 A IGBT half-bridge module is used to realize the switches. The concepts were initially simulated and experimentally verifi ed using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control techniques presented shall still remain applicable.

For medium and high-voltage drive applications, multilevel inverters are very popular. It is due to their superior performance compared to 2-level inverters such as reduced harmonic content in the output voltage and current, lower common mode voltage and dv=dt, and lesser voltage stress on power switches. The popular circuit topologies for multilevel inverters are neutral point clamped, cascaded H-bridge and flying capacitor based circuits. There exist different combinations of these basic topologies to realize multilevel inverters with modularity, better fault tolerance, and reliability. Due to these advantages, multilevel converters are getting good acceptance from the industry, and researchers all over the world are continuously trying to improve the performance of these converters. To meet such demands, three multilevel inverter topologies are proposed in this thesis. These topologies can be used for high-power induction motor drives, and the concepts presented are also applicable for synchronous motor drives, grid-connected inverters, etc. To get nearly sinusoidal phase current waveforms, the switching frequency of the conventional inverter has to be increased. It will lead to higher switching losses and electromagnetic interference. The problem with lower switching frequency is the intro- duction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching, and it is possible to eliminate these harmonics by dodecagonal switching. Further improvement in the waveform quality is possible by octadecagonal voltage space-vectors. In this case, the complete elimination of 11th and 13th harmonic is possible for the entire modulation range. The concepts of dodecagonal and octadecagonal voltage space-vectors are used in the proposed inverter topologies. The first topology proposed in this thesis consists of cascaded connection of two H-bridge cells. The two cells are fed from unequal DC voltage sources having a ratio of 1 : 0:366, and this inverter can produce six concentric dodecagonal voltage space- vectors. This ratio of voltages can be obtained easily from a combination of star-delta transformers, since 1 : 0:366 = ( p 3 + 1) : 1. The cascaded connection of two H-bridge cells can generate nine asymmetric pole voltage levels, and the combined three-phase inverter can produce 729 voltage space-vectors (9 9 9). From this large number of combinations, only certain voltage space-vectors are selected, which forms dodecagonal pattern. In the case of conventional multilevel inverters, the voltage space-vector diagram consists of equilateral triangles of equal size, but for the proposed inverter, the triangular regions are isosceles and are having different sizes. By properly placing the voltage space-vectors in a sampling period, it is possible to achieve lower switching frequency for the individual cells, with substantial improvement in the harmonic spectrum of the output voltage. During the experimental veri cation, the motor is operated at di erent speeds using open loop v=f control method. The samples taken are always synchronised with the start of the sector to get synchronised PWM. The number of samples per sector is decreased with increase in the fundamental frequency to limit the switching frequency. Even though many topologies are available in literature, the most preferred topology for drives application such as traction drives is the 3-level NPC structure. This implies that the industry is still looking for viable alternatives to construct multilevel inverter topologies based on available power circuits. The second work focuses on the development of a multilevel inverter for variable speed medium-voltage drive application with dodecagonal voltage space-vectors, using lesser number of switches and power sources compared to earlier implementations. It can generate three concentric 12-sided polygonal voltage space-vectors and it is based on commonly available 2-level and 3-level inverters. A simple PWM timing computation method based on the hexagonal space-vector PWM is developed. The sampled values of the three-phase reference voltages are initially converted to the timings of a two-level inverter. These timings are mapped to the dodecagonal timings using a change of basis transformation. The voltage space- vector diagram of the proposed drive consists of sixty isosceles triangular regions, and the dodecagonal timings calculated are converted to the timings of the inner triangles. A searching algorithm is used to identify the triangular region in which the reference vector is located. A front-end recti er that may be easily implemented using standard star-delta transformers is also developed, to provide near-unity power factor. To test the performance of the inverter drive, an open-loop v=f control is used on a three-phase induction motor under no-load condition. The harmonic spectra of the phase voltages were computed in order to analyse the harmonic distortion of the waveforms. The carrier frequency was kept around 1.2 KHz for the entire range of operation. If the switching frequency is decreased, the conventional hexagonal space-vector based switching introduce signifi cant 5th, 7th, 11th and 13th harmonics in the phase currents. Out of these dominant harmonics, the 5th and 7th harmonics can be completely suppressed using dodecagonal voltage space-vector based switching as observed in the first and second work. It is also possible to remove the 11th and the 13th harmonics by using voltage space-vectors with 18 sides. The last topology is based on multilevel octadecagonal (18-sided polygon) voltage space-vectors, and it has better harmonic performance than the previously mentioned topologies. Here, a multilevel inverter system capable of producing three octadecagonal voltage space-vectors is proposed for the fi rst time, along with a simple timing calculation method. The conventional three-level inverters are only required to construct the proposed drive. Four asymmetric power supply voltages with 0:3054Vdc, 0:3473Vdc, 0:2266Vdc and 0:1207Vdc are required for the operation of the drive, and it is the main drawback of the circuit. Generally front-end isolation transformer is essential for high-power drives and these asymmetric voltages can be easily obtained from the multiple windings of the isolation transformer. The total harmonic distortion of the phase current is improved due to the 18-sided voltage space-vector switching. The ratio of the radius of the largest polygon and its inscribing circle is cos10 = 0:985. This ratio in the case of hexagonal voltage space-vector modulation is cos30 = 0:866, which means that the range of the linear modulation for the proposed scheme is signifi cantly higher. The drive is designed for open-end winding induction motors and it has better fault tolerance. It any of the inverter fails, it can be easily bypassed and the drive will be still functional with reduced speed. Open loop v=f control and rotor flux oriented vector control schemes were used during the experimental verifi cation. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the entire range of operation, the carrier was synchronized with the fundamental. For the synchronization, the sampling period is varied dynamically so that the number of samples in a triangular region is fi xed, keeping the switching frequency around 1.2 KHz. The average execution time for the v=f code was found to be 20 S, where as for vector control it took nearly 100 S. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. To convert the triangle number and the timings to IGBT gate drive logic, an FPGA (XC3S200) was used. A constant dead-time of 1.5 S is also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. Hall-effect sensors were used to measure the phase currents and DC bus voltages. An incremental shaft position encoder with 2500 pulse per revolution is also connected to the motor shaft, to measure the angular velocity. 1200 V, 75 A IGBT half-bridge module is used to realize the switches. The concepts were initially simulated and experimentally verifi ed using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control techniques presented shall still remain applicable.

The necessity to incorporate renewable energy systems into existing electric power grid and need of efficient utilization of electrical energy are growing every day. A shunt connected Voltage Source Inverter(VSI) capable of bidirectional power flow and fast control has become one of the building block to address such requirements. However with growing number of grid connected VSI, new requirements related to harmonic injection, higher overall efficiency and better performances during short term grid disturbances have emerged as challenges. For this purpose a grid connected three phase four wire VSI with LCL filter can be considered as a general module to study different control approaches and system behavior under ideal and non-ideal grid conditions. This work focuses on achieving enhanced performance by analyzing effect of non-ideal conditions on system level and relating it to individual control blocks. In this work a phase locked loop structure has been proposed which is capable of extracting positive sequence fundamental phase information under non-ideal grid conditions. It can also be used in a single phase system without any structural modification. The current control for the three phase four wire VSI system has been implemented using Proportional Resonant (PR) controller in a per phase basis in stationary reference frame. A simplified controller design procedure based on asymptotic representation of the system transfer function is proposed. Using this method expressions for controller gains can be derived. A common mode model of the inverter system has been derived for low frequencies. Using this model a controller is designed to mitigate DC bus imbalance caused by sensor and ADC channel offsets. A multi-rate approach for digital implementation of PR controller with low resource consumption, that is suitable for an FPGA like digital controller ,is proposed. This multi-rate method can maintain resonance frequency accuracy even at low sampling frequency and can easily be frequency adaptive. Anti-wind up methods for PI controller have been studied to find suitable anti-wind up methods for PR controller. The tracking anti-wind up method is shown to be suitable for use with a PR controller. The effectiveness of this method under sudden disconnection and reconnection of VSI from grid is experimentally verified. A resonant integrator based second order filter is shown to be useful for active damping of LCL filter resonance with a wide range of grid inductance variation. The proposed method utilizes the LCL filter capacitor voltage to estimate resonance frequency current. Suitability of fundamental current PR controller for active damping alone, and with the proposed method show the superiority of the proposed method especially for low switching frequencies. Design oriented analysis of the above topics are included in the thesis. The theoretical understandings developed have been verified through experiments in the laboratory and can be readily implemented in industrial power electronic systems.

The main focus of this thesis is on the power electronic converter system challenges associated with the grid integration of variable-renewable-energy (VRE) sources like wave, marine current, tidal, wind, solar etc. Wave energy conversion with grid integration is used as the key reference, considering its high energy potential to support the future clean energy requirements and due the availability of a test facility at Uppsala University. The emphasis is on the DC-link power conditioning and grid coupling of direct driven wave energy converters (DDWECs). The DDWEC reflects the random nature of its input energy to its output voltage wave shape. Thereby, it demands for intelligent power conversion techniques to facilitate the grid connection. One option is to improve and adapt an already existing, simple and reliable multilevel power converter technology, using smart control strategies. The proposed WECs to grid interconnection system consists of uncontrolled three-phase rectifiers, three-level boost converter(TLBC) or three-level buck-boost converter (TLBBC) and a three-level neutral point clamped (TLNPC) inverter. A new method for pulse delay control for the active balancing of DC-link capacitor voltages by using TLBC/TLBBC is presented. Duty-ratio and pulse delay control methods are combined for obtaining better voltage regulation at the DC-link and for achieving higher controllability range. The classic voltage balancing problem of the NPC inverter input, is solved efficiently using the above technique. A synchronous current compensator is used for the NPC inverter based grid coupling. Various results from both simulation and hardware testing show that the required power conditioning and power flow control can be obtained from the proposed multilevel multistage converter system. The entire control strategies are implemented in Xilinx Virtex 5 FPGA, inside National Instruments’ CompactRIO system using LabVIEW. A contour based dead-time harmonic analysis method for TLNPC and the possibilities of having various interconnection strategies of WEC-rectifier units to complement the power converter efforts for stabilizing the DC-link, are also presented. An advanced future AC2AC direct power converter system based on Modular multilevel converter (MMC) structure developed at Siemens AG is presented briefly to demonstrate the future trends in this area.

Das Ziel der Arbeit war die Untersuchung eines neuartigen Phasenbausteins mit der Topologie des Dreipunkt – Neutral Point Clamped – Stromrichters mit Spannungszwischenkreis (3L-NPC-VSC) für Windkraftanwendungen. Wichtige Anforderungen an den Phasenbaustein und daraus resultierende Herausforderungen, sowie Lösungen für ausgewählte Teilprobleme werden präsentiert. Um die Vorteile des 3L-NPC-VSC für Hersteller von Windkraftanlagen zugänglich zu machen, ist es sinnvoll, einen neuartigen Phasenbaustein zu entwickeln. Der Phasenbaustein soll einfach in Systeme zu integrieren sein, in denen gegenwärtig Zweipunktstromrichter (2L-VSC) zum Einsatz kommen. Da sich Modulation, Zwischenkreisbalancierung und Kurzschlussschutz vom 2L-VSC unterscheiden, soll der Phasenbaustein diese Herausforderungen eigenständig bewältigen. Die Arbeit beschreibt die Konzeption eines solchen Phasenbausteins und behandelt insbesondere die Modulation, die Zwischenkreisbalancierung und den Kurzschlussschutz des 3L-NPC-VSC. Ein Vergleich verschiedener Modulationsverfahren wurde durchgeführt und die am besten geeigneten Verfahren für die Implementation in den Phasenbaustein ausgewählt. Eine Anforderung war, dass dieser Signale einer übergeordneten Regelung verarbeiten kann, welche für einen 2L-VSC berechnet wurden. Ein Überblick der Zwischenkreisbalancierungsverfahren zeigte, dass nahezu alle den Nachteil einer zusätzlich benötigten Strommessung haben. Die Untersuchung einer neuen an der Professur Leistungselektronik der TU Dresden entwickelten Methode ohne den Bedarf der Strommessung zeigte, dass diese anwendbar ist. Der Algorithmus wurde simuliert, implementiert und experimentell getestet und zeigte gute Resultate. Die Aufgabe eines komplett unabhängigen Kurzschlussschutzes war die schwierigste. Alle möglichen Fehler innerhalb eines Moduls wurden analysiert und kategorisiert. Einige Fehlertypen können innerhalb einer Phase behandelt werden. Entsprechende Algorithmen wurden entwickelt und getestet. Allerdings gibt es Fehlertypen, die nicht durch die Steuerung einer einzelnen Phase behandelt werden können. Eine schnelle Kommunikation zwischen den drei Phasen des Konverters wäre notwendig. Alternativ könnte eine übergeordnete Steuerung diese Fehler behandeln. Zum Schluss wurde ein Demonstrator des Phasenbausteins aufgebaut und experimentell untersucht. Einige Messergebnisse werden gezeigt, um die Funktion zu verifizieren.

Orientador: Prof. Dr. Alfeu Joãozinho Sguarezi Filho / Coorientador: Prof. Dr. Joel David Melo Trujillo / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, Santo André, 2018. / Neste trabalho é proposto um algoritmo de rastreamento de máxima potência com a utilização da equação de Monod. O algoritmo aplica-se em sistemas fotovoltaicos conectados à rede elétrica. Os resultados e as comparações mostram que o algoritmo proposto apresenta algumas vantagens em comparação ao algoritmo de perturbação e observação para diversas condições de operação, em especial quando os painéis são submetidos a sombreamento parcial. / In this work we propose an algorithm of maximum power point tracking with using the Monod Equation. The algorithm applies to photovoltaic systems connected to the grid. The results and the comparition show that the algoritmo proposal has some advantages compared to algoritm Perturb and Observe in many situation of operation, in special when the fotovoltaics painels have parcial shading.

Les actionneurs électromécaniques supplantent les solutions d’actionnement hydrauliques concurrentes dans un nombre croissant d’applications industrielles, particulièrement en aéronautique. Ils le doivent à leurs rendements élevés et à une relative simplicité de commande. Fort de ces avantages, cette technologie a été mise en place dans le cadre du projet ELEXC, en vue de remplacer les vérins hydrauliques sur une mini-excavatrice tout-électrique et s’attaquant pour la première fois au secteur du bâtiment et des travaux publics. Cependant, cette intégration s’accompagne de doutes sur la performance et la durabilité de ces actionneurs dans ce cas précis d’utilisation. Pour répondre à ces interrogations, ce manuscrit se focalisera dans un premier volet sur la caractérisation des performances d’une structure spécifique, permise par la mise en place d’un banc de test multi-énergies instrumenté. Cette étude aboutira à la mise en place d’un modèle par lois physiques dont les paramètres auront été identifiés expérimentalement.Deux solutions innovantes vont ensuite être proposées, visant respectivement à réduire les répercussions, notamment énergétiques, de la caractéristique discrète du convertisseur à découpage, et à parer au manque de compliance de l’actionneur tout en conservant ses capacités de creusage. Elles seront toutes deux associées au concept de commande prédictive, mais offriront chacune une spécificité par rapport à l’implémentation standard de ce type de commande tout en conservant ses avantages. La première prendra la forme d’un modulateur fondé sur le principe d’une modulation de largeur d’impulsion vectorielle, dont la séquence sera sélectionnée par un contrôleur prédictif en rapport avec une fonction de coût alliant les ondulations de courant, les pertes par commutation et la tension de mode commun spécifiques aux séquences. La seconde consistera en un contrôleur d’impédance à boucle de position interne, dont les paramètres d’impédance seront variables et définis par un contrôleur prédictif afin de permettre une bonne pénétration dans l’environnement tout en limitant la dynamique et la valeur maximale de l’effort de compression sur la transmission. / Nowadays, the electro-mechanical actuators (EMA) are seen as an alternative to the conventional hydraulic cylinders in a growing number of industrial applications, including the aeronautic sector, thanks to their high efficiency and relatively simple commandability. According to this features, this actuator technology was selected to replace the hydraulic cylinders of the actuation system of a full-electric compact excavator in the ELEXC project. However, some concerns arose from the lack of existing examples with EMA functioning in relatively severe working conditions implying collisions of the actuators with stiff environments. Therefore, this manuscript will first focus on the characterization of the electro-mechanical actuator and of its performances in this specific case of application, enabled by the development of a multi-energy test-rig. Beside the validation of the EMA capacities, a physic law model will be developed, and its parameters tuned according to the experimental results. In a second part of this manuscript, two novel control laws will be proposed, aiming respectively to reduce the negative repercussions of the discrete characteristic of the electrical converter, and to counterpart the lack of natural compliance of the mechanical actuator. They will be both based on the concept of predictive control, but will differ from the conventional implementation of this type of controller. The first proposed topology is a modulator based on a vector Pulse Width Modulation, in which the PWM sequence to be used is defined online by a predictive controller according to a cost function that takes into account the current ripples, the switching losses and the common mode voltages specific to the sequences. Next, a position-based impedance controller, whose impedance parameters are defined online by a predictive controller, is introduced, in order to enable the EMA to penetrate a stiff environment with a relatively low dynamic increase of compression force on the mechanical transmission.

Le projet industriel français MEGaN vise le développement de module de puissance à base de compostant HEMT en GaN. Une des application industrielle concerne l’aéronautique avec une forte contrainte en isolation galvanique (>100 kV/s) et en température ambiante (200°C). Le travail de thèse a été concentré sur une brique module de puissance (bras d’onduleur 650 V 30 A). L’objectif est d’atteindre un prototype de facteur de forme peu épais, 30 cm2 et embarquant l’ensemble des fonctions driver, alimentation de driver, la capacité de bus et capteur de courant phase. Cet objectif implique un fort rendement énergétique, et le respect de l’isolation galvanique alors que la contrainte en surface est forte. Le manuscrit, outre l’état de l’art relatif au module de puissance et notamment celui à base de transistor GaN HEMT, aborde une solution d’isolation de signaux de commande à base de micro-transformateur. Des prototypes de micro-transformateur ont été caractérisés et vieillis pendant 3000 H pour évaluer la robustesse de la solution. Les travaux ont contribué à la caractérisation de plusieurs composants GaN afin de mûrir des modèles pour la simulation circuit de topologie de convertisseur. Au sein du travail collaboratif MEGaN, notre contribution ne concernait pas la conception du circuit intégré (driver de grille), tout en ayant participé à la validation des spécifications, mais une stratégie d’alimentation du driver de grille. Une première proposition d’alimentation isolée pour le driver de grille a privilégié l’utilisation de composants GaN basse-tension. La topologie Flyback résonante avec clamp permet de tirer le meilleur parti de ces composants GaN mais pose la contrainte du transformateur de puissance. Plusieurs technologies pour la réalisation du transformateur ont été validées expérimentalement et notamment une proposition originale enfouissement du composant magnétique au sein d’un substrat polymère haute-température. En particulier, un procédé de fabrication peu onéreux permet d’obtenir un dispositif fiable (1000 H de cyclage entre - 55 ; + 200°C), avec un rendement intrinsèque de 88 % pour 2 W transférés. La capacité parasite d’isolation est réduite par rapport aux prototypes précédent. Deux prototypes d’alimentations à forte intégration utilisent soit les transistors GaN basse tension (2.4 MHz, 2 W, 74 %, 6 cm2), soit un circuit intégré dédié en technologie CMOS SOI, conçu pour l’application (1.2 MHz, 2 W, 77 %, 8.5 cm2). Le manuscrit propose par la suite une solution intégrable de mesure de courant de phase du bras de pont, basé sur une magnétorésistance. La comparaison expérimentale vis à vis d’une solution à résistance de shunt. Enfin, deux prototypes de convertisseur sont décrits, dont une a pu faire l’objet d’une validation expérimentale démontrant des pertes en commutation réduites. / The french industrial project MEGaN targets the development of power module based on GaN HEMT transistors. One of the industrial applications is the aeronautics field with a high-constraint on the galvanic isolation (>100 kV/s) and ambient temperature (200°C). The intent of this work is the power module block (3 phases inverter 650 V 30 A). The goal is to obtain a small footprint module, 30 cm2, with necessary functions such as gate driver, gate driver power supply, bulk capacitor and current phase sensor. This goal implies high efficiency as well as respect of the constraint of galvanic isolation with an optimized volume. This dissertation, besides the state of the art of power modules and especially the GaN HEMT ones, addressed a control signal isolation solution based on coreless transformers. Different prototypes based on coreless transformers were characterized and verified over 3000 hours in order to evaluate their robustness. The different studies realized the characterization of the different market available GaN HEMTs in order to mature a circuit simulation model for various converter topologies. In the collaborative work of the project, our contribution did not focus on the gate driver chip design even if experimental evaluation work was made, but a gate driver power supply strategy. The first gate driver isolated power supply design proposition focused on the low-voltage GaN HEMT conversion. The active-clamp Flyback topology allows to have the best trade-off between the GaN transistors and the isolation constraint of the transformer. Different transformer topolgies were experimentally performed and a novel PCB embedded transformer process was proposed with high-temperature capability. A lamination process was proposed for its cost-efficiency and for the reliability of the prototype (1000 H cycling test between - 55; + 200°C), with 88 % intrinsic efficiency. However, the transformer isolation capacitance was drastically reduced compared to the previous prototypes. 2 high-integrated gate driver power supply prototypes were designed with: GaN transistors (2.4 MHz, 2 W, 74 %, 6 cm2), and with a CMOS SOI dedicated chip (1.2 MHz, 2 W, 77 %, 8.5 cm2). In the last chapter, this dissertation presents an easily integrated solution for a phase current sensor based on the magnetoresistance component. The comparison between shunt resistor and magnetoresistance is experimentally performed. Finally, two inverter prototypes are presented, with one multi-level gate driver dedicated for GaN HEMT showing small switching loss performance.