This thesis deals with control of three phase inverter as three phase sinusoidal voltage source for UPS application. Thesis is split to two parts, teoretical and practical. Teoretical part deals with three phase inverter topology analysis according requirement of neutral line wire and possibilities of generating sinusoidal PWM in depend of topology. There are also analysed properties of contorled system and designed 3 regulation methods with simulations. Second part of thesis deals with realisation of sinusoidal power source with inverter borrowed by Elcom company. To inverter control is used digital signal controler TMS320F28335 with implemented control algorithms. There are also presented the measurement results of the prototype of power source. In conclusion, simulation results are compared with measurements and achieved results are summarized.

Ces dernières années, un intérêt croissant pour les systèmes électroniques de puissance a été motivé par l'émergence de sources d'énergie distribuées et renouvelables raccordées aux réseaux électriques. Dans ce contexte, la nécessité de topologies de faibles puissances alimentées par quelques modules photovoltaïques, en évitant l'utilisation de transformateurs, a ouvert l'étude de convertisseurs spéciaux et l’étude des stratégies de commande associées afin d’assurer la stabilité, la fiabilité et un rendement élevé du dispositif. Une possible solution est d’utiliser un dispositif générique connu dans la littérature scientifique et commerciale comme « micro-onduleur » ou «convertisseur intégré au module » qui avec le module photovoltaïque définit un produit « plug and play » appelé "module AC".Ce travail est consacré à l'étude d'un micro-onduleur monophasé avec deux étapes sans transformateur raccordée au réseau. La topologie proposée est composé d’un convertisseur DC-DC non isolé élévateur avec un gain quadratique et un onduleur réducteur lié au réseau connectés en cascade. Le convertisseur DC-DC extrait en permanence la puissance maximale du module photovoltaïque malgré les changements dans les conditions environnementales. L'étape DC-AC injecte la puissance extraite par l'étape DC-DC dans le réseau et assure un niveau élevé de qualité de l’énergie. Les efforts de recherche de ce travail sont concentrés sur la mise au point de commandes utilisant comment base, la théorie de contrôle par mode de glissement, qui conduit à une mise en œuvre simple avec une description théorique complète validée á partir de simulations et expérimentations.Après avoir décrit l'état de l’art dans le premier chapitre, le manuscrit est divisé en quatre chapitres, qui sont dédiés respectivement à l’algorithme de recherche du point de puissance maximale (MPPT), á l’étape de conversion DC-DC, á l'étape de conversion DC-AC et finalement au micro-onduleur complet. Un nouvel algorithme de recherche extrémal du point de puissance maximale est développé (SM-ESC). Pour la étape DC-DC, le convertisseur élévateur quadratique avec seulement un interrupteur contrôlé est étudié utilisant le concept de résistance sans perte par mode de glissement (de l’acronyme anglais : Sliding-Mode Loss-Free-Resistor – SM-LFR) afin d’obtenir un gain de tension élevé avec un fonctionnement sûr et compatible avec l’algorithme MPPT. Pour la étape DC-AC, le convertisseur de pont complet est contrôlé comme un onduleur de source de puissance (de l’acronyme anglais : Power Source Inverter - PSI) en utilisant une commande par mode de glissement qui poursuit une référence sinusoïdale de courant de sortie. Cette commande est complétée par une boucle de régulation de la tension du bus DC qui assure une haute qualité d’énergie injectée dans le réseau. Enfin, les trois étapes constitutives sont fusionnées pour obtenir un micro-onduleur complètement contrôlé par la technique de mode de glissement, ce qui constitue le principal résultat et contribution de cette thèse. / These last years, a growing interest in power electronic systems has been motivated by the emergence of distributed renewable energy resources and their interconnection with the grid. In this context, the need of low power topologies fed by a few photovoltaic modules avoiding the use of transformers opens the study of special converters and the associated control strategies ensuring stability, reliability and high efficiency. A resulted generic device known in the commercial and scientific literature as “microinverter” or “module integrated converter” performs a plug and play product together with the PV module called an “AC module”.This work is devoted to the study of a transformer-less single-phase double-stage grid-connected microinverter. The proposed topology has a non-isolated high-gain boost type DC-DC converter and a non-isolated buck type DC-AC converter connected in cascade through a DC bus. The DC-DC converter permanently extracts the maximum power of the PV module ensuring at the same time a good performance coping with power changes introduced by the change in the environmental conditions. The DC-AC stage injects the power extracted by the DC-DC stage into the grid ensuring a high level of power quality. The research efforts focus on the involved control functions based on the sliding mode control theory, which leads to a simple implementation with a comprehensive theoretical description validated through simulation and experimental results.After giving the state-of-the-art in the first chapter, the manuscript is divided into four chapters, which are dedicated to the Maximum Power Point Tracking (MPPT), the DC-DC stage and its control, the DC-AC stage and its control and the complete microinverter. A new Extremum Seeking Control (ESC) MPPT algorithm is proposed. The single-switch quadratic boost converter is studied operating as a Loss-Free-Resistor (LFR) obtaining a high DC output voltage level with a safe operation. The full-bridge converter is controlled as a Power Source Inverter (PSI) using a simple sliding-mode based tracking law, regulating the voltage of the DC bus and then ensuring a high power quality level in the grid connection. Finally, the three building blocks are merged to obtain a sliding mode controlled microinverter constituting the main result and contribution of the work

Indiana University-Purdue University Indianapolis (IUPUI) / The substantial increase demand for electrical energy requires high efficient apparatus dealing with energy conversion. Several technologies have been suggested to implement power supplies with higher efficiency, such as multilevel and interleaved converters. This thesis proposes an energy conversion unit with an optimized number of output voltage levels per number of switches nL=nS. The proposed five-level four-switch per phase converter has nL=nS=5/4 which is by far the best relationship among the converters presented in technical literature. A comprehensive literature review on existing five-level converter topologies is done to compare the proposed topology with conventional multilevel converters. The most important characteristics of the proposed configuration are: (i) reduced number of semiconductor devices, while keeping a high number of levels at the output converter side, (ii) only one DC source without any need to balance capacitor voltages, (iii) high efficiency, (iv) there is no dead-time requirement for the converters operation, (v) leg isolation procedure with lower stress for the DC-link capacitor. Single-phase and three-phase version of the proposed converter is presented in this thesis. Details regarding the operation of the configuration and modulation strategy are presented, as well as the comparison between the proposed converter and the conventional ones. Simulated results are presented to validate the theoretical expectations. In addition a fault tolerant converter based on proposed topology for micro-grid systems is presented. A hybrid pulse-width-modulation for the pre-fault operation and transition from the pre-fault to post-fault operation will be discussed. Selected steady-state and transient results are demonstrated to validate the theoretical modeling.

As the major electricity consumer, electrical machines play a key role for global energy savings. Machine manufacturers put considerable efforts into the development of more efficient electrical machines for loss reduction and higher power density achievements. A consolidated knowledge of the occurring losses in electrical machines is a basic requirement for efficiency improvements. This thesis deals with iron losses in electrical machines. The major focus is on the influences of the stator core magnetic material due to the machine manufacturing process, temperature influences, and the impact of inverter operation. The first part of the thesis gives an overview of typical losses in electrical machines, with focus put on iron losses. Typical models for predicting iron losses in magnetic materials are presented in a comprehensive literature study. A broad comparison of magnetic materials and the introduction of a new material selection tool conclude this part. Next to the typically used silicon-iron lamination alloys for electrical machines, this thesis investigates also cobalt-iron and nickel-iron lamination sheets. These materials have superior magnetic properties in terms of saturation magnetization and hysteresis losses compared to silicon-iron alloys. The second and major part of the thesis introduces the developed measurement system of this project and presents experimental iron loss investigations. Influences due to machine manufacturing changes are studied, including punching, stacking and welding effects. Furthermore, the effect of pulse-width modulation schemes on the iron losses and machine performance is examined experimentally and with finite-element method simulations. For nickel-iron lamination sheets, a special focus is put on the temperature dependency, since the magnetic characteristics and iron losses change considerably with increasing temperature. Furthermore, thermal stress-relief processes (annealing) are examined for cobalt-iron and nickel-iron alloys by magnetic measurements and microscopic analysis. A thermal method for local iron loss measurements is presented in the last part of the thesis, together with experimental validation on an outer-rotor permanent magnet synchronous machine. / <p>QC 20140516</p>

In high-power electric drives, multilevel inverters are generally deployed to address issues such as electromagnetic interference, switch voltage stress and harmonic distortion. The switching frequency of the inverter is always kept low, of the order of 1KHz or even less to reduce switching losses and synchronous pulse width modulation (PWM) is used to avoid the problem of sub-harmonics and beat frequencies. This is particularly important if the switching frequency is very low. The synchronous PWM is getting popularity as its realization is very easy with digital controllers compared to analog controllers. Neutral-point-clamped (NPC) inverters, cascaded H-bridge, and flying-capacitor multilevel inverters are some of the popular schemes used for high-power applications. Hybrids of these multilevel inverters have also been proposed recently to take advantage of the basic configurations. Multilevel inverters can also be realized by feeding the induction motor from both ends (open-end winding) using conventional inverter structures. For controlling the output voltage of these inverters, various PWM techniques are used. Chapter-1 of this thesis provides an over view of the various multilevel inverter schemes preceded by a discussion on basic two-level VSI topology. The inverters used in motor drive applications have to be operated in over-modulation range in order to extract the maximum fundamental output voltage that is possible from the dc-link. Operation in this high modulation range is required to meet temporary overloads or to have maximum power operation in the high speed range (flux weakened region). This, however, introduces a substantial amount of low order harmonics in the Motor phase voltages. Due to these low-order harmonic frequencies, the dynamic performance of the drive is lost and the current control schemes are severely affected especially due to 5th and 7th harmonic components. Further, due to these low-order harmonics and non-linear PWM operation in over-modulation region, frequent over-current fault conditions occur and reliability of the drive is jeopardized. The twelve sided-polygonal space vector diagram (dodecagonal space vectors) can be used to overcome the problem of low order 5th and 7th harmonics and to give more range for linear modulation while keeping the switching frequency at a minimum compared to conventional hexagonal space vector based inverters. Thus, the dodecagonal space-vector switching can be viewed as an engineering compromise between low switching frequency and quality load current waveform. Most of the previous works of dodecagonal space-vector generation schemes are based on NPC inverters. However, sophisticated charge control schemes are required in NPC inverters to deal with the neutral-point voltage fluctuation and the neutral-point voltage shifting issues. The losses in the clamping diodes are another major concern. In the second chapter, a multilevel dodecagonal space-vector generation scheme based on flying capacitor topology, utilizing an open end winding induction motor is presented. The neutral point charge-balancing problem reported in the previous works is not present in this scheme, the clamping diodes are eliminated and the number of power supplies required has been reduced. The capacitors have inherent charge balancing capability, and the charge control is done once in every switching cycle, which gives tight voltage control for the capacitors. For the speed control of induction motors, the space-vector PWM scheme is more advantageous than the sine-triangle PWM as it gives a more linear range of operation and improved harmonic performance. One major disadvantage with the conventional space-vector PWM is that the trigonometric operations demand formidable computational efforts and look-up tables. Carrier based, common-mode injected PWM schemes have been proposed to simplify the PWM process. However, the freedom of selecting the PWM switching sequences is limited here. Another way of obtaining SVPWM is using the reference voltage samples and the nearest vector information to switch appropriate devices for proper time intervals, realizing the reference vector in an average sense. In-formation regarding the sector and nearest vectors can be easily obtained by comparing the instantaneous amplitudes of the reference voltages. This PWM approach is pro-posed for the speed control of the motor in this thesis. The trigonometric operations and the requirement of large look-up tables in the conventional SVPWM are avoided in this method. It has the additional advantage that the switching sequences can be decided at will, which is helpful in reducing further, the harmonic distortion in certain frequency ranges. In this way, this method tries to combine the advantages of vector based methods (conventional SVPWM) and scalar methods (carrier-based methods). The open-end winding schemes allowed the required phase voltage levels to be generated quite easily by feeding from both ends of the windings. Thus, most of the multilevel inverters based on dodecagonal space-vector structures relied on induction motors with open-end windings. The main disadvantage of open-end winding induction motor is that six wires are to be run from the inverter to the motor, which may be unacceptable in certain applications. Apart from the inconvenience of laying six wires, the voltage reflections in the wires can lead to over voltages at the motor terminals, causing insulation failures. Where as the topology presented in chapter-2 of this thesis uses open-end winding motor with flying-capacitor inverters for the generation of dodecagonal space-vectors, the topology presented in chapter-3 utilizes a cascade connection of flying-capacitors and floating H-bridge cells to generate the same set of voltage space-vectors, thus allowing any standard induction motor as the load. Of the methods used for the speed control of induction motors, namely sine-triangle PWM and space vector PWM, the latter that provides extra modulation range is naturally preferred. It is a well-understood fact that the way in which the PWM switching sequences are applied has a significant influence on the harmonic performance of the drive. However, this topic has not been addressed properly for dodecagonal voltage space-vector based multilevel inverter drives. In chapter-4 of the thesis, this aspect is taken into ac-count and the notion of “harmonic flux trajectories” and “stator flux ripple” are used to analyze the harmonic performance of the various PWM switching schemes. Although the PWM method used in this study is similar to that in chapter-2, the modification in the PWM switching sequence in the PWM algorithm yields significant improvements in harmonic performance. The proposed topologies and PWM schemes are extensively simulated and experimentally verified. The control scheme was implemented using a DSP processor running at a clock frequency 150MHz and a four-pole, 3.7kW, 50Hz, 415V three-phase induction motor was used as the load. Since the PWM ports are limited in a DSP, a field-programmable gate array (FPGA) was used to decode the PWM signals from the DSP to generate timing information required for PWM sequencing for all the power devices. The same FPGA was used to generate the dead-time signals for the power devices also.

Este trabalho apresenta um estudo sobre a corrente de fuga de modo comum em inversores monofásicos sem transformador utilizados para a conexão de sistemas fotovoltaicos (FV) à rede de distribuição de energia elétrica. O estudo se concentra em inversores do tipo fonte de tensão que empregam a topologia em ponte completa. A partir da adequada modelagem do sistema (rede, conversor e módulo fotovoltaico) identifica-se e quantifica-se a contribuição das tensões de modo comum e modo diferencial para a corrente de fuga. Conclui-se que a tensão de modo comum de alta frequência produzida pelo inversor, que depende da estratégia de modulação por largura de pulso (PWM Pulse Width Modulation) empregada, fornece a maior contribuição para produção da corrente de fuga. Esse estudo mostra que os inversores sem transformador, com topologia em ponte completa e modulação que produz tensão de saída com três níveis, necessitam de medidas adicionais para a minimização da corrente fuga quando aplicados em sistemas fotovoltaicos conectados à rede. Algumas soluções propostas na literatura para a minimização da corrente de fuga baseadas em topologias modificadas e filtros de modo comum são listadas e discutidas. Neste trabalho é proposto um filtro integrado de modo comum e modo diferencial com amortecimento passivo de baixas perdas, para minimizar a corrente de fuga produzida por um inversor monofásico sem transformador. Um exemplo de aplicação do filtro proposto é apresentado juntamente com seu procedimento de projeto, resultados de simulação e experimentais que validam a proposta. Além disso, a influência da variação da indutância da rede elétrica e da capacitância parasita do sistema fotovoltaico no comportamento do filtro proposto é analisada. A influência da variação da indutância da rede no comportamento do sistema de controle e o impacto da corrente de modo comum no projeto dos indutores do lado do conversor também são analisados. / This paper presents a study on the common mode leakage current in single-phase transformerless inverters for grid-connected photovoltaic (PV) systems. The study focuses on voltage source inverters (VSI) employing the full-bridge topology. The common mode and differential mode voltages that contribute to the leakage current are identified and quantified from the analysis of the system model (utility grid, converter and PV module). The system model analysis shows that the high frequency common mode voltage produced by the inverter, which depends on the Pulse Width Modulation (PWM) strategy, is the main source contributing to the leakage current. This work shows that transformerless inverters employing the full-bridge topology and a modulation strategy that produces a three-level output voltage require some leakage current minimization strategy when they are employed in grid-connected PV systems. Some solutions proposed in the literature for leakage current minimization based on modified topologies and common mode filters are listed and discussed. In this dissertation an integrated common and differential filter with low loss passive damping is proposed to minimize the leakage current produced by a single-phase transformerless PV inverter. An application example of the proposed filter is presented with design procedure, simulation and experimental results validating the proposal. Additionally, the influence of grid inductance and PV module parasitic capacitance variations on the behavior of the proposed filter is analyzed. The behavior of the control system considering the grid inductance variation and the impact of the common mode current on the converter side inductors design are also analyzed.

Este trabalho apresenta um estudo sobre a corrente de fuga de modo comum em inversores monofásicos sem transformador utilizados para a conexão de sistemas fotovoltaicos (FV) à rede de distribuição de energia elétrica. O estudo se concentra em inversores do tipo fonte de tensão que empregam a topologia em ponte completa. A partir da adequada modelagem do sistema (rede, conversor e módulo fotovoltaico) identifica-se e quantifica-se a contribuição das tensões de modo comum e modo diferencial para a corrente de fuga. Conclui-se que a tensão de modo comum de alta frequência produzida pelo inversor, que depende da estratégia de modulação por largura de pulso (PWM Pulse Width Modulation) empregada, fornece a maior contribuição para produção da corrente de fuga. Esse estudo mostra que os inversores sem transformador, com topologia em ponte completa e modulação que produz tensão de saída com três níveis, necessitam de medidas adicionais para a minimização da corrente fuga quando aplicados em sistemas fotovoltaicos conectados à rede. Algumas soluções propostas na literatura para a minimização da corrente de fuga baseadas em topologias modificadas e filtros de modo comum são listadas e discutidas. Neste trabalho é proposto um filtro integrado de modo comum e modo diferencial com amortecimento passivo de baixas perdas, para minimizar a corrente de fuga produzida por um inversor monofásico sem transformador. Um exemplo de aplicação do filtro proposto é apresentado juntamente com seu procedimento de projeto, resultados de simulação e experimentais que validam a proposta. Além disso, a influência da variação da indutância da rede elétrica e da capacitância parasita do sistema fotovoltaico no comportamento do filtro proposto é analisada. A influência da variação da indutância da rede no comportamento do sistema de controle e o impacto da corrente de modo comum no projeto dos indutores do lado do conversor também são analisados. / This paper presents a study on the common mode leakage current in single-phase transformerless inverters for grid-connected photovoltaic (PV) systems. The study focuses on voltage source inverters (VSI) employing the full-bridge topology. The common mode and differential mode voltages that contribute to the leakage current are identified and quantified from the analysis of the system model (utility grid, converter and PV module). The system model analysis shows that the high frequency common mode voltage produced by the inverter, which depends on the Pulse Width Modulation (PWM) strategy, is the main source contributing to the leakage current. This work shows that transformerless inverters employing the full-bridge topology and a modulation strategy that produces a three-level output voltage require some leakage current minimization strategy when they are employed in grid-connected PV systems. Some solutions proposed in the literature for leakage current minimization based on modified topologies and common mode filters are listed and discussed. In this dissertation an integrated common and differential filter with low loss passive damping is proposed to minimize the leakage current produced by a single-phase transformerless PV inverter. An application example of the proposed filter is presented with design procedure, simulation and experimental results validating the proposal. Additionally, the influence of grid inductance and PV module parasitic capacitance variations on the behavior of the proposed filter is analyzed. The behavior of the control system considering the grid inductance variation and the impact of the common mode current on the converter side inductors design are also analyzed.

Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. Voltage operation above semiconductor device limits, lower common mode voltages, near sinusoidal outputs together with small dv/dt’s, are some of the characteristics that have made this power converters popular for industry and modern research. However, the existing solutions suffer from some inherent drawbacks like common mode voltage problem, DC-link capacitor voltage fluctuation etc. Cascaded multi-level inverter with open-end winding induction motor structure promises significant improvements for high power medium-voltage applications. This dissertation investigates such cascaded multi-level inverters for open-end winding induction motor drive with reduced switch count. Similar to the conventional two-level inverters, other multi-level inverters with PWM control generate alternating common mode voltage (CMV). The alternating common mode voltage coupled through the parasitic capacitors in the machine and results in excessive bearing current and shaft voltage. The unwanted shaft voltage may cross the limit of insulation breakdown voltage and cause motor failure. This alternating common mode voltage adds to the total leakage current through ground conductor and acts as a source of conducted EMI which can interfere with other electronic equipments around. As the number of level increase in the inverter, different voltage levels are made available by using DC-link capacitor banks, instead of using different isolated power supplies. The intermediate-circuit capacitor voltages which are not directly supplied by the power sources are inherently unstable and require a suitable control method for converter operation, preferably without influence on the load power factor. Apart from normal operation, the sudden fault conditions may occur in the system and it is necessary to implement the control strategy considering this condition also. A five-level inverter topology with cascaded power circuit structure is proposed in this dissertation with the strategy to eliminate the common mode voltage and also to maintain the balance in the DC-link capacitor voltages. The proposed scheme is based on a dual five-level inverter for open-end winding induction motor. The principle achievement of this work is the reduction of power circuit complexity in the five-level inverter compared to a previously proposed five-level inverter structure for open-end winding IM drive with common mode voltage elimination. The reduction in the number of power switching devices is achieved by sharing the two two-level inverters for both the inverter structures. The resultant inverter structure can produce a nine-level voltage vector structure with the presence of alternating common mode voltage. The inverter structure is formed by cascading conventional two-level inverters together with NPC three-level inverters. Thus it offers modular and simpler power bus structure. As the power circuit is realised by cascading conventional two-level and NPC three-level inverters the number of power diodes requirements also reduced compared to the conventional NPC five-level inverters. The present proposed structure is implemented for the open-end winding induction motor and the power circuit offers more number of switching state redundancies compared to any conventional five-level inverter. The inverter structure required half the DC-link voltage compared to the DC-link voltage required for the conventional five-level inverter structure for induction motor drive and this reduces the voltage stress on the individual power devices. The common mode voltage is eliminated by selecting only the switching states which do not generate any common mode voltage in pole voltages hence there will be no common mode voltage at the motor phase also. The technique of using the switching state selection for the common mode voltage elimination, cancels out the requirement of the filter for the same purpose. As the inverter output is achieved without the presence of common mode voltage, the dual inverter can be fed from the common DC-link sources, without generating any zero sequence current. Hence the proposed dual five-level inverter structure requires only four isolated DC supplies. The multi-level inverters supplied by single power supply, have inherent unbalance in the DC-link capacitor voltages. This unbalance in the DC-link capacitor voltages causes lower order harmonics at the inverter output, resulting in torque pulsation and increased voltage stress on the power switching devices. A five-level inverter with reduced power circuit complexity is proposed to achieve the dual task of eliminating common mode voltage and DC-link capacitor voltage balancing. The method includes the analysis of current through the DC-link capacitors, depending on the switching state selections. The conditions to maintain all the four DC-link capacitor voltages are analysed. In an ideal condition when there is no fault in the power circuit the balance in the capacitor voltages can be maintained by selecting switching states in consecutive intervals, which have opposite effect on the capacitor voltages. This is called the open loop control of DC-link capacitor voltage balancing, since the capacitor voltages are not sensed during the selection of the switching states. The switching states with zero common mode voltages are selected for the purpose of keeping the capacitor voltages in balanced condition during no fault condition. The use of any extra hardware is avoided. The proposed open loop control of DC-link capacitor voltage balancing is capable of keeping the DC-link capacitor voltages equal in the entire modulation region irrespective of the load powerfactor. The problem with the proposed open loop control strategy is that, it can not take any corrective action if there is any initial unbalance in the capacitor voltages or if any unbalance occurs in the capacitor voltages during operation of the circuit,. To get the corrective action in the capacitor voltages due occurrence of any fault in the circuit, the strategy is further improved and a closed loop control strategy for the DC-link capacitor voltages is established. All the possible fault conditions in the four capacitors are identified and the available switching states are effectively used for the corrective action in each fault condition. The strategy is implemented such a way that the voltage balancing can be achieved without affecting the output fundamental voltage. The proposed five-level inverter structure presented in this thesis is based on a previous work, where a five-level inverter structure is proposed for the open-end winding induction motor. In that previous work 48 switches are used for the realization of the power circuit. It is observed that all the available switching states in this previous work are not used for any of the performance requirement of CMV elimination or DC-link voltage balancing. So, in this proposed work, the power circuit is optimized by reducing some of the switches, keeping the performance of the inverter same as the power circuit proposed in the previous work. The five-level inverter proposed in this thesis used 36 switches and the number of switching states is also reduced. But, the available switching states are sufficient for the CMV elimination and DC-link capacitor voltage balancing. The advantage of the modular circuit structure of this proposed five-level inverter is further investigated and the inverter structure is modified to a seven-level inverter structure for the open end winding induction motor. The proposed power circuit of the seven-level inverter uses only 48 switches, which is less compared to any seven-level inverter structure for the open end winding induction motor with common mode voltage elimination. The power circuit is reduced by sharing four two-level inverters to both the individual seven-level inverters in both the sides of the of the open end winding induction motor. The cascaded structure eliminates the necessity of the power diodes as required by the conventional NPC multilevel inverters. The proposed seven-level inverter is capable of producing a thirteen-level voltage vector hexagonal structure with the presence of common mode voltage. The common mode voltage elimination is achieved by selecting only the switching states with zero common mode voltage from both the inverters and the combined inverter structure produce a seven-level voltage vector structure with zero common mode voltage. The switching frequency is also reduced for the seven-level inverter compared to the proposed five-level inverter. The advantage of this kind of power circuit structure is that the number of power diode requirement is same in both five-level and seven-level inverters. Since there is no common mode voltage in the output voltages, the dual seven-level inverter structure can be implemented with the common DC-link voltage sources for both the sides. Six isolated power supplies are sufficient for both the seven-level inverters. The available switching states in this proposed seven-level inverter are further analysed to implement the open loop and closed loop capacitor voltage balancing and this allow the power circuit to run with only three isolated DC supplies. All the proposed work presented in this thesis are initially simulated in SIMULINK toolbox and then implemented in a form of laboratory prototype. A 2.5KW open end winding induction motor is used for the implementation of these proposed works. But all these work general in nature and can be implemented for high power drive applications with proper device ratings.

<p>In the process of designing an electric power supply system for an aircraft, parameters like low weight and low losses are important. Reliability, robustness and low cost are other important factors. In the Saab Gripen aircraft, the design of the primary power supply of the electric flight control system was updated by exchanging a switching transistor regulator to a magnetic amplifier (magamp). By introducing a magamp design, weight was saved and a more reliable power supply system at a lower cost was achieved.</p><p> In this particular case, with the power supply of the electric flight control system in the Saab Gripen fighter, advantage could be taken of a specific permanent magnet generator (PM-generator). The frequency of the generator offered the perfect conditions for a magamp controller. A key parameter in designing magnetic amplifiers (magamps) is low losses. New amorphous alloys offer new possibilities of the technique in designing magnetic amplifiers, because of their extremely low losses.</p><p> The core losses are evaluated by studying the equations and diagrams specifying the power losses. The core losses are evaluated and compared with the copper losses in the process of optimizing low weight and low losses. For this an engineering tool is developed and demonstrated.</p><p> Evaluations of the hysteresis characteristics for the magnetic alloys, as well as modeling and simulation of the core losses, are presented in this work. The modeling of the core losses includes hysteresis losses, eddy current losses and excess losses as well as copper losses. The losses are studied dynamically during realistic operational conditions. The model can be used for any generic analysis of hysteresis in magnetic circuits. Applications of magnetic amplifiers in aircrafts have been demonstrated to be a feasible alternative</p>

Στην παρούσα διπλωματική εργασία αναζητείται ένας αυτόματος τρόπος ελέγχου, του επιπέδου της εκπεμπόμενης ισχύος προς το εσωτερικό του ανθρωπίνου σώματος. Εκεί μέσα βρίσκεται κάποιο ενεργό ιατροτεχνολογικό εμφύτευμα. Αυτό το εμφύτευμα στην περίπτωση της εργασίας αυτής, ήταν μία κάψουλα που καταγράφει με φωτογραφίες το γαστρεντερικό σύστημα καθώς οι περισταλτικές κινήσεις του εντέρου προωθούν την κάψουλα προς την έξοδο. Οι φωτογραφίες μεταδίδονται προς καταγραφικό που βρίσκεται έξω από το σώμα με ασύρματο τρόπο. Όπως καταλαβαίνουμε η κάψουλα αυτή αλλά και οποιοδήποτε άλλο ενεργό ιατροτεχνολογικό εμφύτευμα έχει ενεργειακές ανάγκες για την απρόσκοπτη λειτουργία του. Αυτές οι ανάγκες καλύπτονται με ασύρματη μετάδοση ενέργειας. Οι καινοτομίες που υπάρχουν σ’ αυτήν την εργασία είναι οι εξής: 1. Όσον αφορά το εξωτερικό τροφοδοτικό χρησιμοποιήθηκε ένας αντιστροφέας συντονισμού κλάσης D 2. Το πιο καινοτόμο στοιχείο είναι η δημιουργία κλειστού βρόχου ελέγχου μεταξύ του εξωτερικού τροφοδοτικού και του εμφυτεύματος ώστε αυτό να λαμβάνει την ποσότητα της ενέργειας που χρειάζεται κάθε στιγμή. 3. Επίσης σημαντικό είναι ότι η μετάδοση πληροφορίας από το εμφύτευμα προς τα έξω δεν γίνεται με μία ξεχωριστή συχνότητα αλλά χρησιμοποιώντας αρχές παθητικής τηλεμετρίας. Η εργασία αυτή πέρα από την θεωρητική προσέγγιση υλοποιήθηκε και πρακτικά σε εργαστήρια του πανεπιστημίου KUL (ESAT MICAS) στο Βέλγιο. Ο Βρόγχος ελέγχου λειτούργησε και πολλά συμπεράσματα εξάχθηκαν για περεταίρω βελτιώσεις. Η δομή του παρόντος πονήματος είναι ως εξής: Μετά την αρχική εισαγωγή το δεύτερο κεφάλαιο μας δίνει ένα θεωρητικό υπόβαθρο για την ασύρματη μετάδοση ενέργειας. Στη συνέχεια τα διάφορα μέρη των ηλεκτρονικών κυκλωμάτων που αναπτύχθηκαν αναλύονται διεξοδικά στα επόμενα κεφάλαια. Τέλος καταγράφονται τα συμπεράσματα και προτείνονται πιθανές βελτιώσεις για το μέλλον. / In this diploma thesis a way to have an automated control of the transmitted power level into the human body is sought. Inside the body there is an active medical implant. This implant in the case of this project is a swallowable capsule-camera that captures images along the GI tract as the peristaltic propulusion of the bowel push the capsule towards the exit. The photos are transmitted wirelessly to a special recording device that is located out of the body. It is obvious that not only this capsule but any other active medical implant needs energy to operate uninterrupted. This necessary energy is given through inductive power transmission. Innovations in this project are these: 1. The power supply outside the body is realized with Class-D resonant inverter topology. 2. The most innovative is the effectuation of closed control loop between the outer power supply and the implant in order to be received from the implant the exact amount of power that is needed every instant. 3. Also significant is that the transmission of data from the implant to the controlled power supply is not be done with a different carrier but using passive telemetry principles. Beyond the theoretic approximation that was made for this project, it was also realized in KUL university laboratories (ESAT MICAS) in Belgium. The closed control loop functioned properly and conclusions for further development are inferred. The structure of this diploma thesis is as follows: After the starting introduction the theoretic background for wireless inductive power transmission is given in chapter 2. Following, the different parts of the electronic circuits that were developed are analyzed comprehensively in next chapters. Finally conclusions are registered and future improvements are proposed.