This note demonstrates that the shocks explicitly modeled as well as those implicitly present in stochastic macro-models must obey a restriction derived from Walras' law. In the standard case of statistical independence of real and monetary shocks there must be a financial shock to bond demand that mirrors those shocks, bond holdings thus acting in fact as buffer stocks. As an example the choice of the optimal monetary instrument is examined for the converse case of buffer-stock money and compared with the standard case. / Series: Department of Economics Working Paper Series

Enterprise Database Management Systems (DBMS) often run on computers with dedicated storage systems. Their data access requests need to go through two tiers of cache, i.e., a database bufferpool and a storage server cache, before reaching the storage media, e.g., disk platters. A tremendous amount of work has been done to improve the performance of the first-tier cache, i.e., the database bufferpool. However, the amount of work focusing on second-tier cache management to support DBMS workloads is comparably small. In this thesis we propose several novel techniques for managing second-tier caches to boost DBMS performance in terms of query throughput and query response time. The main purpose of second-tier cache management is to reduce the I/O latency endured by database query executions. This goal can be achieved by minimizing the number of reads and writes issued from second-tier caches to storage devices. The rst part of our research focuses on reducing the number of read I/Os issued by second-tier caches. We observe that DBMSs issue I/O requests for various reasons. The rationales behind these I/O requests provide useful information to second-tier caches because they can be used to estimate the temporal locality of the data blocks being requested. A second-tier cache can exploit this information when making replacement decisions. In this thesis we propose a technique to pass this information from DBMSs to second-tier caches and to use it in guiding cache replacements. The second part of this thesis focuses on reducing the number of writes issued by second-tier caches. Our work is two fold. First, we observe that although there are second-tier caches within computer systems, today's DBMS cannot take full advantage of them. For example, most commercial DBMSs use forced writes to propagate bufferpool updates to permanent storage for data durability reasons. We notice that enforcing such a practice is more conservative than necessary. Some of the writes can be issued as unforced requests and can be cached in the second-tier cache without immediate synchronization. This will give the second-tier cache opportunities to cache and consolidate multiple writes into one request. However, unfortunately, the current POSIX compliant le system interfaces provided by mainstream operating systems e.g., Unix and Windows) are not flexible enough to support such dynamic synchronization. We propose to extend such interfaces to let DBMSs take advantage of using unforced writes whenever possible. Additionally, we observe that the existing cache replacement algorithms are designed solely to maximize read cache hits (i.e., to minimize read I/Os). The purpose is to minimize the read latency, which is on the critical path of query executions. We argue that minimizing read requests is not the only objective of cache replacement. When I/O bandwidth becomes a bottleneck the objective should be to minimize the total number of I/Os, including both reads and writes, to achieve the best performance. We propose to associate a new type of replacement cost, i.e., the total number of I/Os caused by the replacement, with each cache page; and we also present a partial characterization of an optimal algorithm which minimizes the total number of I/Os generated by caches. Based on this knowledge, we extend several existing replacement algorithms, which are write-oblivious (focus only on reducing reads), to be write-aware and observe promising performance gains in the evaluations.

The high performance organic light-emitting diodes (OLEDs) have been studied. First, we have fabricated a WOLED with AlF3 and m-MTDATA as a hybrid buffer layer. Results indicate that the turn-on voltage can be reduced to 3.1V, and the luminous efficiency can be improved to 14.7 cd/A when a hybrid buffer layer was used. Since the turn-on voltage decreases and the efficiency increases, the power consumption as well as lifespan are then improved. Moreover, the luminous efficiency of the hybrid buffer layer devices also immunes to drive voltage variations. Second, we studied the properties of transportation in OLEDs. The study presented the device of a WOLED with a combination of a graded hole transport layer (GH) structure and a gradually doped emissive layer (GE) structure as a double graded (DG) structure. The DG structure: ITO/MTDATA(15 nm/NPB(15 nm)/NPB:25% BAlq (15 nm)/NPB : 50% BAlq (15 nm)/BAlq:0.5% Rubrene (10 nm)/ BAlq : 1% Rubrene (10nm) /BAlq:1.5%Rubrene (10 nm) / Alq3 (20 nm)/ LiF (0.5 nm)/Al (200 nm) is beneficial for improving both electrical and optical performances. The luminous efficiency of the DG device is 11.8cd/A, which is larger than that of 7.9cd/A with the HJ device. This improvement is attributed to the discrete interface between hole transport layer and emissive layer can be eliminated, surplus holes can be suppressed, electron-hole pairs can obtain optimal transportation and recombination in the emissive layer, and quenching effects can be significantly suppressed. Moreover, the spectra were almost not changed with an increasing drive current. As the efficiency was improved, it is expected that the power consumption can be reduced as well. Third, high efficiency and brightness p-i-n OLEDs with a CsI-doped Alq3 layer as a n-ETL has been studied. The p-i-n WOLED with a 15 % CsI-doped Alq3 layer exhibits a luminous efficiency of 5.75 cd/A at a driving current of 20mA/cm2 as well as a maximum power efficiency of 4.67lm/W. This improved performance is attributed to the increased electron carriers of the n-ETL and the balance of electrons and holes in the recombination zone. The X-ray photoelectron spectroscopy (XPS) have shown that doping of CsI caused chemical reaction, attributing to the increase of carriers. Finally, we focus on the improvement of contrast ration (CR) of OLEDs. We successfully fabricated a conductive organic-metal light-absorbing layer with a high CR and low reflectance for use as a black cathode in an OLED. The black cathode that was fabricated using vacuum deposition has the advantages of low cost and simple fabrication. Moreover, the J-V characteristic of the black cathode device is almost identical to that of a conventional device. Additionally, the reflectance can be reduced from 66.2% to 11.3% and a small reflectance variation around 3.3% over the visible spectrum is appealed. At an ambient illumination of 250 lx, the CR can be increased from 4.2 to 10.8 at a brightness of 250 cd/m2.

Zinc Oxide (ZnO) has great potential for applications on ultraviolet/blue light emitting devices because of high exciton binding energy and low cost. This research use low lattice-mismatched £^-LiAlO2 (LAO) substrate to grow ZnO epitaxial films by chemical vapor deposition (CVD). The first part of the present study deals with effect of processing parameters including temperature of Zinc procuser, sample position and growth temperature on ZnO epilayer. High the precuser temperature and long distance between sample and center of CVD furnace resulted in high growth rates. When growth rate was low, (10 0) ZnO (m-ZnO) was obtained and its crystallinity and luminescence property were poor. After increasing the growth rate to a certain extent, the surface of epilayer was flat and the crystallinity was improved. A further increase of growth rate resulted in a mixture of m-ZnO and c-plane in the ZnO epilayer. Based on the first part of study, the second part was focused on examining the effect of a nanosized buffer layer on inhibiting the nucleation of c-plane ZnO. Results showed that the nucleation of c-plane ZnO was indeed inhibited at low growth temperature. Finally, the crystallinity the optical property of the epilayer were improved by introducing a thick and flat buffer layer of ~170 nm in thickness.

A prototype of a one-time implantable spinal cord stimulation (SCS) system is presented in this thesis. A pair of inductive coils is used to achieve wireless power transmission and bidirectional communication. A rechargeable Li-ion battery is used to extend the lifetime of the implanted SCS device. Therefore, the number of the battery replacement surgery could be reduced such that one-time implantation is feasible. Besides, the proposed system on chip (SOC) controller and many discretes are integrated on a printed circuit board (PCB). The size of the proposed SCS device is competitive compared to the currently commercial products. The proposed SOC controller adopts a dual supply voltage scheme to reduce power consumption. The proposed SCS system employs an amplitude-shift keying (ASK) technique to carry out the data modulation and power transmission. One of the critical factors to affect efficiency of ASK-based wireless power transmission is the oscillating frequency accuracy. A ROM-less direct digital frequency synthesizer (DDFS) is presented in this thesis to fulfill such a high accuracy demand. Since the supply voltages of the discretes are diversified on a system PCB, many level converters are needed to translate different signal output voltage levels. To resolve above problem, the chip, then, must be redesigned to meet the various voltage level requirement, or added level convertors among the SOC and the discretes. Obviously, it will cause a lot of cost. A wide-range I/O buffer, thus, is proposed to resolve the compatibility problem caused by different supply voltages of discretes.

This thesis is composed of two designs: a PT (process, temperature) detector for 2¡ÑVDD output buffer with slew rate compensation, and a slew rate self-adjusting 2¡ÑVDD output buffer with PVT compensation. In the first topic, a PT detector for 2¡ÑVDD output buffer with slew-rate compensa-tion is proposed. The driving current of 2¡ÑVDD output stages varies provided that the process and temperature conditions are different. For example, the driving current of 2¡ÑVDD output stage will be low at poor PVT corners. By contrast, the driving current will be high at good PVT corners. The process corner and temperature of NMOS and PMOS should be detected by threshold voltage variation thereof, respectively, such that the slew rate compensation is feasible. The proposed sensors will carry out the PT de-tection and compensate the driving current based on the detected corner, such that the slew rate variation of the output stage will be reduced. The second topic is a slew rate self-adjusting 2¡ÑVDD output buffer with PVT compensation. An NMOS and PMOS process detector is proposed to detect the process corners of NMOS and PMOS, respectively, while the voltage and temperature sensor is proposed to detect the voltage and temperature variations by body effect.

There are many Operation Systems provide the interface likes the frame buffer in Linux. It let Application Programs can read and write the memory block tightly connecting the operating registers of display card directly to get the goal of directly modifying the monitor display. However, although we have the frame buffer, this kind of graphic processing method is not enough to provide a real-time graphic performance under the needed of huge block drawing and moving. In order to eliminate the drawback of the low graphic performance of using pure software, there are many cards with 3D graphic engine produced for speeding up the performance of 3D games, like ATI Radeon X850[1] , NVIDIA GeForce 6800[2] and so on. Although the embedded products like digital TV or mobile phone are not needed to have a complex and powerful 3D graphic engine, the idea of speeding up drafting can be provided for the embedded system as a reference. The graphic engine can not only provide a real-time performance of drafting, but also share the work of CPU in embedded system, to achieve the goal of improving graphic performance and cost down. In the paper, we will implement a 2D graphic engine dynamic shared library for combining the 2D graphic engine and frame buffer on the V/PB926EJ-S target board. To achieve the goal of improving graphic performance, come true the real-time graphic processing ability of Embedded LINUX. And providing a convenient, quickly and reliable software technique of combining hardware resource and operation system together based on the experiment.

Packet reordering is generally considered to have negative impact on network performance. In this thesis, the packet reordering is used to assist TCP to recover faster in RED-enabled packet switched networks. The RED queue management prevents networks from congestion by dropping packets with a probability earlier than the time when congestion would actually occur. After a RED router drops a packet, packer reordering is introduced during TCP¡¦s recovery process. A new, simple buffer mechanism, called RED with Recovery Queue or R2Q, is proposed to create this type of packet reordering on behalf of TCP with the objective of accelerating TCP¡¦s recovery and thus improving the overall network performance. In R2Q, the original RED queue is segmented into two sub-queues. The first sub-queue remains the function of the original RED while the second picks up the packets discarded by the first. Then, scheduling of the second-chance transmission of the packets in the secondary sub-queue is the key in achieving our objective. In this thesis, we considered two scheduling schemes: priority and weighted round robin. To evaluate the performance of R2Q with these two scheduling schemes, we implemented and evaluated them in the J-Sim network simulation environment. The well-known dumbbell network topology was adopted and we varied different parameters, such as round-trip time, bottleneck bandwidth, buffer size, WRR weight and so on, in order to understand how R2Q performs under different network configurations. We found that R2Q is more effective in the networks of sufficient buffer and larger product of RTT and bandwidth. With WRR, we may achieve as much as 2% improvement over the original RED. The improvement may be more in networks of even higher speed.

Due to the advances in content distribution and data center technologies, the traffic inside metropolitan area network (MAN) becomes more and more distributed. The current MAN architecture that only plays the role of bridge becomes insufficient to handle such new traffic patterns. Hence, the demand for a new MAN architecture is inevitable. It is expected to be both efficient and cost-effective. In this thesis, we proposed Optical Buffer Ring (OBR) as the solution of next generation MAN. It combines both OBS's low end-to-end delay and RPR's low loss rate. And compared to more advanced network architectures based on optical packet switching, OBR is of lower cost and thus more feasible in the near future. To evaluate the performance of OBR, we conducted simulation study over large set of parameters. According to the results, the performance of OBR indeed coincides with our expectation. Furthermore, OBR scales better than both OBS and RPR in that the end-to-end delay of OBR decreases as network size increases while the loss rate increases little with network size. Index Terms¡ÐMAN, WDM, OBS, OBR, RPR, HORNET, LightRing, Diffserv, optical packet switching.

We attempted to fabricate the CuInSe2:Sb thin-film solar cells with a Al/ZnO:Al(AZO)/ ZnSe /CuInSe2:Sb /Mo/soda-lime glass(SLG) structure. The growth of CuInSe2 film in the presence of Sb can effectively improve the surface morphology and benefit the growth of the device. A ZnSe buffer layer has been applied as an attractive alternative to a CdS buffer layer, thus eliminating environment from pollution. By varying the Ar pressure during the deposition, the Mo bilayer has been fabricated with both low resistivity and good adhesion. Currently the tensile stress was maintained below 100MPa, and the lowest sheet resistance achieved 0.205(£[/¡¼). The fabrication condition with a 5-cm sputtering distance could provide the lowest resistivity of 1.73¡Ñ10-3 (£[-cm) in the AZO thin-film that shows a transmittance of above 80¢Min the visible range. Applying the technology of optical lithography to deposit the Al metal front grid, the Al/ AZO ohmic contact resistance was improved. The energy conversion efficiency of the CIS thin-film solar cell (Al/ AZO/ ZnSe /CuInSe2 /Mo/ SLG) was 4.4¢M(Voc =0.41 V¡AI sc = 3.9 mA ¡AFF = 69 ¢M) by applying the irradiation with a solar simulator under one-sun (AM1.5, 100mW/cm2) conditions. However, the efficiency of CIS:Sb solar cell (Al/ AZO/ ZnSe /CuInSe2 :Sb /Mo/ SLG) was improved to to 6.0¢M(Voc =0.43 V¡AI sc = 5.15 mA ¡AFF = 68 ¢M). This result indicates that the CIS film growth with Sb can increase the short-circuit current.