A novel micromachining technology on SOI substrates is presented that is capable of producing on-chip high-Q resonators and resonator arrays equipped with high aspect-ratio (30:1) microstructures and nano-gap capacitive transducers filled with high-k dielectrics. The newly developed IC-compatible MEMS microfabrication process consists of merely three standard photolithography steps, which is much simpler than the other SOI-based resonator device technologies. In order to achieve the optimum performance and yield of the resonators and resonator arrays, this SOI-based fabrication process has been carefully designed and investigated step by step. For capacitively-transduced extensional mode (e.g., radial-contour and wine-glass mode) resonators, formation of nano-scale capacitive gaps and large resonator-to-electrode overlap area is essential for reducing the motional resistance Rx and DC bias voltage by strengthening the capacitive transduction. Atomic Layer Deposition (ALD) technology with superb conformability and uniformity as well as outstanding thickness controllability is used to deposit the ultra-thin layer (~10 nm) of high-k dielectric material that acts as the solid capacitive gaps, which allows the mass production of on-chip capacitively-transduced resonators and resonator arrays with greatly enhanced electromechancial coupling coefficient, and thus lower motional resistance and DC bias voltage. Using this technique, high-Q micromechanical resonators and resonator arrays on SOI substrates operating at ultra-high frequencies (UHF) have been developed. The ultimate goal of this project is to implement on-chip narrow-band micromechanical filters with unprecedented frequency selectivity and ultra-low insertion loss. By fine-tuning the nonlinear characteristics of the capacitive transducers enabled by the new SOI technology, novel on-chip mechanical signal processors for frequency manipulation, such as mixer and multiplier, will be investigated.

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The continued scaling of device dimensions in complementary metal oxide semiconductor (CMOS) technology within the sub-100 nm region requires an alternative high dielectric constant (high-k) oxide layer to counter high tunneling leakage currents, a metallic gate electrode to address polysilicon depletion, boron penetration and high polysilicon sheet resistance, and high mobility channel materials to boost the CMOS performance. Metal gates can also offer improved thermal and chemical stability, but their use requires that we improve our understanding of how the metal alloy phase, crystallographic orientation, and composition affect the electronic properties of the metal alloy-oxide interface. To replace n++ and p++ polysilicon gate electrodes and maintain scaled device performance requires metal gate electrodes with work functions within 0.2 eV of the silicon conduction and valence band edges, i.e., 5.0-5.2 and 4.1-4.3 eV, for PMOS and NMOS devices, respectively. In addition to work function and thermal/chemical stability, metal gates must be integrated into the CMOS process flow. It is the aim of this work to significantly expand our knowledge base in alloys for dual metal gates by carrying out detailed electrical and materials studies of the binary alloy systems of Ru with p-type metal Pt. Three n-type metals systems, Ru-Ta, Ru-Hf and Ru-Nb have also been partially investigated. This work also focuses on high mobility Ge p-MOSFETs for improved CMOS performance. DC magnetron sputtering has been used to deposit binary alloy films on thermally grown SiO2. The composition of the alloy films have been determined by Rutherford backscattering spectrometry and the identification of phases present have been made using x-ray and electron diffraction of samples. The microstructure of the phases of interest has been examined in the transmission electron microscope and film texture was characterized via x-ray diffraction. The electrical characterization includes basic resistivity measurements, and work function extraction. The work function has been determined from MOS capacitor and Schottky diodes. The need for electron and hole mobility enhancement and the progress in the development of high-k gate stacks, has lead to renewed interest in Ge MOSFETs. The p-MOS mobility data for Ge channel devices have been reported. The results indicate greater than 2 x improvements in device mobility as compared to standard Si device. A low frequency noise assessment of silicon passivated Ge p-MOSFETs with a TiN/TaN/HfO2 gate stack has been made. For the first time we also report results on low frequency noise characterisation for a Ge P+- n junctions with and without Ni germanidation.

La miniaturisation des composants CMOS (Complementary Metal Oxide Semiconductor) impose l’emploi de matériaux diélectriques de permittivité élevée. LaAlO3 et SrTiO3 sont aujourd’hui parmi les meilleurs candidats ; toutefois, la diffusion de l’oxygène dans ces matériaux conduit à la dégradation des propriétés électriques et de l’interface avec le silicium. Ce travail théorique a pour but d’étudier les facteurs gouvernant, à l’échelle de la liaison chimique, la diffusion de l’ion oxygène. L’approche choisie repose sur la théorie de la fonctionnelle de la densité (DFT), couplée à des méthodes d’analyse de la densité électronique, et sur le développement d’un outil original : les cartes de densité d’énergie. Les régions de la densité électronique contribuant à la barrière de diffusion ont ainsi pu être identifiées; une optimisation de ces matériaux à l’échelle de la liaison chimique peut alors être envisagée. / The miniaturization of CMOS (Complementary Metal Oxide Semiconductor) components requires the use of high dielectric permittivity materials as gate oxide. LaAlO3 and SrTiO3 are among the best candidates, but the oxygen diffusion in these materials leads to the degradation of both the electrical properties and the interface with silicon. In this context, the aim of this theoretical work is to study the factors governing the oxygen ion diffusion at the chemical bonding scale. This approach is based on Density Functional Theory (DFT), coupled with electron density analysis methods, and the pioneering development of energy density cards. The regions of the electron density contributing to the diffusion barrier have been identified allowing new routes of optimization of these materials across the chemical bonding.

Nanokristalle werden beispielsweise für eine Anwendung in Solarzellen, Lichtemittern und nichtflüchtigen Datenspeichern diskutiert. Damit diese Anwendungen funktionieren können, ist eine genaue Kontrolle der Kristallitgröße sowie der Flächendichte und Lage der Kristallite in der Matrix wichtig. Zudem sollte die Matrix amorph sein, da amorphe Matrixmaterialien die Nanokristall-Oberfläche besser passivieren und beständiger gegen Leckströme sind. In dieser Arbeit werden Ge-Nanokristalle in die Hoch-Epsilon-Dielektrika ZrO2 und TaZrOx eingebettet. Im System Ge/ZrO2 kristallisieren die Ge-Cluster und die ZrO2-Matrix bei der gleichen Temperatur. Aufgrund der kristallinen Matrix weicht die Form der Ge-Nanokristalle von einer Kugel ab, worunter unter anderem die Größenkontrolle leidet. Die Beimischung von Ta2O5 stabilisiert die amorphe Phase des ZrO2 und verhindert dadurch die gemeinsame Kristallisation. Dadurch wird es im System Ge/TaZrOx möglich, kugelförmige Ge-Nanokristalle im Größenbereich von 3 nm bis 6 nm positionskontrolliert in eine amorphe Matrix einzubetten. Für die Untersuchung einer möglichen Anwendung des Materialsystems wurden Speicherzellen eines nichtflüchtigen Datenspeichers auf Basis von Ge-Nanokristallen hergestellt. Dabei zeigte sich, dass das System Ge/TaZrOx überdurchschnittlich viele Ladungen speichert und daher für diese Anwendung vielversprechend ist. Zudem stabilisiert die Beimischung von Ta2O5 eine extrem seltene orthorhombische Modifikation des ZrO2. Für ferroelektrische Datenspeicher könnte diese Phase eine aussichtsreiche Alternative zum HfO2 sein.

We report and discuss the performance of an enhancement mode n-channel pseudo-vertical GaN metal oxide semiconductor field effect transistor (MOSFET). The trench gate structure of the MOSFET is uniformly covered with an Al₂O₃ dielectric and TiN electrode material, both deposited by atomic layer deposition (ALD). Normally-off device operation is demonstrated in the transfer characteristics. Special attention is given to the estimation of the active acceptor concentration in the Mg doped body layer of the device, which is crucial for the prediction of the threshold voltage in terms of device design. A method to estimate the electrically active dopant concentration by applying a body bias is presented. The method can be used for both pseudo-vertical and truly vertical devices. Since it does not depend on fixed charges near the channel region, this method is advantageous compared to the estimation of the active doping concentration from the absolute value of the threshold voltage.

This thesis presents the development of integrated silicon photonic devices. These devices are compatible with the present and near future CMOS technology. High-khorizontal grating couplers and waveguides are proposed. This work consists of simulations and device design, as well as the layout for the fabrication process, device fabrication, process development, characterization instrument development and electro-optical characterizations. The work demonstrates an alternative solution to costly silicon-on-insulator photonics. The proposed solution uses bulk silicon wafers and thin film deposited waveguides. Back-end deposited horizontal slot grating couplers and waveguides are realized by multi-layers of amorphous silicon and high-k materials. The achievements of this work include: A theoretical study of fully etched slot grating couplers with Al2O3, HfO2 and AIN, an optical study of the high-k films with spectroscopic ellipsometry, an experimental demonstration of fully etched SiO2 single slot grating couplers and double slot Al2O3 grating couplers, a practical demonstration of horizontal double slot high-k waveguides, partially etched Al2O3 single slot grating couplers, a study of a scheme for integration of the double slot Al2O3  waveguides with selectively grown germanium PIN photodetectors, realization of test chips for the integrated germanium photodetectors, and study of integration with graphene photodetectors through embedding the graphene into a high-k slot layer. From an application point of view, these high-k slot waveguides add more functionality to the current silicon photonics. The presented devices can be used for low cost photonics applications. Also alternative optical materials can be used in the context of this photonics platform. With the robust design, the grating couplers result in improved yield and a more cost effective solution is realized for integration of the waveguides with the germanium and graphene photodetectors. / <p>QC 20141114</p>

Doctor of Philosophy / Department of Chemical Engineering / James H. Edgar / The integration of high-κ dielectrics with silicon and III-V semiconductors is important due to the need for high speed and high power electronic devices. The purpose of this research was to find the best conditions for fabricating high-κ dielectrics (oxides) on GaN or Si. In particular high-κ oxides can sustain the high breakdown electric field of GaN and utilize the excellent properties of GaN. This research developed an understanding of how process conditions impact the properties of high-κ dielectric on Si and GaN. Thermal and plasma-assisted atomic layer deposition (ALD) was employed to deposit TiO₂ on Si and Al₂O₃ on polar (c-plane) GaN at optimized temperatures of 200°C and 280°C respectively. The semiconductor surface treatment before ALD and the deposition temperature have a strong impact on the dielectric’s electrical properties, surface morphology, stoichiometry, and impurity concentration. Of several etches considered, cleaning the GaN with a piranha etch produced Al₂O₃/GaN MOS capacitors with the best electrical characteristics. The benefits of growing a native oxide of GaN by dry thermal oxidation before depositing the high-κ dielectric was also investigated; oxidizing at 850°C for 30 minutes resulted in the best dielectric-semiconductor interface quality. Interest in nonpolar (m-plane) GaN (due to its lack of strong polarization field) motivated an investigation into the temperature behavior of Al₂O₃/m-plane GaN MOS capacitors. Nonpolar GaN MOS capacitors exhibited a stable flatband voltage across the measured temperature range and demonstrated temperature-stable operation.

L'objectif de cette thèse était l’étude de dispositifs électroniques à base de pérovskites hybrides. Dans ce cadre nous avons développé et fabriqué des transistors à effet de champ (FET) ainsi que des cellules solaires à base de perovskite. Dans le cas des transistors, en utilisant des couches minces de pérovskites hybride hautement cristallisées nous avons réalisé des transistors ambipolaires fonctionnant à la température ambiante et présentant une hystérésis faible, une transconductance élevée (pour ce type de matériau), et un rapport Ion / Ioff> 104. Dans le cadre de cette thèse l’utilisation de plusieurs diélectriques nous a permis d’obtenir une forte modulation de la conductance du canal avec des tensions de grille relativement faibles (4-6V). Dans ce cadre l’oxyde d’Hafnium de permittivité relative er=23.5 a montré de très bonnes performances et une très bonne compatibilité pour la croissance de pérovskite hybride. Après plusieurs étapes de polarisation les dispositifs ont présenté un fonctionnement stabilisé et ont été mesurés au cours des cycles consécutifs pendant 14 heures avec peu de changement dans leurs performances. Nous avons mis en évidence que l’augmentation du champ électrique a permis la formation d’un canal de trous à l’interface. La polarisation consécutive des dispositifs à base de HfO2/pérovskite a amené à la création d’un second courant d’électrons et a mis en évidence un fonctionnement ambipolaire final. L’ensemble des dispositifs ont présenté une hystérésis dont l’amplitude était parfois non négligeable. Cela a démontré la présence de charges mobiles ioniques aux interfaces qui influence les courants de sorties du dispositif. Dans la dernière partie de la thèse nous nous sommes intéressés à la croissance de pérovskite hybride pour la production de cellules solaires. Nous avons étudié les deux conditions de croissance suivantes : conditions sous air normal (humidité relative> 60%) et en atmosphère d’azote en boites à gants (humidité relative <0.1 ppm). Par ces deux voies nous avons obtenu respectivement des rendements de conversion photovoltaïque respectivement de 5% et 8%. / The objective of this thesis was the study of electronic devices based on hybrid perovskites. In this context we have developed and produce field effect transistors (FETs) and solar cells based on hybrid perovskite material. In the case of transistors, using thin layers of highly crystallized hybrid perovskites we have made ambipolar transistors operating at room temperature and having low hysteresis, high transconductance (for this type of material) and a ratio of Ion / Ioff > 104. In the context of this thesis, the use of several dielectrics allowed us to obtain a high modulation of the channel conductance with relatively low gate voltages (4-6V). Hafnium oxide with relative permittivity er = 23.5 showed very good performances and a very good compatibility for the hybrid perovskite growth. After several polarization steps the devices exhibited stabilized operation and were measured in consecutive cycles for 14 hours with small change in their performance. We have shown that the increase of the electric field allowed the formation of a hole channel at the interface. The successive polarization of HfO2 / perovskite-based devices led to the creation of a second electron current and demonstrated a final ambipolar device. All the devices presented a hysteresis with amplitude sometimes not negligible. This demonstrated the presence of mobile ion charges at the interfaces that influence the output currents of the device. In the last part of the thesis we focused our work in hybrid perovskite growth for the production of solar cells. We have studied two growth conditions: conditions under normal air (relative humidity> 60%) and nitrogen atmosphere in glove boxes (relative humidity <0.1 ppm). By these two paths we obtained photovoltaic conversion efficiencies of 5% and 8% respectively.

Foram estudados filmes de oxinitreto de silício obtidos por PECVD à 320°C, a partir da mistura gasosa de N2O+SiH4+He, com diferentes valores de pressão e potência de deposição com o objetivo de produzir boa qualidade de interface deste material com o Si e de obter uma baixa densidade de carga efetiva visando a aplicação desses filmes em dispositivos semicondutores MOS. Os resultados mostraram que com uma pressão de deposição de 0,160 mbar e potências menores que 125 W/cm2 é possível obter um valor de densidade de estados de interface (Dit) de 4x1010 eV-1.cm-2, campo elétrico de ruptura (Ebd) de 13 MV/cm, valores comparáveis ao SiO2 térmico e uma densidade de carga efetiva (Nss) de 4x1011 cm-2. Segundo resultados experimentais esse valor de Nss é o mínimo possível que se pode atingir com a limpeza química utilizada em nosso laboratório. Pode-se dizer que estes são resultados bastante interessantes considerando que se trata de um material obtido por PECVD à baixa temperatura, porém viável para aplicação em dispositivos MOS. Iniciando os estudos com dielétricos de maiores valores de constante dielétrica optamos por estudar filmes de TiOx (k=40-100), obtidos por sputtering reativo, a partir da mistura gasosa de Ar+O2 e utilizando alvo de Ti. Foram fabricados capacitores MOS com estes filmes e obteve-se valores de constante dielétrica que variaram de 40-160. Porém esses materiais ainda apresentavam valores apreciáveis de corrente de fuga que foram minimizadas em ordens de grandeza quando utilizados dielétricos de dupla camada com SiO2 ou SiOxNy (otimizado neste trabalho) na interface, além de se observar uma melhora significativa da qualidade de interface. Utilizando dupla camada dielétrica com filmes de SiOxNy e SiO2, ainda espessos (³ 1nm) para camada intermediária, obteve-se uma constante dielétrica efetiva em torno de 20. Vale ressaltar que os dois filmes SiOxNy e TiOx, conseqüentemente a dupla camada, foram fabricados a baixas temperaturas. / Silicon oxynitride films obtained by the PECVD technique from N2O+SiH4+He gaseous mixtures, at 320°C, with different deposition pressure and RF power were studied intending to improve the interface quality with Si, decreasing the effective charge density and the interface state density in order to utilize them in MOS semiconductor devices. The results showed that with a deposition pressure of 0.160 mbar and a RF power density lower than 125 W/cm2 it is possible to obtain interface state density (Dit) values of 4x1010 eV-1.cm-2, Electrical Breakdown (Ebd) of 13 MV/cm, comparable with the obtained for thermally grown SiO2 , and an effective charge density (Nss) of 4x1011 cm-2. According with experimental results this Nss value is the minimum attainable with our chemical cleaning process. In this way it can be said that these results are very promising, considering that these materials were obtained by PECVD at low temperatures, but still viable for MOS devices application. In order to initiate studies with high dielectrics constant material, TiOx films (k= 40-180), obtained by reactive sputtering through the Ar+O2 gaseous mixture utilizing a Ti target, were chosen. MOS capacitors with these films were fabricated and dielectric constant values varying from 40 to 160 were obtained. However, until now, these materials have presented appreciable leakage current values, which were, minimize by orders of magnitude with the addition of a thin SiO2 or SiOxNy (optimized in this work) layer at the interface were utilized. This thin layer also resulted in a significant improvement of the interface quality. Utilizing double dielectric layer with SiOxNy or SiO2, still thick (³ 1nm) as intermediate layer a dielectric constant value of 20 was obtained. Its important to mention that the SiOxNy and TiOx films, and consequently the double layer, were deposited at low temperatures.