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Reduced Switch Count Multi-Level Inverter Structures With Common Mode Voltage Elimination And DC-Link Capacitor Voltage Balancing For IM DrivesMondal, Gopal 07 1900 (has links)
Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. Voltage operation above semiconductor device limits, lower common mode voltages, near sinusoidal outputs together with small dv/dt’s, are some of the characteristics that have made this power converters popular for industry and modern research. However, the existing solutions suffer from some inherent drawbacks like common mode voltage problem, DC-link capacitor voltage fluctuation etc. Cascaded multi-level inverter with open-end winding induction motor structure promises significant improvements for high power medium-voltage applications. This dissertation investigates such cascaded multi-level inverters for open-end winding induction motor drive with reduced switch count. Similar to the conventional two-level inverters, other multi-level inverters with PWM control generate alternating common mode voltage (CMV). The alternating common mode voltage coupled through the parasitic capacitors in the machine and results in excessive bearing current and shaft voltage. The unwanted shaft voltage may cross the limit of insulation breakdown voltage and cause motor failure. This alternating common mode voltage adds to the total leakage current through ground conductor and acts as a source of conducted EMI which can interfere with other electronic equipments around.
As the number of level increase in the inverter, different voltage levels are made available by using DC-link capacitor banks, instead of using different isolated power supplies. The intermediate-circuit capacitor voltages which are not directly supplied by the power sources are inherently unstable and require a suitable control method for converter operation, preferably without influence on the load power factor. Apart from normal operation, the sudden fault conditions may occur in the system and it is necessary to implement the control strategy considering this condition also.
A five-level inverter topology with cascaded power circuit structure is proposed in this dissertation with the strategy to eliminate the common mode voltage and also to maintain the balance in the DC-link capacitor voltages. The proposed scheme is based on a dual five-level inverter for open-end winding induction motor. The principle achievement of this work is the reduction of power circuit complexity in the five-level inverter compared to a previously proposed five-level inverter structure for open-end winding IM drive with common mode voltage elimination. The reduction in the number of power switching devices is achieved by sharing the two two-level inverters for both the inverter structures. The resultant inverter structure can produce a nine-level voltage vector structure with the presence of alternating common mode voltage. The inverter structure is formed by cascading conventional two-level inverters together with NPC three-level inverters. Thus it offers modular and simpler power bus structure. As the power circuit is realised by cascading conventional two-level and NPC three-level inverters the number of power diodes requirements also reduced compared to the conventional NPC five-level inverters. The present proposed structure is implemented for the open-end winding induction motor and the power circuit offers more number of switching state redundancies compared to any conventional five-level inverter. The inverter structure required half the DC-link voltage compared to the DC-link voltage required for the conventional five-level inverter structure for induction motor drive and this reduces the voltage stress on the individual power devices. The common mode voltage is eliminated by selecting only the switching states which do not generate any common mode voltage in pole voltages hence there will be no common mode voltage at the motor phase also. The technique of using the switching state selection for the common mode voltage elimination, cancels out the requirement of the filter for the same purpose. As the inverter output is achieved without the presence of common mode voltage, the dual inverter can be fed from the common DC-link sources, without generating any zero sequence current. Hence the proposed dual five-level inverter structure requires only four isolated DC supplies.
The multi-level inverters supplied by single power supply, have inherent unbalance in the DC-link capacitor voltages. This unbalance in the DC-link capacitor voltages causes lower order harmonics at the inverter output, resulting in torque pulsation and increased voltage stress on the power switching devices. A five-level inverter with reduced power circuit complexity is proposed to achieve the dual task of eliminating common mode voltage and DC-link capacitor voltage balancing. The method includes the analysis of current through the DC-link capacitors, depending on the switching state selections. The conditions to maintain all the four DC-link capacitor voltages are analysed. In an ideal condition when there is no fault in the power circuit the balance in the capacitor voltages can be maintained by selecting switching states in consecutive intervals, which have opposite effect on the capacitor voltages. This is called the open loop control of DC-link capacitor voltage balancing, since the capacitor voltages are not sensed during the selection of the switching states. The switching states with zero common mode voltages are selected for the purpose of keeping the capacitor voltages in balanced condition during no fault condition. The use of any extra hardware is avoided. The proposed open loop control of DC-link capacitor voltage balancing is capable of keeping the DC-link capacitor voltages equal in the entire modulation region irrespective of the load powerfactor. The problem with the proposed open loop control strategy is that, it can not take any corrective action if there is any initial unbalance in the capacitor voltages or if any unbalance occurs in the capacitor voltages during operation of the circuit,. To get the corrective action in the capacitor voltages due occurrence of any fault in the circuit, the strategy is further improved and a closed loop control strategy for the DC-link capacitor voltages is established. All the possible fault conditions in the four capacitors are identified and the available switching states are effectively used for the corrective action in each fault condition. The strategy is implemented such a way that the voltage balancing can be achieved without affecting the output fundamental voltage.
The proposed five-level inverter structure presented in this thesis is based on a previous work, where a five-level inverter structure is proposed for the open-end winding induction motor. In that previous work 48 switches are used for the realization of the power circuit. It is observed that all the available switching states in this previous work are not used for any of the performance requirement of CMV elimination or DC-link voltage balancing. So, in this proposed work, the power circuit is optimized by reducing some of the switches, keeping the performance of the inverter same as the power circuit proposed in the previous work. The five-level inverter proposed in this thesis used 36 switches and the number of switching states is also reduced. But, the available switching states are sufficient for the CMV elimination and DC-link capacitor voltage balancing.
The advantage of the modular circuit structure of this proposed five-level inverter is further investigated and the inverter structure is modified to a seven-level inverter structure for the open end winding induction motor. The proposed power circuit of the seven-level inverter uses only 48 switches, which is less compared to any seven-level inverter structure for the open end winding induction motor with common mode voltage elimination. The power circuit is reduced by sharing four two-level inverters to both the individual seven-level inverters in both the sides of the of the open end winding induction motor. The cascaded structure eliminates the necessity of the power diodes as required by the conventional NPC multilevel inverters. The proposed seven-level inverter is capable of producing a thirteen-level voltage vector hexagonal structure with the presence of common mode voltage. The common mode voltage elimination is achieved by selecting only the switching states with zero common mode voltage from both the inverters and the combined inverter structure produce a seven-level voltage vector structure with zero common mode voltage. The switching frequency is also reduced for the seven-level inverter compared to the proposed five-level inverter. The advantage of this kind of power circuit structure is that the number of power diode requirement is same in both five-level and seven-level inverters. Since there is no common mode voltage in the output voltages, the dual seven-level inverter structure can be implemented with the common DC-link voltage sources for both the sides. Six isolated power supplies are sufficient for both the seven-level inverters.
The available switching states in this proposed seven-level inverter are further analysed to implement the open loop and closed loop capacitor voltage balancing and this allow the power circuit to run with only three isolated DC supplies.
All the proposed work presented in this thesis are initially simulated in SIMULINK toolbox and then implemented in a form of laboratory prototype. A 2.5KW open end winding induction motor is used for the implementation of these proposed works. But all these work general in nature and can be implemented for high power drive applications with proper device ratings.
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Flexibility in MLVR-VSC back-to-back linkTan, Jiak-San January 2006 (has links)
This thesis describes the flexible voltage control of a multi-level-voltage-reinjection voltage source converter. The main purposes are to achieve reactive power generation flexibility when applied for HVdc transmission systems, reduce dynamic voltage balancing for direct series connected switches and an improvement of high power converter efficiency and reliability. Waveform shapes and the impact on ac harmonics caused by the modulation process are studied in detail. A configuration is proposed embracing concepts of multi level, soft-switching and harmonic cancellation. For the configuration, the firing sequence, waveform analysis, steady-state and dynamic performances and close-loop control strategies are presented. In order not to severely compromise the original advantages of the converter, the modulated waveforms are proposed based on the restrictions imposed mathematically by the harmonic cancellation concept and practically by the synthesis circuit complexity and high switching losses. The harmonic impact on the ac power system prompted by the modulation process is studied from idealistic and practical aspects. The circuit topology being proposed in this thesis is developed from a 12-pulse bridge and a converter used classically for inverting power from separated dc sources. Switching functions are deduced and current paths through the converter are analysed. Safe and steady-state operating regions of the converter are studied in phasor diagrams to facilitate the design of simple controllers for active power transfer and reactive power generations. An investigation into the application of this topology to the back-to-back VSC HVdc interconnection is preformed via EMTDC simulations.
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[pt] CONTROLE DO INVERSOR DE UMA USINA FOTOVOLTAICA PARA MELHORA DA ESTABILIDADE TRANSITÓRIA DE UMA MÁQUINA SÍNCRONA / [en] PROPOSED INVERTER CONTROL OF A PHOTOVOLTAIC GENERATION UNIT FOR THE IMPROVEMENT OF THE TRANSIENT STABILITY OF A SYNCHRONOUS MACHINEOSCAR CUARESMA ZEVALLOS 08 April 2021 (has links)
[pt] O incremento de geração fotovoltaica de grande porte traz consideráveis mudanças nas características operativas e dinâmicas do sistema quando este é submetido a grandes distúrbios. Um dos problemas
técnicos mais relevantes é a estabilidade transitória, já que a geração intermitente ligada ao sistema por conversores eletrônicos não contribui para o aumento da inércia total do sistema. Entretanto, os conversores eletrônicos podem, potencialmente, trazer novas oportunidades de controle rápido para
dar suporte aos geradores síncronos em resposta a um distúrbio severo. No presente trabalho propõe uma estratégia de controle para inversores fotovoltaicos baseado na injeção da corrente com um grande impacto na resposta transitória do ângulo do rotor da máquina síncrona, identificada
através da análise de sensibilidade dos autovalores e dos fatores de participação. Ao fazer isso, é possível aumentar a potência ativa da máquina síncrona próximo do seu valor pré-falta, reduzindo o desequilíbrio entre o torque elétrico e mecânico. A estratégia de controle proposta foi testada experimentalmente, utilizando um inversor e uma montagem máquina síncrona-motor e, através da simulação de um sistema híbrido com um sistema fotovoltaico de grande porte. Os resultados mostram que a estratégia
de controle proposta não está apenas em conformidade com os requisitos dos código da rede para melhorar a estabilidade da tensão durante uma perturbação grave, mas também é capaz de manter a estabilidade transitória da rede provando, assim, ser uma melhor alternativa em relação à capacidade
FRT requerida pelos códigos de rede. / [en] The increase in photovoltaic generation has caused changes in the
power system s operative and dynamic characteristics when subjected to
severe disturbances. One of the most relevant problems associated with this
renewable energy source is the transient stability, as renewable generation
connected to the system by electronic converters does not contrinute to the
increase of the total inertia of the system. However, electronic converters can
potentially bring new opportunities for rapid control to support synchronous
generators in response to severe disturbance. The present work proposes a
control strategy for photovoltaic inverters based on the injection of the
current with a major impact on the transient response of the synchronous
machine rotor angle, identified through the eigenvalue sensitivity analysis
and the participation factors. By doing so, it is possible to increase the
synchronous machine active power output close to its pre-fault value,
reducing the disequilibrium between mechanical and electrical torque. The
proposed control strategy was experimentally tested using an inverter and
a synchronous-motor machine assembly and, by simulating a hybrid system
with a large photovoltaic system. The results show that the proposed control
strategy not only conforms to the grid codes requirements to improve voltage
stability during a severe disturbance, but is also able to maintain transient
stability thus proving to be a better alternative to the FRT capability
required by the grid codes.
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Σχεδίαση φίλτρων με μεγάλες σταθερές χρόνου και χαμηλή τάση τροφοδοσίας στο πεδίο του λογαρίθμουΚαφέ, Φιλομήλα 11 July 2013 (has links)
Οι εφαρμογές της σύγχρονης τεχνολογίας επιτάσσουν τη χρήση συσκευών με όσο το δυνατόν μικρότερες διαστάσεις, χαμηλή τάση τροφοδοσίας, χαμηλή κατανάλωση ισχύος και ταυτόχρονα υψηλές επιδόσεις.
Το αντικείμενο της εργασίας αυτής, αφορά στη σχεδίαση αναλογικών ολοκληρωμένων φίλτρων, χαμηλής τάσης τροφοδοσίας, για υλοποίηση μεγάλων σταθερών χρόνου, στο πεδίο του λογαρίθμου. Προς αυτή την κατεύθυνση, μελετώντας και σχεδιάζοντας δομές αναλογικών φίλτρων στο πεδίο του λογαρίθμου, επιτεύχθηκε η σχεδίαση φίλτρων δεύτερης τάξης με μεγάλες σταθερές χρόνου, διατηρώντας τις φυσικές διαστάσεις των κυκλωμάτων σε εξαιρετικά χαμηλά επίπεδα.
Αρχικά, παρουσιάζονται κάποια εισαγωγικά στοιχεία για την σχεδίαση ολοκληρωμένων κυκλωμάτων σε περιβάλλον χαμηλής τάσης τροφοδοσίας. Γίνεται εισαγωγή στην ιδέα των λογαριθμικών φίλτρων και αναλύονται οι βασικές αρχές σχεδίασης. Παρουσιάζονται βασικά χαρακτηριστικά των κυκλωμάτων στο πεδίο του λογαρίθμου, καθώς και ανάλυση των τελεστών και των διαγωγών που αποτελούν τη βάση της σχεδίασης στο λογαριθμικό πεδίο. Επιπλέον, παρουσιάζονται οι υλοποιήσεις των ολοκληρωτών των φίλτρων στο πεδίο του λογαρίθμου.
Στη συνέχεια, γίνεται τοπολογική εξομοίωση 2ης τάξης βαθυπερατών φίλτρων στο πεδίο του λογαρίθμου. Σχεδιάζονται φίλτρα με την κλασική μέθοδο υλοποίησης, κάνοντας χρήση ισοδύναμων των παθητικών στοιχείων στο λογαριθμικό πεδίο, αλλά και φίλτρα υλοποιημένα με διάγραμμα ροής (SFG). Παρουσιάζονται τα πρώτα αποτελέσματα των εξομοιώσεων που πραγματοποιήθηκαν με το λογισμικό Cadence και το γραφικό περιβάλλον που διαθέτει για την σχεδίαση αναλογικών ηλεκτρονικών κυκλωμάτων (Virtuoso Analog Environment).
Προτείνονται, δύο κυκλώματα τα οποία πραγματοποιούν πολλαπλασιασμό της χωρητικότητας των πυκνωτών, επιτυγχάνοντας έτσι μεγάλες σταθερές χρόνου, και η υλοποίηση νέων ολοκληρωτών που κάνουν χρήση των πολλαπλασιαστών. Δημιουργούνται έτσι οι βάσεις για την υλοποίηση φίλτρων με εξαιρετικά μικρές διαστάσεις, των οποίων η σχεδίαση, η εξομοίωση και η φυσική σχεδίαση (layout design) παρουσιάζονται, αναλύονται και συγκρίνονται. / The technological evolution and market requirements have led to an increasing demand of low - power portable devices, featuring the reduced size of the devises and high efficiency.
This M.Sc project deals with the design of analog integrated, Log - Domain filters, for low - voltage implementation, with large time - constants. In this direction, the design of a second order, low - pass filter, with the above features, and with the occupied silicon area maintained at very low levels, was achieved.
In Chapters 1 and 2, an introduction to the design of integrated circuits in low voltage environment is presented. There is an introduction to the idea and the basic principles of Log - Domain filters. The key characteristics of circuits in a large signal operation point of view, and an analysis of the operators and the exponential transconductor cells are, also presented. Furthermore, the basic Log - Domain integrators has been analyzed.
A topologic analysis of second order Log - Domain filters is given in Chapter 3. Filters has been initially designed firstly with the classic implementation, using Log - Domain equivalent of passive elements. In a second step, the filter has been realizes by employing the signal flow diagram (SFG) representation. These filters were simulated with the Analog Design environment of the Cadence software. the obtained simulation results confirmed the correct operation of the circuit.
Two implementations for realizing the Log - Domain equivalent of a capacitor multiplier are introduced. In addition, implementations of new Log - Domain integrators, that use the capacitor multipliers, are given in Chapter 4. Using these implementations, Log - Domain filters, with reduced total area and large time - constants, are designed, simulated and characterized in Chapter 5. Finally, the layout design of a second - order has been performed in Chapter 6 and the provided post - layout simulation results show that the performance of the filter was close to that of the filter realized in schematic level.
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Uma abordagem Lagrangiana na otimização Volt/VAr em redes de distribuição / A Lagrangian approach in the Volt/VAr optimization in distribution networksVasconcelos, Fillipe Matos de 12 April 2017 (has links)
Este projeto de pesquisa propõe desenvolver um novo modelo e uma nova abordagem para a resolução do problema da otimização Volt/VAr em redes de distribuição de energia elétrica. A otimização Volt/VAr consiste em, basicamente, determinar os ajustes das variáveis de controle tais como bancos de capacitores chaveados, transformadores com comutação de tap sob carga e reguladores de tensão, de modo a satisfazer, simultaneamente, as restrições de carga e de operação para um dado objetivo operacional. Esse problema, matematicamente, foi formulado como um problema de programação não linear, multiperíodo, e com variáveis contínuas e discretas. Algoritmos de programação não linear foram utilizados com o intuito de aproveitar as vantagens das matrizes altamente esparsas montadas ao longo do método de solução. Para utilizar tais algoritmos, as variáveis discretas são tratadas como contínuas por meio da utilização de funções senoidais que penalizam a função objetivo do problema original enquanto estas não convergirem para algum dos pontos pré-definidos no seu domínio. O caráter multiperíodo do problema, contudo, refere-se à consideração de uma restrição que relaciona os ajustes das variáveis de controle para sucessivos intervalos de tempo na medida em que limita o número de operações de chaveamento desses dispositivos para um período de 24-horas. O estudo fundamenta-se, metodologicamente, em métodos do tipo Primal-Dual Barreira-Logarítmica. Para demonstrar a eficiência do modelo proposto e a robustez dessa abordagem, a partir de dados teóricos obtidos de levantamentos bibliográficos, testes foram realizados em sistemas-teste de 10, 69 e 135 barras, e em um sistema de 442 barras do noroeste do Reino Unido. As implementações computacionais foram feitas nos softwares MATLAB, AIMMS e GAMS, utilizando o solver IPOPT como método de solução. Os resultados mostram que a abordagem proposta para a resolução do problema de programação não linear é eficaz para tratar adequadamente todas as variáveis presentes em problemas de otimização Volt/VAr. / This work proposes a new model and a new approach for solving the Volt / VAr optimization problem in distribution systems. The Volt/VAr optimization consists, basically, to determine the settings of the control variables of switched capacitor banks, on-load tap changer transformers and voltage regulators, in order to satisfy both the load and operational constraints, to a given operational objective. The problem is formulated as a nonlinear programming problem, multiperiod, and with continuous and discrete variables. Nonlinear programming algorithms were used in order to take advantage of the highly sparse matrices built along the solution method. The discrete variables are treated as continuous along the solution method by means of the use of sinusoidal functions that penalize the original objective function while the control variables do not converge to any of the predefined discrete points in its domain. The multiperiod, or dynamic, characteristic of the problem, however, refers to the use of a constraint that relates the settings of the control variables for successive time intervals that limits the control devices switching operations number for a period of 24-hours. The study is based, methodologically, on Primal-Dual Logarithmic Barrier method. To demonstrate the effectiveness of the proposed model and the robustness of this approach, the data were obtained from theoretical literature surveys, and tests were performed on test-systems of 10, 69 and 135 buses, and in a 442 buses located in the Northwest of the United Kingdom. The computational implementation was accomplished in the softwares MATLAB, AIMMS and GAMS, using the IPOPT solver as solution method. The results have shown the approach for solving nonlinear programming problems is effective to appropriate cope with all the variables presented in Volt/VAr optimization problems.
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Etude des composants passifs pour l'électronique de puissance à "haute température" : application au filtre CEM d'entrée / Passive components for high temperature power electronics : application to the EMI input filterRobutel, Rémi 17 November 2011 (has links)
Les travaux présentés dans ce manuscrit sont dédiés à l'étude des composants passifs pour l'électronique de puissance à haute température. Des condensateurs et des matériaux magnétiques sont sélectionnés et caractérisés jusqu'à environ 250°C. Les caractéristiques électriques et électromagnétiques montrent, pour certains de ces composants et matériaux, des dépendances significatives en fonction de la température, mais également des non-linéarités et des phénomènes d'hystérésis. Les caractérisations sont ensuite exploitées pour la conception d'un filtre CEM d'entrée d'un onduleur de tension de 2kW. Une démarche et des considérations liées au dimensionnement d'un filtre sont détaillées. Un démonstrateur de filtre CEM est testé en charge et à haute température (200°C). Les résultats montrent une dépendance relativement faible des perturbations conduites entre 150kHz et 30MHz en fonction de la température (environ +6dBµA entre 25°C et 200°C selon la norme DO-160F). Le fonctionnement à haute température de composants passifs au sein d'un filtre CEM pour l'électronique de puissance a été démontré. En complément du filtre à composant discret et pour répondre aux besoins d'atténuation à haute fréquence qui seront accrus pour les convertisseurs à base de semi-conducteurs à grand gap (SiC et GaN) qui commutent plus rapidement que des interrupteurs de type IGBT en Si, nous avons proposé l'intégration de condensateurs de mode commun au sein d'un module de puissance. Les résultats simulés et expérimentaux ont montré une réduction des perturbations conduites grâce à l'intégration de ces condensateurs. Cette solution, compatible avec un fonctionnement à haute température, est positionnée comme une solution alternative à un filtre d'entrée complexe (multi-niveaux) et s'inscrit dans la tendance actuelle des IPEM (Intelligent/Integrated Power Electronics Module) qui recherche l'intégration de fonctions dans le module de puissance. L'ensemble de ces travaux souligne par ailleurs l'importance du packaging pour l'électronique de puissance à haute température. / The study, which is described in this dissertation, is dedicated to passive components in order to be integrated into high temperature power electronic converters. Capacitors and magnetic materials are selected and characterized up to 250°C. Electrical and electromagnetic characteristics are measured. Some components show a significant temperature deviation, but also a non-linear behavior with a hysteresis phenomenon. Based on these characteristics, a high temperature EMI filter for a 2kW voltage inverter is designed. The design procedure and some practical considerations are discussed. Then, the experimental results from the prototype at 200°C under full load conditions are given. The variation of the conducted emissions, from 150kHz and 30MHz, with the temperature is low (about +6dBµA between 25°C and 200°C into a DO-160F setup). The feasibility of a working EMI filter for high temperature power electronics is demonstrated. To meet the high frequency EMI requirements, with wide-band gap semi-conductors devices which are faster than Si IGBT, a solution based on integrated common mode capacitors into the power module is proposed. With this solution, operation at high temperature is also doable. Experimental results show a reduction of the conducted emissions thanks to these integrated capacitors. We consider this solution as an alternative against an increased complexity of the EMI input filter. It follows the present trends toward the integration of functions into a power module, close to the power switches. Moreover, packaging issues are highlighted and remains as a major limitation for high temperature power electronics.
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Etude d'électrolytes organiques pour la réalisation de supercondensateurs lithium-ion / Study of electrolytes for lithium-ion capacitorsDahbi, Mouad 25 January 2013 (has links)
Le travail réalisé dans cette thèse concerne l'optimisation d’électrolytes organiques pour supercondensateur lithium-ion. Plusieurs solvants ont été sélectionnés pour la formulation de mélanges binaires ou ternaires additionnés de sel de lithium. Les propriétés physicochimiques et électrochimiques de ces électrolytes contenant LiTFSI ou LiPF6 (EC/DMC ; dinitrile/DMC ; EC/Ester/3DMC, EC/MiPC/3DMC) ont été caractérisées en vue de leur utilisation dans des dispositifs hybrides, l’objectif étant de satisfaire à la fois aux exigences des matériaux graphite et carbone activé. Les interactions solvant-solvant et solvant-sel des électrolytes ont été étudiées à partir des théories de Jones-Dole, Stocks-Einstein et Bjerrum appliquées aux mesures de viscosités et conductivités. Cela a permis de développer des modèles prédictifs de la conductivité dans des cas de solvants purs ou de mélanges simples. La deuxième partie de cette thèse a été dédiée à la réalisation de demi-cellules avec différentes formulations d'électrolytes à la fois sur carbone activé et sur graphite. Les interfaces électrodes/électrolytes et séparateurs/électrolytes ont été étudiées. La corrosion des collecteurs en Al en présence de LiTFSI a fait l'objet d'une étude qui a permis de dégager une solution consistant en la formulation d'un électrolyte additionné de 1% d'additifs source de fluorure tel que LiPF6. Enfin, des dispositifs complets graphite/carbone activé ont été réalisés en utilisant les différents électrolytes optimisés ce qui a permis de mettre en évidence le gain en énergie (x5) pour un tel système par rapport aux supercondensateurs symétriques classiques. / The objective of this thesis is to broaden the knowledge of electrochemical, thermo physical and thermodynamic properties of different efficient and safe organic electrolytes for Lithium-ion Capacitors (LICs). Several solvent structures have been first selected to design new electrolytes based on binary or ternary solvent mixtures. These solvents were then characterized through conductivity, viscosity and electrochemical studies, in order to assess their structure and properties relationships. Based on this investigation, best compromise between mobility and ionic concentration has been evaluated to formulate the best electrolytes. Generally, it was proved that the addition of solvents with very low viscosity provides efficient electrolytes. Based on conductivity and viscosity measurements, a theoretical study on solvent-solvent and solvent-salt interactions has been then performed using different well-known equations based on Stock-Einstein, Jones-Dole and Bjerrum theories to understand, rationalize, correlate and then predict their transport properties. The second part of the study concentrated on the characterization of selected electrolytes in an asymmetric LIC prior to developing such electrolytes in any high performance asymmetric capacitor devices. In other words, the main objective of this part is to verify the compatibility of designed electrolytes with each element, e.g. electrodes (graphite, activated carbon) and current collectors (aluminum), of a LIC device. To drive such analysis, different experimental investigations between electrodes/electrolytes and between collectors/electolytes were in fact investigated. Using this strategy, asymmetric systems LICs containing a formulated organic electrolyte were fully characterized to deter mine the electrochemical performances of the designed solution in LIC conditions and then compared with those observed using classical electrolyte currently used.
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Uma abordagem Lagrangiana na otimização Volt/VAr em redes de distribuição / A Lagrangian approach in the Volt/VAr optimization in distribution networksFillipe Matos de Vasconcelos 12 April 2017 (has links)
Este projeto de pesquisa propõe desenvolver um novo modelo e uma nova abordagem para a resolução do problema da otimização Volt/VAr em redes de distribuição de energia elétrica. A otimização Volt/VAr consiste em, basicamente, determinar os ajustes das variáveis de controle tais como bancos de capacitores chaveados, transformadores com comutação de tap sob carga e reguladores de tensão, de modo a satisfazer, simultaneamente, as restrições de carga e de operação para um dado objetivo operacional. Esse problema, matematicamente, foi formulado como um problema de programação não linear, multiperíodo, e com variáveis contínuas e discretas. Algoritmos de programação não linear foram utilizados com o intuito de aproveitar as vantagens das matrizes altamente esparsas montadas ao longo do método de solução. Para utilizar tais algoritmos, as variáveis discretas são tratadas como contínuas por meio da utilização de funções senoidais que penalizam a função objetivo do problema original enquanto estas não convergirem para algum dos pontos pré-definidos no seu domínio. O caráter multiperíodo do problema, contudo, refere-se à consideração de uma restrição que relaciona os ajustes das variáveis de controle para sucessivos intervalos de tempo na medida em que limita o número de operações de chaveamento desses dispositivos para um período de 24-horas. O estudo fundamenta-se, metodologicamente, em métodos do tipo Primal-Dual Barreira-Logarítmica. Para demonstrar a eficiência do modelo proposto e a robustez dessa abordagem, a partir de dados teóricos obtidos de levantamentos bibliográficos, testes foram realizados em sistemas-teste de 10, 69 e 135 barras, e em um sistema de 442 barras do noroeste do Reino Unido. As implementações computacionais foram feitas nos softwares MATLAB, AIMMS e GAMS, utilizando o solver IPOPT como método de solução. Os resultados mostram que a abordagem proposta para a resolução do problema de programação não linear é eficaz para tratar adequadamente todas as variáveis presentes em problemas de otimização Volt/VAr. / This work proposes a new model and a new approach for solving the Volt / VAr optimization problem in distribution systems. The Volt/VAr optimization consists, basically, to determine the settings of the control variables of switched capacitor banks, on-load tap changer transformers and voltage regulators, in order to satisfy both the load and operational constraints, to a given operational objective. The problem is formulated as a nonlinear programming problem, multiperiod, and with continuous and discrete variables. Nonlinear programming algorithms were used in order to take advantage of the highly sparse matrices built along the solution method. The discrete variables are treated as continuous along the solution method by means of the use of sinusoidal functions that penalize the original objective function while the control variables do not converge to any of the predefined discrete points in its domain. The multiperiod, or dynamic, characteristic of the problem, however, refers to the use of a constraint that relates the settings of the control variables for successive time intervals that limits the control devices switching operations number for a period of 24-hours. The study is based, methodologically, on Primal-Dual Logarithmic Barrier method. To demonstrate the effectiveness of the proposed model and the robustness of this approach, the data were obtained from theoretical literature surveys, and tests were performed on test-systems of 10, 69 and 135 buses, and in a 442 buses located in the Northwest of the United Kingdom. The computational implementation was accomplished in the softwares MATLAB, AIMMS and GAMS, using the IPOPT solver as solution method. The results have shown the approach for solving nonlinear programming problems is effective to appropriate cope with all the variables presented in Volt/VAr optimization problems.
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Zirconium-doped tantalum oxide high-k gate dielectric filmsTewg, Jun-Yen 17 February 2005 (has links)
A new high-k dielectric material, i.e., zirconium-doped tantalum oxide (Zr-doped TaOx), in the form of a sputter-deposited thin film with a thickness range of 5-100 nm, has been studied. Important applications of this new dielectric material include the gate dielectric layer for the next generation metal-oxide-semiconductor field effect transistor (MOSFET). Due to the aggressive device scaling in ultra-large-scale integrated circuitry (ULSI), the ultra-thin conventional gate oxide (SiO2) is unacceptable for many practical reasons. By replacing the SiO2 layer with a high dielectric constant material (high-k), many of the problems can be solved. In this study, a novel high-k dielectric thin film, i.e., TaOx doped with Zr, was deposited and studied. The films electrical, chemical, and structural properties were investigated experimentally. The Zr dopant concentration and the thermal treatment condition were studied with respect to gas composition, pressure, temperature, and annealing time. Interface layer formation and properties were studied with or without an inserted thin tantalum nitride (TaNx) layer. The gate electrode material influence on the dielectric properties was also investigated. Four types of gate materials, i.e., aluminum (Al), molybdenum (Mo), molybdenum nitride (MoN), and tungsten nitride (WN), were used in this study. The films were analyzed with ESCA, XRD, SIMS, and TEM. Films were made into MOS capacitors and characterized using I-V and C-V curves. Many promising results were obtained using this kind of high-k film. It is potentially applicable to future MOS devices.
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Generalized Bandpass Sampling Receivers for Software Defined RadioSun, Yi-Ran January 2006 (has links)
Based on different sampling theorem, for example classic Shannon’s sampling theorem and Papoulis’ generalized sampling theorem, signals are processed by the sampling devices without loss of information. As an interface between radio receiver front-ends and digital signal processing blocks, sampling devices play a dominant role in digital radio communications. Under the concept of Software Defined Radio (SDR), radio systems are going through the second evolution that mixes analog, digital and software technologies in modern radio designs. One design goal of SDR is to put the A/D converter as close as possible to the antenna. BandPass Sampling (BPS) enables one to have an interface between the RF or the higher IF signal and the A/D converter, and it might be a solution to SDR. However, three sources of performance degradation present in BPS systems, harmful signal spectral overlapping, noise aliasing and sampling timing jitter, hinder the conventional BPS theory from practical circuit implementations. In this thesis work, Generalized Quadrature BandPass Sampling (GQBPS) is first invented and comprehensively studied with focus on the noise aliasing problem. GQBPS consists of both BPS and FIR filtering that can use either real or complex coefficients. By well-designed FIR filtering, GQBPS can also perform frequency down-conversion in addition to noise aliasing reduction. GQBPS is a nonuniform sampling method in most cases. With respect to real circuit implementations, uniform sampling is easier to be realized compared to nonuniform sampling. GQBPS has been also extended to Generalized Uniform BandPass Sampling (GUBPS). GUBPS shares the same property of noise aliasing suppression as GQBPS besides that the samples are uniformly spaced. Due to the moving average operation of FIR filtering, the effect of sampling jitter is also reduced to a certain degree in GQBPS and GUBPS. By choosing a suitable sampling rate, harmful signal spectral overlapping can be avoided. Due to the property of quadrature sampling, the “self image” problem caused by I/Q mismatches is eliminated. Comprehensive theoretical analyses and program simulations on GQBPS and GUBPS have been done based on a general mathematic model. Circuit architecture to implementing GUBPS in Switched-Capacitor circuit technique has been proposed and analyzed. To improve the selectivity at the sampling output, FIR filtering is extended by adding a 1st order complex IIR filter in the implementation. GQBPS and GUBPS operate in voltage-mode. Besides voltage sampling, BPS can also be realized by charge sampling in current-mode. Most other research groups in this area are focusing on bandpass charge sampling. However, the theoretical analysis shows that our GQBPS and GUBPS in voltage mode are more efficient to suppress noise aliasing as compared to bandpass charge sampling with embedded filtering. The aliasing bands of sampled-data spectrum are always weighted by continuous-frequency factors for bandpass charge sampling with embedded filtering while discrete-frequency factors for GQBPS and GUBPS. The transmission zeros of intrinsic filtering will eliminate the corresponding whole aliasing bands of both signal and noise in GQBPS and GUBPS, while it will only cause notches at a limited set of frequencies in bandpass charge sampling. In addition, charge sampling performs an intrinsic continuous-time sinc function that always includes lowpass filtering. This is a drawback for a bandpass input signal. / QC 20100921
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