<p>Detta examensarbete har genomförts på Campus Norrköping, Linköpings Universitet. Arbetet är en del av ett samarbete mellan Linköpings Universitet, Kungliga Tekniska Högskolan och Math.se. Målet med samarbetet är att skapa och underhålla en hemsida för webbstöd i kursen Linjär Algebra. Genom åren har det upptäckts att det finns en problematik i många studenters inlärning av kursens teori. Detta beror på att det är svårt att undervisa något som berör fler än två dimensioner på en tvådimensionell tavla eller papper.</p><p>Examensarbetets syfte var att utveckla grunden för en produkt som hjälper till att öka förståelsen hos studenter som läser linjär algebra. Produkten skulle på ett interaktivt sätt visualisera på datorskärmen de moment i kursen som kan vara svåra att undervisa i ett klassrum. Vidare skulle produkten både lära ut och testa studenters kunskap.</p><p>Programmet skulle finnas och startas från hemsidan för kursens webbstöd så att det kan startas parallellt med att studenter löser uppgifterna på sidan. Det var också krav på att programmet skulle fungera på alla stora operativsystem och webbläsare. Framförallt var det viktigt att produkten skulle vara lättanvänd och fungera pedagogiskt.</p><p>Resultatet av examensarbetet är nio applikationer, en för varje moment som har tillämpats, som via datorgrafik underlättar undervisningen genom pedagogiskt förklarande och uppgifter. Programmen startas direkt på hemsidan via Java Web Start.</p>

<p>The purpose of this thesis was to help the company Medius AB with optimization of selected parts in an existing system to minimize the execution time by implementing multithreading. The idea was to manipulate the code so that calculations could be executed at the same time. The main work in this thesis consisted of three optimizations. The first one was to reconstruct a big “for-loop” so it would execute every loop's work in an own thread. The second optimization also was a reconstruct of a “for-loop” so it could execute the work in different threads. The third and last optimization consisted of reconstructing a stored procedure on the database, so different parts of it each could be executed in an own thread to create data at the same time. To implement the optimizations Visual Basic .NET and its support for multithreading and connection-pools was used. The result of the optimizations meant that one of the modules could be executed more efficiently and it was 12 % faster. The other modules execution time was more efficient by 25 % faster. The meanings and requirements for this thesis are fulfilled by now letting the system make use of its resources in a better way.</p>

<p>This thesis is developed by Posten Åland AB in order to simplify the work of agency staff when distributing mail in rural areas. In my thesis I have developed an application to help automotive mail dispensers. The need for such an application exists, especially during the summer but at other times when ordinary dividend cannot run his route. With the help of a PDA and a GPS the mail dispenser should see where the next stop is and what is to be delivered there</p><p>There already was a directory of mailboxes and the addressees and the coordinates of the mailboxes. Using this, I will implement functionality to retrieve a specific route and plot those coordinates on the map.</p>

<p>The purpose of the thesis was to investigate and evaluate existing algorithms for division of complex numbers. The investigation should include implementation of a few suitable algorithms in VHDL. The main application for the divider is compensation for fading in a baseband processor.</p><p>Since not much public research is done within the area of complex division in hardware, a divider based on real valued division was designed. The design only implements inversion of complex numbers instead of complete division because it is simpler and the application does not need full division, thus the required chip size is reduced.</p><p>An examination of the different kinds of algorithms that exists for real valued division was done and two of the methods were found suitable for implementation, digit recurrence and functional iteration. From each of the two classes of algorithms one algorithm was chosen and implemented in VHDL. Two different versions of the inverter were designed for each method, one with full throughput and one with half throughput. The implementations show very similar results in terms of speed, size and performance. For most cases however, the digit recurrence implementation has a slight advantage.</p>

<p>This thesis is about creation of a Matlab program that suggests and automatically generates a Phase to Sine Amplitude Converter (PSAC) in the hardware language VHDL, suitable for Direct Digital Frequency Synthesis (DDFS). Main hardware target is Field Programmable Gate Arrays (FPGAs).</p><p>Focus in this report is how an FPGA works, different methods for sine amplitude generation and their signal qualities vs the hardware resources they use.</p> / <p>Detta exjobb handlar om att skapa ett Matlab-program som föreslår och implementerar en sinusgenerator i hårdvaruspråket VHDL, avsedd för digital frekvenssyntes (DDFS). Ämnad hårdvara för implementeringen är en fältprogrammerbar grindmatris (FPGA).</p><p>Fokus i denna rapport ligger på hur en FPGA är uppbyggd, olika metoder för sinusgenerering och vilka kvaliteter på sinusvågen de ger och vilka resurser i hårdvaran de använder.</p>

<p>Ericsson has a very big and expensive test environment with a lot of GSM AXE equipment. In order to decrease the cost of testing Ericsson has developed a combination of simulated and real hardware, the Hybrid Test Environment (HTE). There is no formal supervision and testing of the HTE system today and this has left the HTE system unstable and the testers have been avoiding using HTE. It is important for Ericsson that the confidence for HTE will increase. The goal of this thesis is to produce a method for testing the HTE system. An automated test tool has been implemented in order to monitor and test the HTE system. During the two weeks that the test tool has been operational it has discovered 4 servers in 3 different HTE rigs that malfunctioned. These servers were fixed and were operational before the end-users could discover any problem.</p>

<p>This thesis examines the possibility of designing a fully integrated and switched testing environment for a test laboratory which conducts automated testing. Execution of tests in this environment will make it possible to manage all test objects without requiring any manual intervention resulting in efficient utilization of machine hours and test objects. The thesis explores the concepts and requirements for designing such an environment. It also describes the methods to implement the environment. The result of the thesis work shows that it is possible to design and implement a fully integrated and switched testing environment which can reduce the lead time for delivery by a substantial amount along with a more efficient utilization of machine hours and resources. The exact information related to the instruments, devices under testing and tools are removed by the author according to NDA.</p>

<p>The computer engineering department at Linköping University has a research project which investigates the use of an on-chip network in a router. There has been an implementation of it in a FPGA and for this router there is a need for buffer memory. This thesis extends the router design with a DDR memory controller which uses the features provided by the Virtex-II FPGA family.</p><p>The thesis shows that by carefully scheduling the DDR SDRAM memory high volume transfers are possible and the memory can be used quite effciently despite its rather complex interface.</p><p>The DDR memory controller developed is part of a packet buffer module which is integrated and tested with a previous, slightly modifed, FPGA based router design. The performance of this router is investigated using real network interfaces and due to the poor network performance of desktop computers special hardware is developed for this purpose.</p>

<p>The purpose of this Master Thesis is to analyze what suitable hardware platforms there are on the market in order to build a low price control and information system for mobile applications, called small display module. The thesis will be underlying material for making a decision for further development. The result of the thesis consists mainly of a Windows CE kernel and a schematic for a CPU card, on which it would be suitable to build the display module. Another major part of the report is the introduction of different techniques that could be of interest when designing a processor based system. The processor architecture that was chosen is the x86. This is mainly due to CPU availability, but as well as the fact that existing software can be used on the display module without any significant modifications. Many interesting processors were sorted out because they hade a very high price on the development kits from the manufacturer and because the possible production volume can not manage this cost. The development kit makes the development easier and can be used for performance tests before prototypes are built.</p>

<p>Today the Sjöbjörn studio has a mixing console controlled by a PC with outdated software and</p><p>hardware technology. The hardware requires an ISA-bus to work at all and thereby limits the</p><p>upgrades that can be made to the computer. The software runs in a DOS environment and has not</p><p>been updated for a long time as well. This makes working with the mixing console more difficult</p><p>then it has to be and new features are hard to implement. In this thesis I have developed new</p><p>hardware so that a more powerful computer can be used which hopefully will allow for a more</p><p>user friendly interface and make it easier for future upgrades and additions.</p><p>The thesis presents a solution on how to upgrade the system all the way from the PCcommunication</p><p>to the hardware designs.</p><p>The project was based around the Microchip PIC18F4550 microcontroller for the hardware and</p><p>the Visual Basic.NET programming language for the PC software.</p>