Depuis leur émergence, les réseaux de capteurs sans fil (WSN) n’ont cessé de se développer devenant un acteur clé dans de nombreuses applications telles que le suivi militaires, la surveillance à distance, la bio-détection et de la domotique. Ces réseaux sont basés sur la norme IEEE 802.15.4 qui est dédié aux réseaux personnels sans fil à faible débit (LR-WPAN) dans la bande de fréquences radio sans licence (868MHz/915MHz/2.4GHz). Faible consommation d'énergie, faible coût de mise en œuvre et le niveau élevé d'intégration sont les principaux défis de ces systèmes. L’émetteur-récepteur est le bloc qui consomme le plus d’énergie dans un nœud capteur, ainsi, la consommation d'énergie du frontal radiofréquence (RFFE) doit être réduite. Pour ce faire, plusieurs approches sont possibles, que ce soit au niveau circuit en enquêtant sur les modes de fonctionnement du transistor ou bien en combinant les fonctionnalités des blocs radiofréquences. Une autre stratégie est d’investiguer le niveau système en proposant de nouvelles architectures de démodulation. Cette thèse explore les exigences et les défis spécifiques pour la conception de circuits intégrés radiofréquences (RFIC) ultra-basse consommation pour les réseaux de capteurs sans fil. Ces travaux ont abouti à la conception d'un démodulateur compact réalisé dans une technologie CMOS 65nm et qui est compatible avec tous les types de modulation. / Since their emergence, Wireless Sensor Networks (WSN) have been growing continually becoming a key player in many applications such as military tracking, remote monitoring, bio-sensing and home automation. These networks are based on IEEE 802.15.4 standard which is dedicated to low rate wireless personal area networks (LR-WPANs) in the unlicensed radio band (868MHz/915MHz/2.4GHz). Low power consumption, low cost of implementation and high level of integration are the main challenges of these systems. As radio frequency transceiver is one of the most power hungry block in wireless sensor node, power consumption of radio frequency front-end (RFFE) must be reduced. To deal with, several approaches are possible, either at circuit level by investigating operating modes of transistors and merging functionalities or at system level by searching novel demodulation architecture. This thesis explores the specific requirements and challenges for the design of ultra-low power radio frequency integrated circuits (RFICs), leading to the design of a compact demodulator implemented in 65 nm CMOS technology and compatible with all modulation schemes.

The primary reason for the wireless technology evolution is towards building capacity and obtaining higher data rates. Enclosed locations, densely populated campus, indoor offices, and device-to-device communication will require radios that need to operate at data rates up to 10 Gbps. In the next few years, a new generation of communication systems would emerge to better handle the ever-increasing demand for much wider bandwidth requirements. Simultaneously, key factors such as size, cost, and energy consumption play a distinctive role towards shaping the success of future wireless technologies. In the perspective of 3GPP 5G next generation wireless communication systems, the X band was explicitly targeted with a vast range of applications in point to point radio, point to multi point radio, test equipment, sensors and future wireless communication. An X-band RF front-end circuit for next generation wireless network applications is presented in this work. It details the design of a low noise amplifier and a power amplifier for X band operation. The designed amplifiers were integrated with a wideband single-pole-double-throw switch to achieve an overall front-end structure for 10 GHz. The design was carried out and sent for fabrication using a GaN 0.15µm process provided by NRC, a novel design kit. Due to higher breakdown voltage, high power density, high efficiency, high linearity and better noise performance, GaN HEMTs are a suitable choice for future wireless communication. Thus, the assumption is to further explore capabilities of this process in front-end design for future wireless communications.

Managing the new product development (NPD) process, especially the first phase, the front end of innovation (FEI), is crucial for companies today in order to develop successful products and reach process and product sustainability. This has proved to be a significant challenge for start-ups since 90 percent of them fail (Krishna et al., 2016). This explorative study investigates how prototyping can be used in FEI, with a focus on Swedish start-up companies. A great deal of research has been published about prototyping in the later stages in the development process, and about FEI in general. Regarding prototyping in FEI, the existing literature is mainly located in the product design area. A substantial research gap has also been identified in a start-up context regarding prototyping in FEI. To fill in this gap, a qualitative approach was used collecting data form three different perspectives; start-up accelerators, start-ups employees and users. To accumulate these three perspectives, two sets of semi-structured interviews and two focus groups were conducted. Thematic analysis was used to analyze the collected data. The empirical findings align with the existing literature in several areas, but also gain new insights, contributing to filling the research gap. To conclude, there are a number of different specific prototyping purposes and methods, as well as crucial recommendations, that start-ups should consider in FEI to succeed. The thesis highlights that start-ups should use simple prototypes early in FEI, iterating the prototyping efforts, and gradually increasing the accuracy of the prototype during the FEI.

Syftet med det här examensarbetet är att presentera process och erfarenheter från mitt konstnärliga musikproduktionsprojekt som genomförts under mitt sista år av min masterutbildning. Genomförandet har bestått av att skapa ett svenskt popmusikalbum där låtar har skapats enskilt, genom samarbeten och tre verk har blivit slutförda och distribuerats på streamingtjänster så som Spotify och YouTube. Vidare är syfte att presentera en modell med hjälp av mitt konstnärliga arbete där det prövas potentiella omformuleringar för yrkesroller inom låtskapande. Dessa termer ska i sin tur underlätta rolldefinition inom låtskapande och även ge utrymme för att förtydliga den ideella rätten som medverkande i ett konstnärligt verk har. Med utgångspunkt till att musikproducenten ofta hamnar i en multikompetent position så har jag valt att låna begrepp från systemutvecklarens yrkesvärld för att skapa modellen. Begreppen jag valt att låna består av back-end, front-end och full-stack och avsikten är att bryta upp paraplybegrepp såsom ”låtskrivare, producent och performer” och även kunna bidra till tydligare rekryteringsprocesser för samarbeten inom låtskapande. / The purpose of this master’s thesis is to present the process and experiences of my music production project that was carried out during the last year of my masters’ studies. The project’s creative content is a Swedish pop album which created through collaborative and independent work. Three single releases and one music video have been released and distributed through the course of the project on streaming platforms such as Spotify and YouTube. In addition to the making of the album I have chosen to create a model to use as a frame for potential recruitment instances of creative collaborations, improve role definition and develop a more accurate method to credit rights holder’s moral credentials as a contributor to an artistic work. The root cause of this model is that a music producer often finds themselves as a multicompetent keyperson in creative collaborations where the lines between different professions overlap. The model is inspired of the software developers job terminology and aims to break up umbrella concept roles such as “songwriter, producer and performer” to facilitate the recruiting process of creative collaborations within the crafting of songs. The terminologies inspired out of the software developer’s professions are back-end, front-end and full-stack.

Graphical User Interface, which is known as GUI, is a way for a person to communicate and interact with a system through icons or other visual indicators. A well designed and intuitive user interface is critical to the success of a system since it encourages a natural interaction between a user and a system, thus conveying information more clearly and efficiently to the user.The aim of this study is to design and develop a user interface that is used in a financial technology company in their credit risk assessment process. The current user interface contains a visualization of an individual credit assessment flow together with a lot of data that is generated in the process. Some of the data is not properly visualized, which leads to confusion among end users.In order to optimize the user experience, a user-centered design approach was used combined with a heuristic evaluation. A new user interface was designed and implemented and according to the heuristic evaluation result, the usability was greatly improved. The new interface is able to help the company to visualize their credit risk assessment process in a better way and facilitate credit officers to make credit decisions. The result could also provide insights to other companies or organizations in presenting their data more clearly and effectively. / Grafiskt användargränssnitt, som även kallas GUI, är ett sätt för en person att kommunicera och interagera med ett system genom ikoner eller andra visuella indikatorer. Ett väl utformat och intuitivt användargränssnitt är avgörande för framgången för ett system, eftersom det uppmuntrar till en naturlig interaktion mellan en användare och ett system och därmed förmedlar information tydligare och effektivare till användaren.Syftet med denna studie är att designa och utveckla ett användargränssnitt som används i ett finansiellt teknikföretag i deras kreditriskbedömningsprocess. Det nuvarande användargränssnittet innehåller en visualisering av ett individuellt kreditbedömningsflöde tillsammans med mycket data som genereras i processen. En del av data är inte korrekt visualiserade, vilket leder till förvirring bland slutanvändare.För att optimera användarupplevelsen användes en användarcentrerad designmetod i kombination med en heuristisk utvärdering. Ett nytt användargränssnitt designades och implementerades och enligt det heuristiska utvärderingsresultatet förbättrades användbarheten kraftigt. Det nya gränssnittet kan hjälpa företaget att visualisera sin kreditriskbedömningsprocess på ett bättre sätt och underlätta kreditansvariga att fatta kreditbeslut. Resultatet kan också ge andra företag eller organisationer insikter om att presentera sina uppgifter tydligare och mer effektivt.

User interfaces are a crucial point in the usage of products. A user interface is developed to make a product easy to use and understand while also presenting data, feedback and functionality to the user. In this thesis we present and explain the whole development process of a front end project. The Swedish company, Kemizares, was searching for a user interface for their finance module in their upcoming application. In this work we developed the user interface for such a module with regards to Kemizares’ functional requirements as well as the necessity that the user interface of the module could be integrated into the their application which already had an existing user interface. The solution to the problem began with a literature study in which we researched tools and programs we would use to develop the module as well as researching national and international requirements for invoices to identify necessary data to use in the finance module. Afterwards we set up a timeline with deadlines to guide us throughout the development. An agile iterative feedback method was used during the implementation of the module with Kemizares. The finance module was created and with the iterative feedback method we used during development we were able to ensure that Kemizares was satisfied with the product. However, due to limiting factors we were not able to finish the whole module and hence not able to fulfill all the requirements. The conclusion is that the module in its current state is not a viable solution for Kemizares since it was left undone but a good ground to continue from that has taken required financial data, functional requirements, and design compatibility with the rest of the application into consideration. / Användargränssnitt är en viktig punkt i användningen av produkter. Ett användar-gränssnitt är utvecklat för att göra en produkt enkel att använda och förstå samtidigt som den presenterar data, feedback och funktionalitet för användaren. I denna rapport presenterar och förklarar vi hela utvecklingsprocessen för ett frontend-projekt. Det svenska företaget Kemizares letade efter ett användargränssnitt för sin finansmodul i sin kommande applikation. I detta arbete utvecklade vi användargränssnittet för en sådan modul med avseende på Kemizares funktionella krav samt behovet av att modulens användargränssnitt kunde integreras i deras applikation som redan hade ett befintligt användargränssnitt. Lösningen på problemet började med en litteraturstudie där vi undersökte verktyg och program som vi skulle använda för att utveckla modulen samt undersökte nationella och internationella krav på fakturor för att identifiera nödvändiga data att använda i finansmodulen. Därefter satte vi upp en tidslinje med deadlines för att vägleda oss genom hela utvecklingen. En agil iterativ återkopplingsmetod användes under implementeringen av modulen med Kemizares. Finansmodulen skapades och med den iterativa återkopplingsmetoden som vi använde under utvecklingen kunde vi säkerställa att Kemizares var nöjd med produkten. Men på grund av begränsande faktorer kunde vi inte avsluta hela modulen och kunde därför inte uppfylla alla krav. Slutsatsen är att modulen i sitt nuvarande tillstånd inte är en lönsam lösning för Kemizares eftersom den lämnades ofärdig, men en bra grund att fortsätta från som har tagit hänsyn till nödvändiga ekonomiska data, funktionella krav och designkompatibilitet med resten av applikationen.

International Telemetering Conference Proceedings / October 22-25, 2001 / Riviera Hotel and Convention Center, Las Vegas, Nevada / A traditional Front-end Processor (FEP) with local RAID storage can limit the operational throughput of a high-rate telemetry ground station. The Front-end processor must perform pass processing (frame synchronization, decoding, routing, and storage), post-pass processing (level-zero processing), and tape archiving. A typical fifteen minute high-rate satellite pass can produce data files of 10 to 20 GB. The FEP may require up to 2 hours to perform the post-pass processing and tape archiving functions for these size files. During this time, it is not available to support real-time pass operations. Honeywell faced this problem in the design of the data management system for the DataLynx ä* ground stations. Avtec Systems, Inc. and Honeywell worked together to develop a data management system that utilizes a Storage Area Network (SAN) in conjunction with multiple High-speed Front-end Processors (HSFEP) for Pass Processing (PFEP), multiple HSFEPs for Post-pass Processing (PPFEP), and a dedicated Tape Archive server. A SAN consists of a high-capacity, high-bandwidth shared RAID that is connected to multiple nodes using 1 Gbps Fibre Channel interfaces. All of the HSFEPs as well as the Tape Archive server have direct access to the shared RAID via a Fibre Channel network. The SAN supports simultaneous read/write transfers between the nodes at aggregate rates up to 120 Mbytes/sec. With the Storage Area Network approach, the High-Speed Front-end Processors can quickly transfer the data captured during a pass to the shared RAID for post-processing and tape archiving so that they are available to support another satellite pass. This paper will discuss the architecture of the Storage Area Network and how it optimizes ground station data management in a high-rate environment.

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / Satellite Control Systems require a front-end component which performs real-time telemetry acquisition and command output. This paper will describe a fully networked, PC-based telemetry and command front-end which supports multiple streams and is based on Commercial Off The Shelf (COTS) technology. The front-end system is a gateway that accepts multiple telemetry streams and outputs time-tagged frame or packet data over a network to workstations in a distributed satellite control and analysis system. The system also includes a command gateway that accepts input from a command processor and outputs serial commands to the uplink. The front-end can be controlled locally or remotely via the network using Simple Network Management Protocol. Key elements of the front-end system are the Avtec MONARCH-E™ PCI-based CCSDS/TDM Telemetry Processor/Simulator board, a network-based, distributed computing architecture, and the Windows NT operating system. The PC-based telemetry and command gateway is useful throughout the lifecycle of a satellite system. During development, integration, and test, the front-end system can be used as a test tool in a distributed test environment. During operations, the system is installed at remote ground stations, with network links back to operations center(s) for telemetry and command processing and analysis.

The study at hand investigates innovation systems at small and medium enterprises (SMEs) focusing on innovation culture, organization and company goals at the early stages of innovation process. Past research studies suggest the early stages of innovation process are critical for the overall innovation ability, however, there is a lack of literature on the specifics of innovation systems at SMEs. Case studies of 3 companies provide an overview of characteristics of innovation systems at a typical SME as well as a solid basis for drawing business implications relevant for establishing or improving its innovation system. Furthermore, the findings reveal that people management at the early stages of innovation process is missing, and that a foreign subsidiary of an international SME is relevant for an effective corporate innovation process. Implications for further research on the topic are also discussed.

ALICE is one of four major experiments of particle accelerator LHC installed in the European laboratory CERN. The management committee of the LHC accelerator has just approved a program update for this experiment. Among the upgrades planned for the coming years of the ALICE experiment is to improve the resolution and tracking efficiency maintaining the excellent particles identification ability, and to increase the read-out event rate to 100 KHz. In order to achieve this, it is necessary to update the Time Projection Chamber detector (TPC) and Muon tracking (MCH) detector modifying the read-out electronics, which is not suitable for this migration. To overcome this limitation the design, fabrication and experimental test of new ASIC named SAMPA has been proposed . This ASIC will support both positive and negative polarities, with 32 channels per chip and continuous data readout with smaller power consumption than the previous versions. This work aims to design, fabrication and experimental test of a readout front-end in 130nm CMOS technology with configurable polarity (positive/negative), peaking time and sensitivity. The new SAMPA ASIC can be used in both chambers (TPC and MCH). The proposed front-end is composed of a Charge Sensitive Amplifier (CSA) and a Semi-Gaussian shaper. In order to obtain an ASIC integrating 32 channels per chip, the design of the proposed front-end requires small area and low power consumption, but at the same time requires low noise. In this sense, a new Noise and PSRR (Power Supply Rejection Ratio) improvement technique for the CSA design without power and area impact is proposed in this work. The analysis and equations of the proposed circuit are presented which were verified by electrical simulations and experimental test of a produced chip with 5 channels of the designed front-end. The measured equivalent noise charge was <550e for 30mV/fC of sensitivity at a input capacitance of 18.5pF. The total core area of the front-end was 2300?m × 150?m, and the measured total power consumption was 9.1mW per channel. / ALICE é um dos quatro grandes experimentos do acelerador de partículas LHC (Large Hadron Collider) instalado no laboratório europeu CERN. Um programa de atualizações desse experimento acaba de ser aprovado pelo comitê gestor do acelerador LHC. Dentro das atualizações planejadas para os próximos anos do experimento ALICE, está melhorar a resolução e eficiência de rastreamento de partículas produzidas em colisões entre íons pesados, mantendo a excelente capacidade de identificação de partículas para uma taxa de leitura de eventos significativamente maior da atual. Para se alcançar esse objetivo, entre outras ações, é preciso atualizar os detectores Time Projection Chamber (TPC), modificando a eletrônica de leitura de eventos, a qual não é adequada para esta migração. Para superar esta limitação tem sido proposto o projeto, simulação, fabricação, teste experimental e validação de um ASIC protótipo de aquisição de sinais e de processamento digital chamado SAMPA, que possa ser usado na eletrônica de detecção dos sinais no cátodo do TPC, que suporte polaridades negativas de tensão de entrada e leitura continua de dados, com 32 canais por chip, com menor consumo de potência comparado com a versão anterior do chip. Este trabalho tem como objetivo o projeto, fabricação, e teste experimental de um readout front-end em tecnologia CMOS 130nm, com polaridade configurable (positiva/ negativa), peaking time e sensibilidade, de forma que o novo SAMPA ASIC possa ser usada em ambos detectores. Para obter um ASIC integrando 32 canais por chip, o projeto do front-end proposto precisa ter baixa área e baixo consumo de potência, mas ao mesmo tempo requer baixo ruido. Neste sentido, uma nova técnica para melhorar a especificação de ruido e o PSRR (Power Supply Rejection Ratio) sem impacto no consumo de área e potência é proposta neste trabalho. A análise e as equações do circuito proposto são apresentadas as quais foram validadas por simulação e teste experimental de um circuito integrado com 5 canais do front-end projetado. O Equivalent Noise Charge medido foi <550e para uma capacitance do detector de 18.5pF. A área total do front-end foi de 2300?m × 150?m, e o consumo total de potencia medido foi de 9.1mW por canal.