La thèse s'intéresse à l'accompagnement familial des apprentissages scolaires en mathématiques, mais aussi et surtout à l'organisation non discriminante de ses conditions. La " culture didactique " partagée dans notre société s'adapte de moins en moins aux régulations de la scolarité obligatoire. En effet, en se focalisant sur le repérage des difficultés individuelles et en encourageant les interventions précoces à l'extérieur de l'institution d'enseignement, elle transforme les aléas " ordinaires " de l'apprentissage en dysfonctionnements. Certaines tentatives d'amélioration insistent sur l'information et la communication entre école et parents. Or les discours éloignent souvent de la réalité des actions. Les " exercices à faire à la maison ", en transmettant des comportements, jouent un rôle complémentaire important. Certes, ils font rapidement surgir les divergences, parce qu'ils rendent visibles les contre-performances des élèves, et suggèrent toutes sortes de rectifications. Les devoirs sont par conséquent souvent accusés d'introduire des disparités et de pertuber les relations entre protagonistes. La thèse réexamine ce point de vue, en étudiant d'autres formes d'étude, qui s'ajusteraient mieux aux besoins des institutions didactiques. Pour simplifier la circulation des savoirs mathématiques les plus fréquemment utilisés, la société a mis en place des instruments culturels. Mais certains ont été détournés de leur fonction, ce qui a rompu des équilibres didactiques essentiels. La récitation des tables de multiplication fournit un exemple paradigmatique de la dénégation des transpositions. Les régressions métadidactiques ont en effet lentement modifié une ancienne répartition des tâches entre institutions, jusqu'à dédidactifier tout un pan de l'enseignement du calcul. La thèse éclaire la compréhension de ces phénomènes à l'aide de la Théorie des Situations Didactiques. Elle propose un nouveau concept pour une ingénierie spécifique de l'entraînement et de la familiarisation des élèves avec les connaisances les plus fondamentales : les assortiments didactiques.

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The Zionist type of churches under the African Independent Churches have proven to be a force to be reckoned with against the more organized ecclesiastical movements (in particular the Mission Churches). This can be seen in their emphasis around matters related to culture and its methods of healing. As s result this led to the migration of people from the mission churches to these churches and threatened their existence in Botswana. The mission churches have been experiencing the decline in their membership to the Zionist churches because of the lack of openness to the cultural and the value systems of Batswana in Botswana. Mission churches were left with an option of doing introspection and finally acknowledging their failures to contextualise their theology and Christianity among the people they serving. Mission churches ended up opening their doors to the needs of their members. / Christian Spirituality, Church History and Missiology / M.Th. (Church History)

Achieving high computation efficiency, in terms of Cycles per Instruction (CPI), for high-performance computing kernels is an interesting and challenging research area. Dense Linear Algebra (DLA) computation is a representative high-performance computing ap- plication, which is used, for example, in LU and QR factorizations. Unfortunately, mod- ern off-the-shelf microprocessors fall significantly short of achieving theoretical lower bound in CPI for high performance computing applications. In this thesis, we perform an in-depth analysis of the available parallelisms and propose suitable algorithmic and architectural variation to significantly improve the computation efficiency. There are two standard approaches for improving the computation effficiency, first, to perform application-specific architecture customization and second, to do algorithmic tuning. In the same manner, we first perform a graph-based analysis of selected DLA kernels. From the various forms of parallelism, thus identified, we design a custom processing element for improving the CPI. The processing elements are used as building blocks for a commercially available Coarse-Grained Reconfigurable Architecture (CGRA). By per- forming detailed experiments on a synthesized CGRA implementation, we demonstrate that our proposed algorithmic and architectural variations are able to achieve lower CPI compared to off-the-shelf microprocessors. We also benchmark against state-of-the-art custom implementations to report higher energy-performance-area product. DLA computations are encountered in many engineering and scientific computing ap- plications ranging from Computational Fluid Dynamics (CFD) to Eigenvalue problem. Traditionally, these applications are written in highly tuned High Performance Comput- ing (HPC) software packages like Linear Algebra Package (LAPACK), and/or Scalable Linear Algebra Package (ScaLAPACK). The basic building block for these packages is Ba- sic Linear Algebra Subprograms (BLAS). Algorithms pertaining LAPACK/ScaLAPACK are written in-terms of BLAS to achieve high throughput. Despite extensive intellectual efforts in development and tuning of these packages, there still exists a scope for fur- ther tuning in this packages. In this thesis, we revisit most prominent and widely used compute bound algorithms like GMM for further exploitation of Instruction Level Parallelism (ILP). We further look into LU and QR factorizations for generalizations and exhibit higher ILP in these algorithms. We first accelerate sequential performance of the algorithms in BLAS and LAPACK and then focus on the parallel realization of these algorithms. Major contributions in the algorithmic tuning in this thesis are as follows: Algorithms: We present graph based analysis of General Matrix Multiplication (GMM) and discuss different types of parallelisms available in GMM We present analysis of Givens Rotation based QR factorization where we improve GR and derive Column-wise GR (CGR) that can annihilate multiple elements of a column of a matrix simultaneously. We show that the multiplications in CGR are lower than GR We generalize CGR further and derive Generalized GR (GGR) that can annihilate multiple elements of the columns of a matrix simultaneously. We show that the parallelism exhibited by GGR is much higher than GR and Householder Transform (HT) We extend generalizations to Square root Free GR (also knows as Fast Givens Rotation) and Square root and Division Free GR (SDFG) and derive Column-wise Fast Givens, and Column-wise SDFG . We also extend generalization for complex matrices and derive Complex Column-wise Givens Rotation Coarse-grained Recon gurable Architectures (CGRAs) have gained popularity in the last decade due to their power and area efficiency. Furthermore, CGRAs like REDEFINE also exhibit support for domain customizations. REDEFINE is an array of Tiles where each Tile consists of a Compute Element and a Router. The Routers are responsible for on-chip communication, while Compute Elements in the REDEFINE can be domain customized to accelerate the applications pertaining to the domain of interest. In this thesis, we consider REDEFINE base architecture as a starting point and we design Processing Element (PE) that can execute algorithms in BLAS and LAPACK efficiently. We perform several architectural enhancements in the PE to approach lower bound of the CPI. For parallel realization of BLAS and LAPACK, we attach this PE to the Router of REDEFINE. We achieve better area and power performance compared to the yesteryear customized architecture for DLA. Major contributions in architecture in this thesis are as follows: Architecture: We present design of a PE for acceleration of GMM which is a Level-3 BLAS operation We methodically enhance the PE with different features for improvement in the performance of GMM For efficient realization of Linear Algebra Package (LAPACK), we use PE that can efficiently execute GMM and show better performance For further acceleration of LU and QR factorizations in LAPACK, we identify macro operations encountered in LU and QR factorizations, and realize them on a reconfigurable data-path resulting in 25-30% lower run-time

Made available in DSpace on 2016-03-15T19:40:41Z (GMT). No. of bitstreams: 1 Rita dos Santos de Carvalho Picinini.pdf: 1897105 bytes, checksum: 40db215aab8bca0781df1d15de88b3d3 (MD5) Previous issue date: 2009-01-27 / Fundo Mackenzie de Pesquisa / Different mathematical skills have been investigated over time and, with the advance of neuroimaging techniques, such as PET (Positron Emission Tomography) and fMRI (functional Magnetic Resonance), central components of arithmetical processing have been identified in the parietal and the pre-frontal cortices. Besides the advances of the neuroimaging techniques, other techniques such as non-invasive brain modulation have also been studied such as the transcranial magnetic stimulation (TMS) and the transcranial direct current stimulation (TDCS) in the involvement of cognitive functions in the area of calculation. This study aimed at investigating the impact of anodal TDCS applied over the left dorsolateral pre-frontal cortex (LDLPFC), right parietal cortex (RPC), left parietal cortex (LPC) while the subject was performing multiplication operations. Fifteen healthy volunteers, students of psychology, aged between 18 and 30 years old, have held subtests of the WAIS III and the multiplication task. The results showed that the anodal TDCS over the RPC improved the performance of men regarding the number of rightness. The influence of TDCS on volunteers who had worse performance took place not on complex tasks, but simple arithmetical ones. Besides, the influence of TDCS on volunteers who had better performance was in complex tasks, not simple ones. These results show that the effects of the TDCS on a certain function depend on the baseline values of each volunteer. The other stimulation conditions over the LDLPFC and LPC did not show any significant results. The TDCS can bring a beneficial effect in calculation tasks, depending on the intensity, polarity, time and location of stimulation, resulting in the increased or diminished cortex excitability. / Diferentes habilidades matemáticas vêm sendo investigadas ao longo dos tempos e, com o avanço das técnicas de neuroimagem, como PET (Tomografia por emissão de Pósitrons) e fMRI (ressonância magnética funcional) componentes centrais no processamento aritmético vêm sendo identificados em córtex parietal e pré-frontal. Além do avanço das técnicas de neuroimagem, outras técnicas como de modulação cerebral não-invasiva também vêm sendo estudadas, como Estimulação Magnética Transcraniana (EMT) e a Estimulação Transcraniana por Corrente Contínua (ETCC) no envolvimento das funções cognitivas com a área de cálculo. Este estudo teve como objetivo investigar o impacto da ETCC anódica quando aplicada no Córtex Pré-Frontal Dorsolateral (CPFDLE), Córtex Parietal Direito (CPD), Córtex Parietal Esquerdo (CPE) no desempenho em operações de multiplicação. Quinze voluntários saudáveis, estudantes de psicologia, com faixa etária entre 18 e 30 anos, realizaram subtestes do WAIS III e a tarefa de multiplicação. Os resultados desse estudo mostraram que a ETCC anódica aplicada no CPD melhorou o desempenho dos homens em relação ao número de acertos. A influência da ETCC em participantes com pior desempenho em Aritmética se deu em tarefa simples de multiplicação, mas não complexa, ao passo que a influência da ETCC em participantes com melhor desempenho em Aritmética se deu em tarefa complexa de multiplicação, mas não em simples. Tais resultados sinalizam que os efeitos da estimulação em uma determinada função dependem dos valores de linha de base de cada participante As outras condições de estimulações, CPFDLE e CPE não resultaram em efeitos significativos. A ETCC pode produzir um efeito benéfico em tarefas de cálculo, dependendo da intensidade, polaridade, tempo e localização da estimulação, podendo resultar em aumento ou diminuição na excitabilidade do córtex.

In addition to the performance, low power design became an important issue in the design process of mobile embedded systems. Mobile electronics with rich features most often involve complex computation and intensive processing, which result in short battery lifetime and particularly when low power design is not taken in consideration. In addition to mobile computers, thermal design is also calling for low power techniques to avoid components overheat especially with VLSI technology. Low power design has traced a new era. In this thesis we examined several techniques to achieve low power design for FPGAs, ASICs and Processors where ASICs were more flexible to exploit the HW oriented techniques for low power consumption. We surveyed several power estimation methodologies where all of them were prone to at least one disadvantage. We also compared and analyzed the power and energy consumption in three different designs, which perform matrix multiplication within Altera platform and using state-of-the-art FPGA device. We concluded that NIOS II\e is not an energy efficient alternative to multiply nxn matrices compared to HW matrix multipliers on FPGAs and configware is an enormous potential to reduce the energy consumption costs.

The master’s thesis deals with the noise diagnostic in the solar cells. Describes the main kinds of noises. The samples were quality and reliability screened using noise reliability indicators. The samples were surveyed by measuring the I-V characteristics, the noise spectral density as a function of forward voltage and frequency. It was calculated the noise spectral density as a function of forward current.

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The thesis deals with speedup and accuracy of numerical computation, especially when differential equations are solved. Algorithms, which are fulling these conditions are named semi-analytical. One posibility how to accelerate computation of differential equation is paralelization. Presented paralelization is based on transformation numerical solution into residue number system, which is extended to floating point computation. A new algorithm for modulo multiplication is also proposed. As application applications in solution of differential calculus are the main goal it is discussed numeric integration with modified Euler, Runge - Kutta and Taylor series method in residue number system. Next possibilities and extension for implemented residue number system are mentioned at the end.

<p>Convolutional neural networks (CNNs) have become important workloads due to their<br> impressive accuracy in tasks like image classification and recognition. Convolution operations<br> are compute intensive, and this cost profoundly increases with newer and better CNN models.<br> However, convolutions come with characteristics such as sparsity which can be exploited. In<br> this dissertation, we propose three different works to capture sparsity for faster performance<br> and reduced energy. </p> <p><br></p> <p>The first work is an accelerator design called <em>SparTen</em> for improving two-<br> sided sparsity (i.e, sparsity in both filters and feature maps) convolutions with fine-grained<br> sparsity. <em>SparTen</em> identifies efficient inner join as the key primitive for hardware acceleration<br> of sparse convolution. In addition, <em>SparTen</em> proposes load balancing schemes for higher<br> compute unit utilization. <em>SparTen</em> performs 4.7x, 1.8x and 3x better than dense architecture,<br> one-sided architecture and SCNN, the previous state of the art accelerator. The second work<br> <em>BARISTA</em> scales up SparTen (and SparTen like proposals) to large-scale implementation<br> with as many compute units as recent dense accelerators (e.g., Googles Tensor processing<br> unit) to achieve full speedups afforded by sparsity. However at such large scales, buffering,<br> on-chip bandwidth, and compute utilization are highly intertwined where optimizing for<br> one factor strains another and may invalidate some optimizations proposed in small-scale<br> implementations. <em>BARISTA</em> proposes novel techniques to balance the three factors in large-<br> scale accelerators. <em>BARISTA</em> performs 5.4x, 2.2x, 1.7x and 2.5x better than dense, one-<br> sided, naively scaled two-sided and an iso-area two-sided architecture, respectively. The last<br> work, <em>EUREKA</em> builds an efficient tensor core to execute dense, structured and unstructured<br> sparsity with losing efficiency. <em>EUREKA</em> achieves this by proposing novel techniques to<br> improve compute utilization by slightly tweaking operand stationarity. <em>EUREKA</em> achieves a<br> speedup of 5x, 2.5x, along with 3.2x and 1.7x energy reductions over Dense and structured<br> sparse execution respectively. <em>EUREKA</em> only incurs area and power overheads of 6% and<br> 11.5%, respectively, over Ampere</p>