No description available.

No description available.

<p>Monoclonal antibodies (mAbs) as therapeutic proteins have shown great potential in treatment of various human diseases because of their highly specific nature. This has attracted worldwide attention leading to increased demand for such mAb products. To meet this demand large scale manufacturing is carried out using recombinant mammalian cell culture techniques for high yields and faster production. mAb products are worth the investment if produced in their native state. The quantity of mAb present in such cell cultures is very less and therefore special care is needed while handling them. Purifying antibody molecules from heterogeneous cell culture impurities and maintaining their native functional state is a critical task mainly because these antibodies are labile in nature. Care also need to be exercised during processing because mAbs have inherent tendancy to aggregate which is undesirable since such aggregates in antibody formulation produces immunogenic reaction when injected in humans. The other important factor in mAb purification is the processing cost involved since majority of the total production cost is utilized for purification of mAb. Protein-A chromatography is the first choice for purifying antibodies and is widely adopted. However failure in distinguishing between monomer and aggregate antibody molecules along with harsh acidic processing conditions necessitates the use of further purification steps.</p> <p>In this work various techniques for mAb processing are discussed and are outlined below:</p> <p>Removal of impurities from mAbs is a major challenge and this thesis discusses various processing options available to purify these mAbs. Impurities in mAb products are usually the aggregate byproducts formed due to unfolded monomer antibody molecules. These molecules are naturally hydrophobic in nature and display great differences in hydrophobicity on aggregation. Hydrophobic interaction membrane chromatography (HIMC) makes use of this hydrophobicity difference and helps in removal of aggregate impurities from monomer antibody.</p> <p>Heavy chain mAbs (hcmAbs) are promising new developments in the area of biopharmaceuticals because of their unique structural composition. Similar to conventional mAbs these hcmAbs are also rapidly finding their way into therapeutic markets. Purifying hcmAbs will be an important step in their development and for this purpose we use HIMC technique for removing impurities and obtain pure product.</p> <p>Antibody molecules are almost always lost as aggregates which leads to great economic losses and the ability to disaggregate these mAb oligomers would be of significant practical and scientific interest. In this work a novel thermalcycling technique is discussed to disaggregate such mAb oligomers and potentially recover functional monomer mAb molecules.</p> / Master of Applied Science (MASc)

Dans le cas des installations photovoltaïques, l’onduleur est le premier élément défaillant dont il est difficile d’anticiper la panne, et peu d’études ont été faites sur la fiabilité de ce type de convertisseur. L'objectif de cette thèse est de proposer des outils et méthodes en vue d'étudier le vieillissement des modules de puissance dans ce type d'application en se focalisant sur les phénomènes de dégradation liés à des aspects thermomécaniques. En règle générale, le vieillissement accéléré des modules de puissance est effectué dans des conditions aggravées de courant (Cyclage Actif) ou de température (Cyclage Passif) pour accélérer les processus de vieillissement. Malheureusement, en appliquant ce type de vieillissement accéléré, des mécanismes de défaillances qui ne se produisent pas dans la vraie application peuvent être observés et, inversement, d'autres mécanismes qui se produisent habituellement peuvent ne pas apparaître. La première partie de la thèse se focalise donc sur la mise en place d'une méthode de vieillissement accéléré des composants semi-conducteurs des onduleurs photovoltaïques. Cela est fait en s’appuyant sur l’analyse des profils de mission du courant efficace de sortie des onduleurs et de la température ambiante, extraits des centrales photovoltaïques situées au sud de la France sur plusieurs années. Ces profils sont utilisés pour étudier les dynamiques du courant photovoltaïque, et sont introduites dans des modèles numériques pour estimer les pertes et les variations de la température de jonction des semi-conducteurs utilisés dans les onduleurs, en utilisant l’algorithme de comptage de cycles "Rainflow". Cette méthode est ensuite mise en œuvre dans deux bancs expérimentaux. Dans le premier, les composants sous test sont des modules IGBT. Les composants sont mis en œuvre dans un banc de cyclage utilisant la méthode d'opposition et mettant en œuvre le profil de vieillissement défini précédemment. Un dispositif in-situ de suivi d'indicateurs de vieillissement (impédance thermique et résistance dynamique) est également proposé et évalué. Le deuxième banc est consacré à l'étude de modules de puissance à base de MOSFET SiC. Le vieillissement est effectué dans les mêmes conditions que pour les modules IGBT et de nombreux indicateurs électriques sont monitorés mais, cette fois ci, en extrayant les composants de l'onduleur de cyclage. Les résultats obtenus ont permis de déterminer des indicateurs de vieillissement d’IGBT et de MOSFET SiC utilisés dans un onduleur photovoltaïque / In the case of photovoltaic installations, the DC/AC inverter has the highest failure rate, and the anticipation of its breakdowns is still difficult, while few studies have been done on the reliability of this type of inverter. The aim of this PhD is to propose tools and methods to study the ageing of power modules in this type of application, by focusing on ageing phenomena related to thermo-mechanical aspects. As a general rule, the accelerated ageing of power modules is carried out under aggravated conditions of current (Active Cycling) or temperature (Passive Cycling) in order to accelerate the ageing process. Unfortunately, when applying this type of accelerated ageing tests, some failure mechanisms that do not occur in the real application could be observed, while inversely, other mechanisms that usually occur could not be recreated. The first part of the PhD focuses on the implementation of an accelerated ageing method of the semiconductor devices inside photovoltaic inverters. This is accomplished by analyzing the mission profiles of the inverter’s output current and ambient temperature, extracted over several years from photovoltaic power plants located in the south of France. These profiles are used to study photovoltaic current dynamics, and are introduced into numerical models to estimate losses and junction temperature variations of semiconductors used in inverters, using the cycle counting algorithm “Rainflow”. This method is then performed in two experimental test benches. In the first one, the devices under test are IGBT modules, where the accelerated ageing profile designed is implemented using the opposition method. Moreover, an in-situ setup for monitoring ageing indicators (thermal impedance and dynamic resistance) is also proposed and evaluated. The second bench is devoted to study the ageing of SiC MOSFET power modules. The accelerated ageing test is carried out under the same conditions as for the IGBT modules with more monitored electrical indicators, but this time by disconnecting the semiconductor devices from the inverter. The results obtained allowed to determine several potential ageing indicators of IGBTs and SiC MOSFETs used in a photovoltaic inverter

Le développement de composants de puissance à base de carbure de silicium (SiC) permet la réalisation d’interrupteurs pouvant fonctionner au-delà de 200°C. Le silicium présente plus de limitations au niveau physique du matériau qu’au niveau des technologies d’assemblages. Le SiC est un matériau semi-conducteur grand gap ce qui permet d’obtenir des courants de fuite inverse qui restent faibles à haute température ; d’où un fort intérêt pour des applications haute température. Mise à part son utilisation à des températures pouvant dépasser les 300°C, c’est un matériau qui permet aussi d’augmenter les fréquences de commutation ainsi que la densité de puissance par rapport à des composants à technologie silicium. Ceci en fait un candidat idéal pour des applications forte puissance dans le domaine de la traction, des protections de réseaux électriques ou de la transmission et de la distribution d’énergie. L’utilisation du SiC pour une application haute température pose le problème de son packaging, des choix de matériaux et de sa configuration. Cette thèse a pour but d’effectuer une étude de fiabilité et de durée de vie des briques technologiques d’assemblage et de connexions nécessaires à la réalisation d’un cœur de puissance haute température à base de JFET SiC. Une étude des différentes technologies d’assemblages de convertisseurs de puissance haute température est effectuée afin de définir différentes briques technologiques constitutives de ces systèmes. Cette première étude nous permet de procéder à une sélection de certaines technologies d’assemblages comme le frittage de pâtes d’argent pour la technologie de report de puces. Ces briques technologiques feront l’objet d’études plus approfondies allant de la réalisation de véhicules tests jusqu’à la mise au point des essais de cyclages associés aux techniques d’analyse nécessaires à l’étude de leur défaillance.Les études expérimentales concernent des essais de cyclage passif et de stockage thermique, l’apparition de délaminages en cours de cyclage thermique (scan acoustique, RX), le report par frittage de pâtes d’argent nano et microscopiques et la caractérisation électrique et thermique (Rth, I[V]). / The development of power components based on silicon carbide (SiC) allows for the design of power converter operating at high temperature (above 200 or 300°C). SiC is a semiconductor material with a large band gap that not only can operate in temperatures exceeding 300°C but also offers fast switching speed, high voltage blocking capability and higher thermal conductivity compared to silicon technology components. The classical die attach technology uses high temperature solder alloys which melt at around 300°C. However, even a soldered die attach with such high melting point can only operate up to a much lower temperature. Alternative die attach solutions have recently been proposed: Transient Liquid Phase Bonding, soldering with higher melting point alloys such as ZnSn, or silver sintering.Silver sintering is a very interesting technology, as silver offers very good thermal conductivity (429W/m.K, better than copper), relatively inexpensive (compared to alternative solutions which often use gold), and has a very high melting point (961°C).The implementation of two silver-sintering processes is made: one based on micrometer-scale silver particles, and one on nano-meter-scale particles. Two substrate technologies are investigated: Al2O3 DBC and Si3N4 AMB. After the process optimization, tests vehicles are assembled using nano and micro silver particles paste and a more classical high-temperature die attach technology: AuGe soldering. Multiple analyses are performed, such as thermal resistance measurement, shear tests and micro-sections to follow the evolution of the joint during thermal cycling and high-temperature storage ageing.

Hydropower is the most important power balancing resource in the Swedish electrical power system, regulating the power supply to match the load. Consequently, several hydropower plants have periods of stand-by operation where the power production is absent but where several devices within a plant are still active. Such a device is the step-up power transformer, which during stand-by operation still generates no-load energy losses. These losses can accumulate to a considerable amount of energy and costs during the long technical lifetime of the apparatus. One option to minimize these no-load energy losses is by turning the transformer off when its generating unit is in stand-by operation. However, when this transformer operational change has been explained to experts in the field, the most common response has been that a more frequent reenergizing of a transformer leads to higher risks for errors or transformer breakdowns. This study aimed to analytically investigate three effects from this operational change. First, the potential of fatigue failure for the windings due to the increased sequences of inrush current. Secondly, the thermal cycling as a consequence of change in present losses. Lastly, the energy and economic saving potentials for hydropower plants where this operational adjustment is applied. The study used both established as well as analytical tools explicitly created for this study. These were then applied on currently active transformers in different plant categories in Fortum’s hydropower fleet. The study primarily showed three things. Firstly, risk of fatigue failure due to the increased presence of inrush currents did not affect the transformer’s technical lifetime. Secondly, the thermal cycling changes were slightly larger with absent no-load losses during stand-by operation. The average temperature for the transformer decreased, which in general is seen as a positive indicator for a longer insulation lifetime and thus the transformer’s technical lifetime. Finally, the created frameworks showed the potential of saving energy and money for all plant categories, where the potential grew with the installed production capacity and the stand-by operation timeshare. Despite the simplifications made to describe the complex reality of a transformer operating in a hydropower plant, this thesis contributes to lay a foundation for future investigation of an easy adjustment to avoid unnecessary energy losses and costs for transformers in hydropower plants

At present there are different reliability standards that are being used for carrying out reliability prediction. They take into consideration different factors, environments and data sources to give reliability data for a wide range of electronic components. However, the users are not aware of the differences between the different reliability standards due to the absence of benchmarks of the reliability standards that would help classify and compare between them. This lack of benchmark denies the users the opportunity to have a top-down view of these different standards and choose the appropriate standard based on qualitative judgement in performing reliability prediction for a specific system. To addres this issue, the benchmark of a set of reliability standards are developed in this dissertation. The benchmark helps the users of the selected reliability standards understand the similarities and differences between them and based on the evaluation criterion defined can easily choose the appropriate standard for reliability prediction in different scenarios. Theoretical reliability prediction of two electronic products in Bombardier is performed using the standards that have been benchmarked. One of the products is matured with available incident report from the field while the other is a new product that is under development and yet to enter in service. The field failure data analysis of the matured product is then compared and correlated to the theoretical prediction. Adjustment factors are then derived to help bridge the gap between the theoretical reliability prediction and the reliability of the product in field conditions. Since the theoretical prediction of the product under development could not be used to compare and correlate any data due to unavailability, instead, the accelerated life test is used to find out the product reliability during its lifetime and find out any failure modes intrinsic to the board. A crucial objective is realized as an appropriate algorithm/model is found in order to correlate accelerated test temperature-cycles to real product temperature-cycles. The PUT has lead-free solder joints, hence, to see if any failures occurring due to solder joint fatigue has also been of interest. Additionally, reliability testing simulation is a performed in order to verify and validate the performance of the product under development during ALT. Finally, the goal of the thesis is achieved as separate models are proposed to predict product reliability for both matured products and products under development. This will assist the organization in realizing the goal of predicting their product reliability with better accuracy and confidence. / För närvarande finns det olika tillförlitlighetsstandarder som används för att utföra tillförlitlighet förutsägelse. De tar hänsyn till olika faktorer, miljöer och datakällor för att ge tillförlitlighetsdata för ett brett spektrum av elektronikkomponenter. Men användarna inte är medvetna om skillnaderna mellan de olika tillförlitlighetsstandarder på grund av avsaknaden av riktmärken för tillförlitlighetsstandarder som skulle hjälpa klassificera och jämföra mellan dem. Denna brist på jämförelse förnekar användarna möjlighet att få en top-down bakgrund av dessa olika standarder och välja lämplig standard baserad på kvalitativ bedömning att utföra tillförlitlighet prognos för ett specifikt system. För att lösa detta problem, är riktmärket en uppsättning av tillförlitlighetsstandarder som utvecklats i denna avhandling. Riktmärket hjälper användarna av de utvalda tillförlitlighetsstandarder förstå likheter och skillnader mellan dem och på grundval av bedömningskriteriet definieras kan enkelt välja lämplig standard för pålitlighet förutsägelse i olika scenarier. Teoretisk tillförlitlighet förutsäga två elektroniska produkter i Bombardier utförs med hjälp av standarder som har benchmarking. En av produkterna är mognat med tillgängliga incidentrapport från fältet, medan den andra är en ny produkt som är under utveckling och ännu inte gå in i tjänsten. Analysen av den mognade produkten fält feldata jämförs sedan och korreleras till den teoretiska förutsägelsen. Justeringsfaktorer sedan härledas för att överbrygga klyftan mellan den teoretiska tillförlitlighet förutsägelse och tillförlitligheten av produkten i fältmässiga förhållanden. Eftersom den teoretiska förutsägelsen av produkt under utveckling inte kan användas för att jämföra och korrelera alla data på grund av otillgängligheten, i stället är det accelererade livslängdstest som används för att ta reda på produktens tillförlitlighet under dess livstid och reda ut eventuella felmoder inneboende till styrelsen . Ett viktigt mål realiseras som en lämplig algoritm /modell finns i syfte att korrelera accelererade provningen temperaturcykler på verkliga produkttemperatur cykler. PUT har blyfria lödfogar därmed att se om några fel inträffar på grund av löda gemensam trötthet har också varit av intresse. Dessutom är tillförlitlighet testning simulering en utförs för att verifiera och validera produktens prestanda under utveckling under ALT. Slutligen är målet med avhandlingen uppnås som separata modeller föreslås att förutsäga produktens tillförlitlighet för både förfallna och produkter under utveckling. Detta kommer att hjälpa organisationen att förverkliga målet att förutsäga deras tillförlitlighet med bättre noggrannhet och förtroende.

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / Eutectic (63% tin-37% lead) or near-eutectic (40% tin-60% lead) tin-lead solder is widely used for creating electrical interconnections between the printed wiring board (PWB) and the components mounted on the board surface. For components mounted directly on the PWB mounting pads, that is, surface mounted components, the tin-lead solder also constitutes the mechanical interconnection. Eutectic solder has a melting point of 183°C (361°F). It is important to realize that its homologous temperature, defined as the temperature in degrees Kelvin over its melting point temperature (T(m)), also in degrees Kelvin, is defined as T/T(m). At room temperature (25°C = 298K), eutectic solder's homologous temperature is 0.65. It is widely acknowledged that materials having a homologous temperature ≥ 0.5 are readily subject to creep, and the solder joints of printed wiring assemblies are routinely exposed to temperatures above room temperature. Hence, solder joints tend to be subject to both thermal fatigue and creep. This can lead to premature failures during service conditions. The geometry, that is, the lead configuration, of the joints can also affect failure. Various geometries are better suited to withstand failure than others. The purpose of this paper is to explore solder joint failures of dual in-line (DIP) integrated circuit components, leadless ceramic chip carriers (LCCCs), and gull wing and J-lead surface mount components mounted on PWBs.

The Antimatter Experiment: Gravity, Interferometry, Spectroscopy (AEGIS) at the European Organization for Nuclear Research (CERN) is an experiment investigating the influence of earth’s gravitational force upon antimatter. To perform precise measurements the antimatter needs to be cooled to a temperature of 100 mK. This will be done in a Penning trap, formed by several electrodes, which are charged with several kV and have to be individually electrically insulated. The trap is thermally linked to a mixing chamber of a 3He-4He dilution refrigerator. Two link designs are examined, the Rod design and the Sandwich design. The Rod design electrically connects a single electrode with a heat exchanger, immersed in the helium of the mixing chamber, by a copper pin. An alumina ring and the helium electrically insulate the Rod design. The Sandwich uses an electrically insulating sapphire plate sandwiched between the electrode and the mixing chamber. Indium layers on the sapphire plate are applied to improve the thermal contact. Four differently prepared test Sandwiches are investigated. They differ in the sapphire surface roughness and in the application method of the indium layers. Measurements with static and sinusoidal heat loads are performed to uncover the behavior of the thermal boundary resistances. The thermal total resistance of the best Sandwich shows a temperature dependency of T-2,64 and is significantly lower, with roughly 30 cm2K4/W at 50 mK, than experimental data found in the literature. The estimated thermal boundary resistance between indium and sapphire agrees very well with the value of the acoustic mismatch theory at low temperatures. In both designs, homemade heat exchangers are integrated to transfer the heat to the cold helium. These heat exchangers are based on sintered structures to increase the heat transferring surface and to overcome the significant influence of the thermal resistance (Kapitza resistance). The heat exchangers are optimized concerning the adherence of the sinter to the substrate and its sinter height, e.g. its thermal penetration length. Ruthenium oxide metallic resistors (RuO2) are used as temperature sensors for the investigations. They consist of various materials, which affect the reproducibility. The sensor conditioning and the resulting good reproducibility is discussed as well.

The Antimatter Experiment: Gravity, Interferometry, Spectroscopy (AEGIS) at the European Organization for Nuclear Research (CERN) is an experiment investigating the influence of earth’s gravitational force upon antimatter. To perform precise measurements the antimatter needs to be cooled to a temperature of 100 mK. This will be done in a Penning trap, formed by several electrodes, which are charged with several kV and have to be individually electrically insulated. The trap is thermally linked to a mixing chamber of a 3He-4He dilution refrigerator. Two link designs are examined, the Rod design and the Sandwich design. The Rod design electrically connects a single electrode with a heat exchanger, immersed in the helium of the mixing chamber, by a copper pin. An alumina ring and the helium electrically insulate the Rod design. The Sandwich uses an electrically insulating sapphire plate sandwiched between the electrode and the mixing chamber. Indium layers on the sapphire plate are applied to improve the thermal contact. Four differently prepared test Sandwiches are investigated. They differ in the sapphire surface roughness and in the application method of the indium layers. Measurements with static and sinusoidal heat loads are performed to uncover the behavior of the thermal boundary resistances. The thermal total resistance of the best Sandwich shows a temperature dependency of T-2,64 and is significantly lower, with roughly 30 cm2K4/W at 50 mK, than experimental data found in the literature. The estimated thermal boundary resistance between indium and sapphire agrees very well with the value of the acoustic mismatch theory at low temperatures. In both designs, homemade heat exchangers are integrated to transfer the heat to the cold helium. These heat exchangers are based on sintered structures to increase the heat transferring surface and to overcome the significant influence of the thermal resistance (Kapitza resistance). The heat exchangers are optimized concerning the adherence of the sinter to the substrate and its sinter height, e.g. its thermal penetration length. Ruthenium oxide metallic resistors (RuO2) are used as temperature sensors for the investigations. They consist of various materials, which affect the reproducibility. The sensor conditioning and the resulting good reproducibility is discussed as well.