Este trabalho apresenta um estudo sobre a corrente de fuga de modo comum em inversores monofásicos sem transformador utilizados para a conexão de sistemas fotovoltaicos (FV) à rede de distribuição de energia elétrica. O estudo se concentra em inversores do tipo fonte de tensão que empregam a topologia em ponte completa. A partir da adequada modelagem do sistema (rede, conversor e módulo fotovoltaico) identifica-se e quantifica-se a contribuição das tensões de modo comum e modo diferencial para a corrente de fuga. Conclui-se que a tensão de modo comum de alta frequência produzida pelo inversor, que depende da estratégia de modulação por largura de pulso (PWM Pulse Width Modulation) empregada, fornece a maior contribuição para produção da corrente de fuga. Esse estudo mostra que os inversores sem transformador, com topologia em ponte completa e modulação que produz tensão de saída com três níveis, necessitam de medidas adicionais para a minimização da corrente fuga quando aplicados em sistemas fotovoltaicos conectados à rede. Algumas soluções propostas na literatura para a minimização da corrente de fuga baseadas em topologias modificadas e filtros de modo comum são listadas e discutidas. Neste trabalho é proposto um filtro integrado de modo comum e modo diferencial com amortecimento passivo de baixas perdas, para minimizar a corrente de fuga produzida por um inversor monofásico sem transformador. Um exemplo de aplicação do filtro proposto é apresentado juntamente com seu procedimento de projeto, resultados de simulação e experimentais que validam a proposta. Além disso, a influência da variação da indutância da rede elétrica e da capacitância parasita do sistema fotovoltaico no comportamento do filtro proposto é analisada. A influência da variação da indutância da rede no comportamento do sistema de controle e o impacto da corrente de modo comum no projeto dos indutores do lado do conversor também são analisados. / This paper presents a study on the common mode leakage current in single-phase transformerless inverters for grid-connected photovoltaic (PV) systems. The study focuses on voltage source inverters (VSI) employing the full-bridge topology. The common mode and differential mode voltages that contribute to the leakage current are identified and quantified from the analysis of the system model (utility grid, converter and PV module). The system model analysis shows that the high frequency common mode voltage produced by the inverter, which depends on the Pulse Width Modulation (PWM) strategy, is the main source contributing to the leakage current. This work shows that transformerless inverters employing the full-bridge topology and a modulation strategy that produces a three-level output voltage require some leakage current minimization strategy when they are employed in grid-connected PV systems. Some solutions proposed in the literature for leakage current minimization based on modified topologies and common mode filters are listed and discussed. In this dissertation an integrated common and differential filter with low loss passive damping is proposed to minimize the leakage current produced by a single-phase transformerless PV inverter. An application example of the proposed filter is presented with design procedure, simulation and experimental results validating the proposal. Additionally, the influence of grid inductance and PV module parasitic capacitance variations on the behavior of the proposed filter is analyzed. The behavior of the control system considering the grid inductance variation and the impact of the common mode current on the converter side inductors design are also analyzed.

Este trabalho apresenta um estudo sobre a corrente de fuga de modo comum em inversores monofásicos sem transformador utilizados para a conexão de sistemas fotovoltaicos (FV) à rede de distribuição de energia elétrica. O estudo se concentra em inversores do tipo fonte de tensão que empregam a topologia em ponte completa. A partir da adequada modelagem do sistema (rede, conversor e módulo fotovoltaico) identifica-se e quantifica-se a contribuição das tensões de modo comum e modo diferencial para a corrente de fuga. Conclui-se que a tensão de modo comum de alta frequência produzida pelo inversor, que depende da estratégia de modulação por largura de pulso (PWM Pulse Width Modulation) empregada, fornece a maior contribuição para produção da corrente de fuga. Esse estudo mostra que os inversores sem transformador, com topologia em ponte completa e modulação que produz tensão de saída com três níveis, necessitam de medidas adicionais para a minimização da corrente fuga quando aplicados em sistemas fotovoltaicos conectados à rede. Algumas soluções propostas na literatura para a minimização da corrente de fuga baseadas em topologias modificadas e filtros de modo comum são listadas e discutidas. Neste trabalho é proposto um filtro integrado de modo comum e modo diferencial com amortecimento passivo de baixas perdas, para minimizar a corrente de fuga produzida por um inversor monofásico sem transformador. Um exemplo de aplicação do filtro proposto é apresentado juntamente com seu procedimento de projeto, resultados de simulação e experimentais que validam a proposta. Além disso, a influência da variação da indutância da rede elétrica e da capacitância parasita do sistema fotovoltaico no comportamento do filtro proposto é analisada. A influência da variação da indutância da rede no comportamento do sistema de controle e o impacto da corrente de modo comum no projeto dos indutores do lado do conversor também são analisados. / This paper presents a study on the common mode leakage current in single-phase transformerless inverters for grid-connected photovoltaic (PV) systems. The study focuses on voltage source inverters (VSI) employing the full-bridge topology. The common mode and differential mode voltages that contribute to the leakage current are identified and quantified from the analysis of the system model (utility grid, converter and PV module). The system model analysis shows that the high frequency common mode voltage produced by the inverter, which depends on the Pulse Width Modulation (PWM) strategy, is the main source contributing to the leakage current. This work shows that transformerless inverters employing the full-bridge topology and a modulation strategy that produces a three-level output voltage require some leakage current minimization strategy when they are employed in grid-connected PV systems. Some solutions proposed in the literature for leakage current minimization based on modified topologies and common mode filters are listed and discussed. In this dissertation an integrated common and differential filter with low loss passive damping is proposed to minimize the leakage current produced by a single-phase transformerless PV inverter. An application example of the proposed filter is presented with design procedure, simulation and experimental results validating the proposal. Additionally, the influence of grid inductance and PV module parasitic capacitance variations on the behavior of the proposed filter is analyzed. The behavior of the control system considering the grid inductance variation and the impact of the common mode current on the converter side inductors design are also analyzed.

Avui dia cada vegada s'ha de tenir més en compte com es realitza el traçat de pistes en les plaques de circuit imprès (PCB). Això és degut a que cada vegada més hi viatgen senyals amb components freqüencials més elevades. Per tant, paràmetres com la desadaptació per impedància característica, acoblaments, ressonàncies i comportaments complexes de les transicions que es troben els senyals en la seva propagació per les pistes, han de ser considerats per evitar problemes d'integritat del senyal i garantir la compatibilitat electromagnètica (EMC) amb el seu entorn. El present treball de tesi s'ha centrat en l'estudi del comportament d'una situació particular, però molt habitual, de pistes: dues pistes sobre un pla de massa, formant el que es coneix com una línia de transmissió microstrip acoblada. Els senyals que viatgen a través d'una línia microstrip acoblada es poden descompondre en dos modes bàsics de propagació: mode comú (on la tensió està definida entre el pla de massa i cada pista) i el mode diferencial (on la tensió està definida entre les pistes). Aquesta descomposició és molt habitual en el món de la compatibilitat electromagnètica ja que les tècniques de filtratge de les interferències varien depenent si aquestes viatgen en mode comú o en mode diferencial. El treball desenvolupat s'ha focalitzat en l'estudi, des d'aquest punt de vista multimodal (que té en compte simultàniament tant el mode comú com el diferencial), de les diferents transicions que es pot trobar el senyal en la seva propagació degut al traçat de pistes. Com a resultat d'aquest estudi s'han obtingut uns models circuitals que permeten l'anàlisi i simulació dels diferents modes que intervenen i que han estat validats de forma experimental. Aquest fet ha permès l'ús d'aquests models en l'anàlisi de problemes d'integritat del senyal que són comuns en el entorn de la compatibilitat electromagnètica (EMC). Els resultats obtinguts han estat presentats en congressos nacionals i internacionals. / Hoy en día cada vez se debe tener más en cuenta como se realiza el trazado de pistas en las placas de circuito impreso (PCB). Esto es así debido a que cada vez más viajan por ellas señales con componentes frecuenciales más elevadas. Por lo tanto, parámetros como la desadaptación por impedancia característica, acoplamientos, resonancias y comportamientos complejos de las transiciones que se encuentran las señales mientras se propagan por las pistas, deben ser tenidos en consideración para evitar problemas de integridad de la señal y garantizar la compatibilidad electromagnética (EMC) con su entorno. En el presente trabajo de tesis se ha centrado en el estudio del comportamiento de una situación particular, pero habitual, de pistas: dos pistas sobre un plano de masa, formando lo que se conoce como línea de transmisión microstrip acoplada. Las señales que viajan a través de una línea microstrip acoplada se pueden descomponer en dos modos básicos de propagación: modo común (donde la tensión está definida entre el plano de masa y cada pista) y modo diferencial (donde la tensión está definida entre pistas). Esta descomposición es muy habitual en el mundo de la compatibilidad electromagnética ya que las técnicas de filtrado de las interferencias varían dependiendo si estas viajan en modo común o en modo diferencial. El trabajo desarrollado se ha focalizado en el estudio, desde este punto de vista multimodal (que tiene en cuenta simultáneamente tanto el modo común como el diferencial), de las diferentes transiciones que puede encontrarse la señal durante su propagación debido al trazado de pistas. Como resultado se han obtenido unos modelos circuitales que permiten el análisis y simulación de los diferentes modos que intervienen y que han sido validados de forma experimental. Este hecho ha permitido el uso de dichos modelos en el análisis de problemas de integridad de la señal que son comunes en el entorno de la compatibilidad electromagnética (EMC). Los resultados obtenidos han sido mostrados en congresos nacionales e internacionales. / Nowadays, the placement of the strips in a printed circuit board (PCB) has to be performed with increasing care, because of the rise of the spectral content of the signals propagating through the strips. Due to this fact, mismatches of the characteristic impedances, crosstalks, resonances and complex behavior of the transitions that the signals may encounter in their propagation have to be considered in order to avoid signal integrity problems and to guarantee the electromagnetic compatibility with their environment. This work is focused on the study of the behavior of a particular, but also a very common way of routing strips: two close strips above a ground plane, forming a extit{coupled microstrip transmission line}. The signals present at this transmission line can be decomposed into two basic signals known as common mode (where its voltage is defined between the ground plane and each strip) and differential mode (where its voltage is defined between the two strips). This decomposition is often found in electromagnetic compatibility because the different techniques of filtering interferences depend on their main mode of propagation. The study carried out in this thesis is focused on the analysis from a multimodal point of view of different transitions that signals encounter during their propagation in a coupled microstrip transmission line. As a result of this analysis, a number of circuit models for different transitions have been obtained and experimentally validated. These models have been used to successfully study signal integrity problems found in EMC and they have been presented in national and international symposiums.

Un dels problemes més importants en la Compatibilitat Electromagnètica és el control de les interferències emeses i/o rebudes per un equip electrònic a través dels seus terminals d'alimentació monofàsica. Aquestes interferències es classifiquen en mode comú i mode diferencial. La manera més usual de mitigar-les és mitjançant la utilització de filtres de xarxa. Els mètodes actuals de disseny de filtres de xarxa tracten la mitigació d'aquest tipus d'interferències per separat: no tenen en compte que ambdós tipus de senyals (mode comú i diferencial) interaccionen entre sí i es transfereixen energia en qualsevol tipus d'asimetria originada pels equips electrònics o pels mateixos filtres. Aquest fet produeix freqüentment situacions inesperades: inefectivitat dels filtres de xarxa, aparició d'interferències en mode comú o diferencial inexplicables per la topologia dels circuits, selectivitat en freqüència del filtratge de les interferències, processos de radiació, etc. Aquest tipus de situacions poden ser analitzades i corregides a partir d'un anàlisi multimodal, que tingui en compte simultàniament el mode comú i el diferencial, i la seva interacció. El treball exposat aquí pretén:- Desenvolupar sistemes de mesura multimodal per a equips electrònics i filtres de xarxa. Aquests sistemes han de tenir en compte tant el mode comú, com el diferencial, com la seva interacció, i han de millorar les prestacions dels sistemes de mesura normatius actuals.- Trobar models equivalents des d'un punt de vista multimodal (tenint en compte simultàniament el mode comú, el diferencial i la seva interacció) tant d'equips electrònics com de filtres de xarxa.- Desenvolupar una metodologia de predicció de les interferències conduïdes que l'equip electrònic subministra a la xarxa elèctrica a través del filtre de xarxa al qual es troba connectat a partir dels models multimodals equivalents proposats per a ambdós dispositius.PARAULES CLAU: Compatibilitat electromagnètica, filtre de xarxa, equip electrònic, circuit equivalent, emissió conduïda, mode comú, mode diferencial, impedància d'entrada, paràmetres S. / Uno de los problemas más importantes en Compatibilidad Electromagnética es el control de las interferencias emitidas y/o recibidas por un equipo electrónico a través de sus terminales de alimentación monofásica. Estas interferencias se clasifican en modo común y modo diferencial. La manera más usual de mitigarlas es mediante el empleo de filtros de red. Los métodos actuales de diseño de filtros de red abordan la mitigación de este tipo de interferencias por separado: no tienen en cuenta que ambos tipos de señales (modo común y diferencial) interaccionan entre sí y se transfieren energía en cualquier tipo de asimetría originada por los equipos electrónicos o por los mismos filtros. Este hecho produce frecuentemente situaciones inesperadas: inefectividad de los filtros de red, aparición de interferencias en modo común o diferencial inexplicables por la topología de los circuitos, selectividad en frecuencia del filtrado de las interferencias, procesos de radiación, etc. Este tipo de situaciones pueden ser analizadas y corregidas a partir de un análisis multimodal, que tenga en cuenta simultáneamente el modo común y el diferencial, y su interacción. El trabajo aquí expuesto pretende:- Desarrollar sistemas de medida multimodal para equipos electrónicos y filtros de red. Dichos sistemas deben tener en cuenta tanto el modo común, como el diferencial, como su interacción, y deben mejorar las prestaciones de los sistemas de medida normativos actuales.- Hallar modelos equivalentes desde un punto de vista multimodal (teniendo en cuenta simultáneamente el modo común, el diferencial y su interacción) tanto de equipos electrónicos como de filtros de red.- Desarrollar una metodología de predicción de las interferencias conducidas que el equipo electrónico suministra a la red eléctrica a través del filtro de red al cual está conectado a partir de los modelos multimodales equivalentes propuestos para ambos dispositivos.PALABRAS CLAVE: Compatibilidad electromagnética, filtro de red, equipo electrónico, circuito equivalente, emisión conducida, modo común, modo diferencial, impedancia de entrada, parámetros S. / One of the most important problems in EMC is the control of the common and differential mode interferences emitted or received by an electronic device through its single phase power-line cable. These interferences are mitigated using power-line filters. The present power-line filter methodologies treat separately the mitigation of this kind of interferences: they do not take into account that both modes interact and exchange energy at any kind of asymmetry originated by the devices connected to the power-line, or by the power-line filters themselves. This fact leads to unexpected situations: power-line filter infectivity, appearance of common and differential mode interferences not accountable by the circuit topology, frequency selectivity of the interferences, radiation processes, etc. This kind of situations can be analyzed and corrected using multimodal analysis, which takes into account at the same time the common mode, the differential mode and their interaction. This project aims to:- Develop accurate multimodal measurement systems for both electronic devices and power-line network filters. They have to consider the common and differential modes, and their interaction, and have to improve the features of present normative measurement systems. - Derive equivalent models from a multimodal point of view (taking into account simultaneously the common mode, the differential mode and their interaction) for both electronic devices and power-line filters.- Develop a methodology for predicting the level of conducted emissions that an electronic device supplies to the power-line network through the power-line filter to which it is connected, using the equivalent multimodal models proposed for both devices.KEYWORDS: Electromagnetic compatibility, power-line filter, electronic device, equivalent circuit, conducted emissions, common mode, differential mode, input impedance, S parameters.

Les interferències de mode comú i diferencial que es propaguen en un cable de la xarxa elèctrica monofàsica s'acostumen a suprimir utilitzant els filtres de xarxa. Aquesta classe de filtres estan formats per xocs de mode comú, condensadors X i condensadors Y per a mitigar tant el mode comú com el mode diferencial. Tot i això, les metodologies actuals de disseny de filtres de xarxa presenten alguns inconvenients: els filtres es dissenyen per treballar en un entorn ideal amb impedàncies de 50 Ω i les atenuacions del mode comú i del mode diferencial s'analitzen de manera independent, sense considerar la conversió modal que es produeixen en les asimetries presents a la xarxa elèctrica, al dispositiu elèctric o al mateix filtre de xarxa. Aquests fets impliquen que les prediccions del comportament del filtre siguin inexactes i, conseqüentment, el filtre més adequat en una situació particular s'acaba majoritàriament escollint mitjançant la prova i error en llargues i costoses sessions de mesura. Per tal de millorar aquesta situació, aquest treball presenta:- Nous sistemes de mesura i caracterització per modelar completament el comportament dels filtres de xarxa, xarxa elèctrica i dispositius elèctrics. Amb aquesta finalitat, s'introdueix una nova metodologia de caracterització: la caracterització modal, que confina el mode comú i el mode diferencial en ports diferents, proporcionant així informació sobre la propagació de la interferència modal. Aquesta informació pot ser d'utilitat a l'hora de seleccionar el filtre de xarxa adient.- Una nova metodologia per a predir amb exactitud el nivell de les emissions conduïdes que un dispositiu elèctric introdueix a la xarxa elèctrica a través del filtre de xarxa. Aquesta metodologia està basada en les metodologies de caracterització presentades anteriorment. Caracteritzacions acurades permetran obtenir prediccions similars a les emissions conduïdes reals, evitant així llargues sessions de mesura.- Noves metodologies de disseny de filtres de xarxa per aconseguir implementacions òptimes i de baix cost. En una primera proposta, els components dels filtres de xarxa (condensadors i xocs) es caracteritzen modalment per trobar la combinació que obté el filtratge desitjat amb el mínim nombre de components. Aquesta metodologia és millorada posteriorment utilitzant filtres de xarxa asimètrics, obtenint així un filtratge òptim del mode comú i del mode diferencial.Tots els sistemes de mesura, així com les metodologies de caracterització, predicció i disseny, han estat provats amb èxit sobre equips reals. / Las interferencias de modo común y diferencial que se propagan en un cable de la red eléctrica monofásica se acostumbran a suprimir utilizando los filtros de red. Esta clase de filtros están formatos por choques de modo común, condensadores X y condensadores Y para mitigar tanto el modo común como el modo diferencial. Aún así, las metodologías actuales de diseño de filtros de red presentan algunos inconvenientes: los filtros se diseñan para trabajar en un entorno ideal con impedancias de 50 Ω y las atenuaciones del modo común y del modo diferencial se analizan de manera independiente, sin considerar la conversión modal que se producen en las asimetrías presentes en la red eléctrica, en el dispositivo eléctrico o en el mismo filtro de red. Estos hechos implican que las predicciones del comportamiento del filtro sean inexactas y, consecuentemente, el filtro más adecuado en una situación particular se acaba escogiendo mayoritariamente mediante la prueba y error en largas y costosas sesiones de medida. Para mejorar esta situación, este trabajo presenta:- Nuevos sistemas de medida y caracterización para modelar completamente el comportamiento de los filtros de red, red eléctrica y dispositivos eléctricos. Con este objetivo, se introduce una nueva metodología de caracterización: la caracterización modal, que confina el modo común y el modo diferencial en puertos diferentes, proporcionando así información sobre la propagación de la interferencia modal. Esta información puede ser de utilidad a la hora de seleccionar el filtro de red adecuado. - Una nueva metodología para predecir con exactitud el nivel de las emisiones conducidas que un dispositivo eléctrico introduce en la red eléctrica a través del filtro de red. Esta metodología está basada en las metodologías de caracterización presentadas anteriormente. Caracterizaciones precisas permitirán obtener predicciones similares a las emisiones conducidas reales, evitando así largas sesiones de medida. - Nuevas metodologías de diseño de filtros de red para conseguir implementaciones óptimas y de bajo coste. En una primera propuesta, los componentes de los filtros de red (condensadores y choques) se caracterizan modalmente para encontrar la combinación que obtiene el filtraje deseado con el mínimo número de componentes. Esta metodología es mejorada posteriormente utilizando filtros de red asimétricos, obteniendo así un filtraje óptimo del modo común y del modo diferencial. Todos los sistemas de medida, así como las metodologías de caracterización, predicción y diseño, han sido probados con éxito sobre equipos reales. / The common mode and differential mode interference propagated through the single-phase power-line cable is usually suppressed with power-line filters. This kind of filters is composed by common-mode chokes, X capacitors and Y capacitors to mitigate both the common mode and the differential mode. However, the present-day power-line filter design methodologies present some disadvantages: they are designed to be placed in an ideal 50-Ω system and the common mode and differential mode attenuations are analyzed independently, without considering the mode conversion that can be produced by asymmetries in the power-line filter, in the power-line network or in the electric device. These facts lead to inaccurate predictions of the power-line filter behavior and, consequently, the suitable filter is usually selected by trial and error in long and expensive measurement sessions. In order to improve this situation, this work presents:- New measurement systems and characterization methodologies to completely model the behavior of power-line filters, power-line networks and electric devices. To this end, a new characterization methodology is presented: the modal characterization, which confines the common mode and the differential mode into a different port and provides the information about the propagation of the modal interference, information that can be useful to select the suitable filter for its mitigation.- A new methodology to accurately predict the level of conducted emissions that an electric device supplies to the power-line network through its power-line filter, based on the measurement systems and characterization methodologies presented before. Accurate characterizations will allow predictions similar to the actual conducted emissions, avoiding long measurement sessions.- New design methodologies of power-line filters to achieve optimal and low cost implementations. In a first proposal, the components of the power-line filters are modally characterized to find, by computation, the combination that gets the desired filtering response with the minimum number of components. This methodology is further improved by using asymmetric power-line filters, obtaining an optimal mitigation of the common and differential mode.All measurement systems, as well as characterization, prediction and designing methodologies, have been successfully tested on actual devices.

This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. The circuit is supposed to work together with a 10bit pipelined analog to digital converter. A switched capacitor topology is used for the T&H circuit and the amplifier is a folded cascode OTA with regulated cascode. The switches used are of transmission gate type. The thesis presents the design decisions, design phase and the theory needed to understand the design decisions and the considerations in the design phase. The results are based on circuit level SPICE simulations in Cadence with foundry provided BSIM3 transistor models. They show that the circuit has 10bit resolution and 7.6mW power consumption, for the worst-case frequency of 30MHz. The requirements on the dynamic performance are all fulfilled, most of them with large margins.

<p>This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. The circuit is supposed to work together with a 10bit pipelined analog to digital converter. </p><p>A switched capacitor topology is used for the T&H circuit and the amplifier is a folded cascode OTA with regulated cascode. The switches used are of transmission gate type. </p><p>The thesis presents the design decisions, design phase and the theory needed to understand the design decisions and the considerations in the design phase. </p><p>The results are based on circuit level SPICE simulations in Cadence with foundry provided BSIM3 transistor models. They show that the circuit has 10bit resolution and 7.6mW power consumption, for the worst-case frequency of 30MHz. The requirements on the dynamic performance are all fulfilled, most of them with large margins.</p>

This thesis presents the analysis, design and characterization of an integrated high-frequency phase-locked loop (PLL) frequency multiplier. The frequency multiplier is novel in its use of a low multiplication factor of 4 and a fully differential topology for rejection of common mode interference signals. The PLL is composed of a voltage controlled oscillator (VCO), injection-locked frequency divider (ILFD) for the first divide-by-two stage, a static master-slave flip-flop (MSFF) divider for the second divide-by-two stage and a Gilbert cell mixer phase detector (PD). The circuit has been fabricated using a standard CMOS 0.18-um process based on its relatively low cost and ready availability. The PLL frequency multiplier generates an output signal at 26 GHz and is the highest operational frequency PLL in the technology node reported to date. Time domain phase plane analysis is used for prediction of PLL locking range based on initial conditions of phase and frequency offsets. Tracking range of the PLL is limited by the inherent narrow locking range of the ILFD, and is confirmed via experimental results. The performance benefits of the fully differential PLL are experimentally confirmed by the injection of differential- and common-mode interfering signals at the VCO control lines. A comparison of the common- and differential-mode modulation indices reveals that a common mode rejection ratio (CMRR) of greater than 20 dB is possible for carrier offset frequencies of less than 1 MHz. Closed-loop frequency domain transfer functions are used for prediction of the PLL phase noise response, with the PLL being dominated by the reference and VCO phase noise contributions. Regions of dominant phase noise contributions are presented and correlated to the overall PLL phase noise performance. Experimental verifications display good agreement and confirm the usefulness of the techniques for PLL performance prediction. The PLL clock multiplier has an operational output frequency of 26.204 to 26.796 GHz and a maximum output frequency step of 16 MHz. Measured phase noise at 1 MHz offset from the carrier is -103.9 dBc/Hz. The PLL clock multiplier core circuit (VCO/ILFD/MSFF Divider/PD) consumes 186 mW of combined power from 2.8 and 4.3 V DC rails. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2009-04-24 11:31:35.384

Durant ces dernières années, l'intérêt pour les technologies des véhicules à faibles émissions de carbone a fait un bond important à travers l'Union européenne (UE) et au-delà, encouragé en cela par les gouvernements et les constructeurs automobiles. De grands espoirs ont été mis plus récemment dans les véhicules électriques (VE) et les véhicules électriques hybrides (VEH) en tant que technologies clés pour atténuer le changement climatique, améliorer la sécurité énergétique et favoriser une nouvelle branche de l'industrie dans le secteur automobile. Ainsi, l'électrification des transports a été considérée comme une stratégie clé pour réduire les émissions de CO2 dans le secteur des transports. Le principal défi est d’augmenter l’autonomie des véhicules (ce qui a toujours été au coeur de la concurrence des industries du transport), ainsi que la durée de vie des volumineuses et coûteuses batteries. Par conséquent, ceci indique que le rendement du convertisseur de puissance est un des points clés à développer pour les générations des véhicules électriques à venir. L’autre paramètre influant est la qualité de la tension et du courant (en particulier la suppression des harmoniques basses fréquences) qui permet de réduire la taille des filtres d'entrée et de sortie de ces convertisseurs. L'objectif de cette thèse est de parvenir à un meilleur rendement en proposant de nouvelles structures de convertisseur de puissance et des commandes vectorielles modifiées ; le choix de deux onduleurs alimentant un moteur ouvert aux deux extrémités. Après l'analyse étape par étape, modèle théorique, simulation et enfin une mise en oeuvre expérimentale, il a été constaté que les nouvelles méthodes proposées sont compétitives et peuvent s’appliquer aux cas des VEH et des VE afin d’apporter des caractéristiques supérieures en termes d’efficacité et de qualité de tension et de courant. / Over the last decade, the interest for low-carbon vehicle technologies has surged among both governments and automotive manufacturers across and beyond the European Union (EU). Great hopes have been put, first, on biofuel vehicles and more recently on electric vehicles (EVs) and hybrid electric vehicles (HEVs) as key technologies to mitigate climate change, enhance energy security and nurture new industry branches within the automotive sector. So electrification of vehicles has been seen as a key strategy to reduce CO2 emissions from the transport sector. The main challenge toward EVs and HEVs is to keep driving for longer distance (which has been always fields for competition among traction industries) as well as lifetime battery cells as storage system. As a result, these indicate importance of power converter efficiency as a key gate for next generations of these up-coming vehicles. The next parameter is the quality of output voltage/current (especially by suppressing low-order harmonics) to reduce the size of filtering. The aim of this thesis is to achieve better efficiency and output voltage/current Total Harmonic Distortion (THD) by proposing novel power converter and associated Pulse Width Modulation (PWM) methods while imposing modification on power converter topology. As a result, dual-inverter is proposed to supply open-end motor from both sides. To this aim, three PWM methods are suggested as: The first one, Modified Space Vector Modulation (MSVM) for dual-inverter supplied by single dc source, improves efficiency by 4-5% (while having lower switching losses), and reduces Common Mode Voltage (CMV) levels by 66%, as well. The voltage/current harmonics are analytically analyzed which shows mainly better performance. Effective switching frequency is also reduced by 66% due to the reduction of number of commutations. In the second one, Near State PWM (NSPWM) is adapted for dual-inverter supplied by single dc source in order to eliminate triplen harmonics (therefore Zero Sequence Voltage, ZSV) and improve efficiency (by 3-4%) compared to Space Vector Modulation (SVM). Additionally due to avoiding use of zero vectors, CMV is improved by 66%. While having 8 commutations instead of 12 in SVM, effective switching frequency is improved by 33%. And finally, the third proposed method deals with NSPWM for dual-inverter supplied by two isolated dc sources wherein efficiency and CMV levels show the same performance as previous one. However, in this method, voltage THD is highly reduced compared to SVM. Triplen harmonics of the output voltage are inherently suppressed by the structure. These 3 proposed methods are analytically studied and their performances are step by step simulated in Matlab/Simulink environment. Then the methods are implemented in dualinverter fed open-end motor in laboratory setup; and the results are compared with these of SVM. Finally, it is found that novel proposed methods are so competitive solutions to be applied in HEVs and EVs and bring superior efficiency and voltage/current harmonic features.

IGBT based power converters acts as front end in the present day Adjustable Speed Drive (ASD). This offers many advantages and makes regenerative action possible. PWM rectifier operation produces electrically noisy DC bus on common mode basis. This results in higher ground current as compared to three phase diode bridge rectifier. Due to fast turn-ON and turn-OFF time of IGBT, the inverter output voltage dv/dt is high during switching transients and voltage waveform is rich in harmonics. As a result, in applications involving long cable the motor terminal voltage during the switching transient is as high as twice the applied voltage. This voltage stress reduces the life of insulation in motors. The high dv/dt output voltage applied at the motor terminal excites the parasitic capacitive coupling resulting in increased ground currents and causes Electric Discharge Machining (EDM) which reduces the life of motor bearings. The common mode voltage due to PWM rectifier and the inverter appear at the motor terminals exacerbating these problems. The common mode voltage due to PWM inverter with PWM rectifier is analyzed. An integrated approach for filter design is proposed wherein the adverse effects due to common mode voltage of both AFE converter and the inverter is addressed. The proposed topology addresses the problems of common mode voltage, common mode current and voltage doubling due to ASD. The design procedure for proposed filter topology is discussed with experimental results that validate the effectiveness of the filter. Inclusion of such higher order filter in the converter topology leads to problems such as resonance. Passive methods are investigated for damping the line resonance due to LCL filter and common mode resonance due to common mode filter. The need for active damping technique for resonance due to common mode filter is presented. State space based damping technique is proposed to effectively damp the resonance due to line filter and the common mode filter. Experimental results are presented that validate the effectiveness of active damping both on the line basis (differential mode) and line to ground basis (common mode) of the filter.