Este trabalho apresenta o estudo da influência do tensionamento mecânico (strain) no efeito de abaixamento de barreira induzido pelo dreno (DIBL) em dispositivos SOI FinFETs de porta tripla com e sem crescimento seletivo epitaxial. Também é analisada a influência do uso de crescimento seletivo epitaxial nesses dispositivos em relação ao efeito de canal curto mencionado. O uso de transistores verticais de múltiplas portas tem permitido a continuidade do escalamento dos dispositivos, apresentando melhora nos níveis de corrente bem como a supressão dos efeitos de canal curto. No entanto, ao reduzir a largura do canal, aumenta-se a resistência total do transistor, diminuindo seu desempenho. A fim de melhorar essa característica, as técnicas de tensionamento mecânico e crescimento de fonte e dreno tem sido empregadas. No primeiro caso, ao se deformar mecanicamente a estrutura do canal, altera-se o arranjo das camadas eletrônicas que ocasiona o aumento da mobilidade dos portadores. Conseqüentemente, a corrente aumenta tal como a transcondutância do dispositivo. A técnica de crescimento de fonte e dreno chamada de crescimento seletivo epitaxial (SEG) tem como finalidade reduzir ainda mais a resistência elétrica total da estrutura, uma vez que a área dessas regiões aumenta, possibilitando o aumento das áreas de contato, que são responsáveis pela maior parcela da resistência total. Esse trabalho baseia-se em resultados experimentais e simulações numéricas tridimensionais que analisam o comportamento dos transistores com as tecnologias acima apresentadas em função do efeito de DIBL. / This work presents a study about the influence of strain in the drain induced barrier lowering effect (DIBL) in triple gate SOI FinFETs. Also it is analyzed the selective epitaxial growth used in that structures, comparing their behavior in relation to DIBL effect. Using the vertical multi-gate devices become possible the downscale whereas they present higher current level and suppressed short channel effects. However, reducing the channel width, the transistors total resistance increases and consequently its performance decreases. In order to improve this feature, the strained technology and the Source/Drains growth technique has been employed. In the first case, the mechanical deformation causes a change in the electron shell, which improves the carrier mobility. Consequently, the current level and the transconductance also improve. The selective epitaxial growth technique aims to reduce the devices total resistance since these regions areas increase, allowing large contacts which are responsible for the main parcel of the total resistance. This work is based on experimental results and tridimensional simulations that analyze the transistor behavior using the technologies above presented as a function of DIBL effect.

Nesta tese são discutidos alguns aspectos importantes no desenvolvimento de sistemas fotovoltaicos moleculares. São abordados temas de interesse como a síntese de novos sensibilizadores para células solares sensibilizadas por corante, o desenvolvimento de novos materiais fotoativos, Química Supramolecular, bem como a aplicação de sistemas fotovoltaicos em eletrônica molecular, especificamente no desenvolvimento de portas lógicas moleculares e dispositivos de memória. A porfirina TBPyP, contendo quatro ligantes 2,2\'-bipiridina ligados covalentemente aos carbonos meso do anel porfirínico, foi sintetizada. Este derivado porfirínico serviu como bloco de construção de sistemas supramoleculares. A utilização desses sistemas como sensibilizadores em células solares (células de Grätzel) é discutido. Fios moleculares derivados da TBPyP foram obtidos via coordenação com íons de metais de transição e são investigados quanto à possibilidade de utilização em eletrônica molecular. Novos sistemas fotovoltaicos multicamada, utilizando filmes de porfirina depositados por evaporação a vácuo como elementos fotoativos e filmes de V2O5 como eletrodo passivo, foram estudados quanto a sua eficiência e quanto ao seu mecanismo de funcionamento. Os filmes finos de porfirina obtidos neste estudo foram testados como elelementos fotoativos em células fotovoltaicas com diferentes configurações, além daquelas utilizando filmes de V2O5. A obtenção de filmes híbridos compostos de nanopartículas de ouro e ligantes orgânicos foi desenvolvida e sua aplicação em sistemas fotovoltaicos bem como em dispositivos de memória investigada. Novas portas lógicas moleculares foram obtidas utilizando-se o arranjo de células de Grätzel convencionais sensibilizadas por clusteres trigonais de rutênio sintetizados para este fim. Seu princípio de funcionamento é discutido, bem como a seu potencial de integração em circuitos lógicos. / In this thesis some aspects concerning the development of molecular photovoltaic systems are discussed. Themes of current interest such as the synthesis of new sensitizers for dye-sensitized solar cells, the development of new photoactive materials, and Supramolecular Chemistry are treated, as well as the application of photovoltaic systems in molecular electronics, specifically in the development of molecular logic gates and memory devices. The porphyrin TBPyP, comprised of four 2,2\'-bipyridine ligands covalently linked to the porphyrin meso carbons, was synthesized. This porphyrin derivative was used as a building block on supramolecular systems. The utilization of these supramolecular species in solar cells (Grätzel cells) is discussed. The coordination of the porphyrin TBPyP with transition metal ions gave rise to molecular wires, which are investigated about its potential use in molecular electronics. New multilayer photovoltaic systems, using thermo-evaporated porphyrin films as photoactive elements and V2O5 films as passive electrodes, had their efficiency and mechanism studied. The confection of hybrid films comprised of gold nanoparticles and organic ligands was developed and its application in photovoltaic systems, as well as in memory devices, was investigated. New molecular logic gates were realized using the a Grätzel cell in its conventional configuration, sensitized by ruthenium trigonal clusters synthesized to this end.

Piles have been used since prehistoric times in areas with weak subsurface conditions either to reinforce existing ground, create new ground for habitation or trade, and support bridges and buildings. Originally piles were composed of timber and driven with drop hammers using very heavy ram weights. As technology improved so did the materials that piles are composed of as well as the equipment itself. Currently, piling is a multibillion dollar a year industry, thus the need to develop more accurate prediction methods can potentially represent a significant savings in cost, material, and man power. Multiple predictive methods have been developed to estimate developed pile capacity. These range from static theoretical formulae based on geotechnical investigation prior to pile driving even occurring using specific pile and hammer types to semi empirically based dynamic formulae used during actual driving operations to more recently developed computer modeling and signal matching programs which are calibrated with site condition during initial geotechnical investigations or test piling to full scale static load tests where piles are loaded to some predetermined value or failure condition. In this thesis, dynamic formulae are used to predict pile capacity from those installed by drop and diesel hammers and are compared to the results from pile load tests, which are taken as the true measure of developed bearing capacity. The dynamic formulae examined are the Engineering News Record (ENR), Gates, Federal Highway Administration (FHWA) modified Gates, Hiley, and Ontario Ministry of Transportation (MTO) modified Hiley formulae. Methods of investigation include calculating pile capacities from the formulae as they are, omitting the factors of safety, revising the formulae with averaged coefficients and conducting multi regression analysis to solve for one or two coefficients simultaneously and revising the dynamic formula to determine if more accurate bearing capacity prediction are possible. To objectively determine which formulae provide the most accurate bearing capacities, the predicted capacities will be compared to results obtained from static pile load tests and simple statistics on the resulting data set will be calculated including regression analysis, standard deviations, coefficients of variation, coefficients of determination, and correlation values.

The programmability property of floating-gate transistors is exploited in this work to compensate for mismatch and device parameter variations in various high performance analog circuits. A careful look is taken at the characteristics and behavior of floating-gate transistors; issues such as programming, precision, accuracy, and charge retention are addressed. An alternate approach to reduce the offset voltage of the amplifier is presented. The proposed approach uses floating-gate transistors as programmable current sources that provide offset compensation while being a part of the amplifier of interest during normal operation. This results in an offset voltage cancelation that is independent of other amplifier parameters and does not dissipate additional power. Two compact programmable architectures that implement a voltage reference based on the charge difference between two floating-gate transistors are introduced. The references exhibit a low temperature coefficient (TC) as all the transistors temperature dependencies are canceled. Programming the charge on the floating-gate transistors provides the flexibility of an arbitrary accurate voltage reference with a single design and allows for a high initial accuracy of the reference. Also, this work presents a novel programmable temperature compensated current reference. The proposed circuit achieves a first order temperature compensation by canceling the negative TC of an on-chip poly resistor with the positive TC of a MOS transistor operating in the ohmic region. Programmability of the ohmic resistor enables optimal temperature compensation while programmability of the reference voltage allows for an accurate current reference for a wide range of values. Finally, this work combines the already established DAC design techniques with floating-gate circuits to obtain a high precision converter. This approach enables higher accuracy along with a substantial decrease of the die size.

A complete all-optical-processing polarization-based binary-logic system, by which any logic gate or processor could be implemented, was proposed. Following the new polarization-based representation, a new Orthoparallel processing technique that allows for the creation of all-optical-processing gates that produce a unique output once in a truth table, was developed. This representation allows for the implementation of all basic 16 logic gates, including the NAND and NOR gates that can be used independently to represent any Boolean expression or function. In addition, the concept of a generalized gate is presented, which opens the door for reconfigurable optical processors and programmable optical logic gates. The gates can be cascaded, where the information is always on the laser beam. The polarization of the beam, and not its intensity, carries the information. The new methodology allows for the creation of multiple-input-multiple-output processors that implement, by itself, any Boolean function, such as specialized or non-specialized microprocessors. The Rail Road (RR) architecture for polarization optical processors (POP) is presented. All the control inputs are applied simultaneously, leading to a single time lag, which leads to a very-fast and glitch-immune POP. A simple and easy-to-follow step-by-step design algorithm is provided for the POP, and design reduction methodologies are discussed. The algorithm lends itself systematically to software programming and computer-assisted design. A completely passive optical switch was also proposed. The switch is used to design completely passive optical gates, including the NAND gate, with their operational speeds only bound by the input beams prorogation delay. The design is used to demonstrate various circuits including the RS latch. Experimental data is reported for the NAND and the Universal gate operating with different functionality. A minute error is recorded in different cases, which can be easily eliminated by a more dedicated manufacturing process. Finally, some field applications are discussed and a comparison between all proposed systems and the current semiconductor devices is conducted based on multiple factors, including, speed, lag, and heat generation.

In this dissertation, three different microfluidic devices with bioanalytical applications are presented. From chapter to chapter, the bioanalytical focus will gradually become the development of a point-of-care sensor platform able to yield a reliable and quantitative response in the presence of the desired target. The first device consists of photolithographically-patterned gold on glass bipolar electrodes and PDMS Y-shaped microchannels for the controlled enrichment, separation from a mixture, and delivery of two charged dyes into separate receiving microchannels. The principle for the permanent separation of these dyes is based on the concept of bipolar electrochemistry and depended on the balancing/unbalancing of convective and electromigrating forces caused by the application of a potential bias, as well as the activation/deactivation of the bipolar electrodes. Two different bipolar electrode configurations are described and fluorescence is used to optimize their efficiency, speed, and cleanliness of delivery. The second device is a DNA sensor fabricated on paper by wax printing and folding to form 3D channels. DNA is detected by strand-displacement induced fluorescence of a single-stranded DNA. A multiplexed version of this sensor is also shown where the experiment results in “OR” and “AND” Boolean logic gate operations. In addition, the nonspecific adsorption of the reagents to cellulose is studied, demonstrating that significant reduction of nonspecific adsorption and increased sensitivity can be achieved by pre-treating the substrate with bovine serum albumin and by preparing all analyte solutions with spectator DNA. The third device, also made of paper, has a novel design and uses a versatile electrochemical detection method for the indirect detection of analytes via the direct detection of AgNP labels. A proof-of-concept experiment is shown where streptavidin-coated magnetic microbeads and biotin-coated AgNPs are used to form a composite model analyte. The paper device, called oSlip, and electrochemical method used are easily coupled so the resulting sensor has a simple user-device interface. LODs of 767 fM are achieved while retaining high reproducibility and efficiency. The fourth device is the updated version of the oSlip. In this case, the objective is to show the current progress and limitations in the detection of real analytes using the oSlip device. A sandwich-type immunoassay approach is used to detect human chorionic gonadotrophin (pregnancy hormone) present in human urine. Various optimization steps are performed to obtain the ideal reagent concentrations and incubation time necessary to form the immunocomposite in one step, that is, by mixing all reagents at the same time in the oSlip. Additionally, improvements to the electrochemical detection step are demonstrated. / text

A CO2 emission analysis and system investigation of a direct fuel cell waste energy recovery and power generation system (DFC-ERG) for pressure letdown stations was undertaken. The hybrid system developed by FuelCell Energy Inc. is an integrated turboexpander and a direct internal reforming molten carbonate fuel cell system in a combined circle. At pressure letdown stations, popularly called city gates, the pressure of natural gas transported on long pipelines is reduced by traditional pressure regulating systems. Energy is lost as a result of pressure reduction. Pressure reduction also results in severe cooling of the gas due to the Joule Thompson effect, thus, requiring preheating of the natural gas using traditional gas fired-burners. The thermal energy generated results in the emission of green house gases. The DFC-ERG system is a novel waste energy recovery and green house gas mitigation system that can replace traditional pressure regulating systems on city gates. A DFC-ERG system has been simulated using UniSim Design process simulation software. A case study using data from Utilities Kingston’s city gate at Glenburnie was analysed. The waste energy recovery system was modelled using the design specifications of the FuelCell Energy Inc’s DFC 300 system and turboexpander design characteristics of Cryostar TG120. The Fuel Cell system sizing was based on the required thermal output, electrical power output, available configuration and cost. The predicted performance of the fuel cell system was simulated at a current density of 140mA/cm2, steam to carbon ratio of 3, fuel utilization of 75% and oxygen utilization of 30%. The power output of the turboexpander was found to strongly depend on the high pressure natural gas flowrate, temperature and pressure. The simulated DFC-ERG system was found to reduce CO2 emissions when the electrical power generated by the DFC-ERG system replaced electrical power generated by a coal fired plant. / Thesis (Master, Chemical Engineering) -- Queen's University, 2010-08-31 02:02:11.392

Piles have been used since prehistoric times in areas with weak subsurface conditions either to reinforce existing ground, create new ground for habitation or trade, and support bridges and buildings. Originally piles were composed of timber and driven with drop hammers using very heavy ram weights. As technology improved so did the materials that piles are composed of as well as the equipment itself. Currently, piling is a multibillion dollar a year industry, thus the need to develop more accurate prediction methods can potentially represent a significant savings in cost, material, and man power. Multiple predictive methods have been developed to estimate developed pile capacity. These range from static theoretical formulae based on geotechnical investigation prior to pile driving even occurring using specific pile and hammer types to semi empirically based dynamic formulae used during actual driving operations to more recently developed computer modeling and signal matching programs which are calibrated with site condition during initial geotechnical investigations or test piling to full scale static load tests where piles are loaded to some predetermined value or failure condition. In this thesis, dynamic formulae are used to predict pile capacity from those installed by drop and diesel hammers and are compared to the results from pile load tests, which are taken as the true measure of developed bearing capacity. The dynamic formulae examined are the Engineering News Record (ENR), Gates, Federal Highway Administration (FHWA) modified Gates, Hiley, and Ontario Ministry of Transportation (MTO) modified Hiley formulae. Methods of investigation include calculating pile capacities from the formulae as they are, omitting the factors of safety, revising the formulae with averaged coefficients and conducting multi regression analysis to solve for one or two coefficients simultaneously and revising the dynamic formula to determine if more accurate bearing capacity prediction are possible. To objectively determine which formulae provide the most accurate bearing capacities, the predicted capacities will be compared to results obtained from static pile load tests and simple statistics on the resulting data set will be calculated including regression analysis, standard deviations, coefficients of variation, coefficients of determination, and correlation values.

Thesis (Ph.D.)--University of Alberta, 2010. / Title from pdf file main screen (viewed on July 28, 2010). "A thesis submitted to the Faculty of Graduate Studies and Research in partial fulfillment of the requirements for the degree of Doctor of Philosphy in English, Department of English and Film Studies, University of Alberta." Includes bibliographical references.

Submitted by Johnny Rodrigues (johnnyrodrigues@ufcg.edu.br) on 2018-08-20T19:33:13Z No. of bitstreams: 1 CRISTOVÃO MÁCIO DE OLIVEIRA LIMA FILHO - DISSERTAÇÃO PPGEE 2010..pdf: 2095765 bytes, checksum: 1c2232fd0f1557df7308e04bad6426c2 (MD5) / Made available in DSpace on 2018-08-20T19:33:13Z (GMT). No. of bitstreams: 1 CRISTOVÃO MÁCIO DE OLIVEIRA LIMA FILHO - DISSERTAÇÃO PPGEE 2010..pdf: 2095765 bytes, checksum: 1c2232fd0f1557df7308e04bad6426c2 (MD5) Previous issue date: 2010-06-09 / Esta dissertação descreve o desenvolvimento de um leiaute de uma nova arquitetura de multiplicador em corpos finitos baseada no multiplicador de Mastrovito. Tal arquitetura tem como unidades de processamento as portas de limiar linear, que é o elemento básico de uma rede neural discreta. As redes neurais discretas implementadas com portas de limiar linear permitem reduzir a complexidade de certos circuitos antes implementados com lógica tradicional (Portas AND, OR e NOT). Com isso, a idéia de estender o uso de portas de limiar linear em operações aritméticas em corpos finitos se torna bastante atraente. Assim, para comprovar de forma prática, a eficiência das portas de limiar linear, a arquitetura de um multiplicador em GF(24), proposta em (LIDIANO - 2000), foi implementada utilizando as ferramentas de desenho de leiaute de circuito integrado da Mentor Graphics®. Os resultados da simulação do leiaute do circuito integrado do multiplicador em GF(24) são apresentados. Os mesmos indicaram um desempenho abaixo do esperado, devido a complexidade espacial do multiplicador em GF(2n) com 4=n não ser suficiente para que as vantagens da implementação com portas de limiar linear sejam visualizada. / This dissertation describes the development of a layout of new multiplication architecture in Galois field based on the Mastrovito multiplier. The processing unit of this new architecture is a threshold logic gate, which is a basic element of a discrete neural network. The discrete neural network built with threshold logic gates allow reduce de complexity of a certain circuits once built using traditional boolean gates (AND, OR and NOT). Therewith, the idea of extending the advantages of the threshold logic gates for arithmetic operations in Galois field to become very attractive. Thus, to confirm into practice form, the advantages of the threshold logic gates, a multiplier architecture in GF(24), proposed in (LIDIANO - 2000), was implemented using the integrated circuit layout tools of Mentor Graphics®. The results from simulations of the layout of multiplier in GF(24) are presented. These results indicated a low performance, due to the space complexity of GF(2n) multiplier with n = 4 is not enough for show the advantages of the multiplier implementation with threshold logic gates.