La photonique du silicium a connu un développent massif pendant les dix derniers années. Presque toutes les briques technologiques de base ont été réalisées et ont démontrées des performances remarquables. Cependant, le manque d’une source laser intégrée en silicium a conduit les chercheurs à développer de composants basés sur l’intégration entre le silicium et les matériaux III-V.Dans cette thèse je décris la conception, la fabrication et la caractérisation des lasers hybrides III-V sur silicium basés sur cette intégration. Je propose un coupleur adiabatique qui permet de transférer intégralement le mode optique du guide silicium au guide III-V. Le guide actif III-V au centre du composant fourni le gain optique et les coupleurs, des deux cotés, assurent le transfert de la lumière dans les guides silicium.Les lasers mono longueur d’onde sont des éléments fondamentaux des communications optiques. Je décris les différentes solutions permettant d’obtenir un laser mono-longueur d’onde hybride III-V sur silicium. Des lasers mono longueur d’onde ont été fabriqués et caractérisés. Ils démontrent un seuil de 21 mA, une puissance de sortie qui dépasse 10 mW et une accordabilité de 45 nm. Ces composants représentent la première démonstration d’un laser accordable hybride III-V sur silicium. / Silicon photonics knew an impressive development in the last ten years. Almost all the fundamental building blocks have been demonstrated and reveal competitive performances. However, the lack of an efficient silicon integrated laser source has led the researchers to develop heterogeneous integration of III-V materials on silicon.In this thesis I describe the design, the fabrication and the performances of these hybrid III-V on silicon lasers. I propose the use of an adiabatic coupler that totally transfers the optical mode between the III-V and the silicon waveguides. The active waveguide on III-V materials at the center of the device provides the optical gain, while, on both side, adiabatic couplers allow a loss-less transfer of the optical mode to the silicon waveguide. Single wavelength emitting lasers are fundamental elements for high bandwidth optical links. I review all the effective solutions enabling single waveguide hybrid III-V on SOI lasers. DBR, microring based, DFB and AWG laser solutions were analysed. Single wavelength operating lasers have been fabricated and characterized. A laser threshold of only 21 mA, an output power of more than 10 mW and tunability over 45 nm with a SMSR of 45 dB have been measured. These devices represent the first demonstration of a monolithically integrated hybrid III-V/Si tunable laser made by wafer bonding technique.

This thesis presents methods for fabricating MicroElectroMechanical System (MEMS) actuators and high-flow gas microvalves using wafer-level integration of Shape Memory Alloys (SMAs) in the form of wires and sheets. The work output per volume of SMA actuators exceeds that of other microactuation mechanisms, such as electrostatic, magnetic and piezoelectric actuation, by more than an order of magnitude, making SMA actuators highly promising for applications requiring high forces and large displacements. The use of SMAs in MEMS has so far been limited, partially due to a lack of cost efficient and reliable wafer-level integration approaches. This thesis presents new methods for wafer-level integration of nickel-titanium SMA sheets and wires. For SMA sheets, a technique for the integration of patterned SMA sheets to silicon wafers using gold-silicon eutectic bonding is demonstrated. A method for selective release of gold-silicon eutectically bonded microstructures by localized electrochemical etching, is also presented. For SMA wires, alignment and placement of NiTi wires is demonstrated forboth a manual approach, using specially built wire frame tools, and a semiautomatic approach, using a commercially available wire bonder. Methods for fixing wires to wafers using either polymers, nickel electroplating or mechanical silicon clamps are also shown. Nickel electroplating offers the most promising permanent fixing technique, since both a strong mechanical and good electrical connection to the wire is achieved during the same process step. Resistively heated microactuators are also fabricated by integrating prestrained SMA wires onto silicon cantilevers. These microactuators exhibit displacements that are among the highest yet reported. The actuators also feature a relatively low power consumption and high reliability during longterm cycling. New designs for gas microvalves are presented and valves using both SMA sheets and SMA wires for actuation are fabricated. The SMA-sheet microvalve exhibits a pneumatic performance per footprint area, three times higher than that of previous microvalves. The SMA-wire-actuated microvalve also allows control of high gas flows and in addition, offers benefits of lowvoltage actuation and low overall power consumption. / QC 20120514

The increasing demand for high performance and miniature high frequency electronics has motivated the development of Micro-electro Mechanical Systems (MEMS) resonators, some of which have already become a commercial success for the making of filters, duplexers and oscillators used in radio frequency (RF) front-end systems for portable electronic devices. These MEMS components not only enable size, power and cost reduction with respect to their existing counterparts, but also open exciting opportunities for implementing new functionalities when used in large arrays. Almost all MEMS resonators require interfacing with one or more Complementary Metal Oxide Semiconductor (CMOS) integrated circuit components or modules in processing raw signals from individual MEMS devices. Hence, these devices should be integrated with CMOS circuits in an efficient and robust way in order to facilitate their deployment in large arrays with minimal parasitics, delay and power losses due to signal routing and CMOS-MEMS interconnects. Among the MEMS resonators developed to date, Aluminum Nitride (AlN) MEMS Contour-Mode Resonators (CMRs) offer high electro-mechanical coupling coefficient (𝑘𝑡2) and quality factor (Q), and a center frequency (f0) that can be set lithographically by varying the device in-plane dimensions. Also, AlN MEMS CMRs can be fabricated using state-of-the-art CMOS processes and micromachining techniques. These properties allow the synthesis of multi-frequency band-pass filters (BPFs) on a single chip with a low insertion loss and the capability of direct matching to 50 Ω systems. All these advantages, along with a sufficiently mature fabrication process, make AlN CMRs one of the ideal candidates for pursuing their integration with CMOS technology and implement high performance filters with programming capability. In this work we develop for the first time a three-dimensional (3D) heterogeneously integrated AlN MEMS-CMOS platform that enables the realization of such systems as self- healing filters for RF front-ends and programmable filter arrays for cognitive radios. We collaborated with the A*STAR, Institute of Microelectronics (IME), Singapore in the development of AlN MEMS platform on an 8" silicon (Si) wafer; on the other hand, CMOS chips were fabricated in 65 nm International Business Machines Corporation (IBM) and 28 nm Samsung processes. Solder bumps were placed on CMOS chips by Tag and Label Manufacturers Institute (TLMI) under the supervision of Metal Oxide Semiconductor Implementation Service (MOSIS). We demonstrated 3D integrated chip stacks with primary RF signal routing on MEMS and on CMOS for self-healing filters, and showcased the other system via wire-bonding to off-the-shelf CMOS components on a printed circuit board (PCB) because of the inability to continue to have access to the CMOS wafers and bumping processes over the last two years of the project.

Le recuit photonique est une technologie émergente basée sur la conversion instantanée del’énergie lumineuse absorbée par les nanoparticules (NPs) en chaleur. Dans ces travaux, il estdéployé sur des pistes d’interconnexions imprimées sur support souple par jet de matière, àpartir d’une encre de NPs d’argent (Ø=25nm).Une étude des paramètres du procédé a permis d’établir le lien entre ces derniers (énergie,fréquence) et la résistance carrée (120m!/ ) induite. Celui-ci a été confirmé grâce à unemodélisation thermique multicouches et au développement d’une instrumentation inéditemesurant, toutes les 4μs, les variations de la résistance pendant le recuit photonique (quelquesms). La stabilisation de la résistance corrélée avec les propriétés optiques du film est optimalepour une exposition de 2-3J/cm² induisant un échauffement à environ 200°C.L’analyse de la microstructure des films par diffraction des rayons X met en évidence le lienentre la croissance des cristallites et la résorption des défauts. La minimisation de la résistanceélectrique est corrélée à la croissance du collet entre les nanoparticules par diffusion atomiquede surface. De plus, une meilleure cohésion des NPs améliore la dureté par rapport au recuit àl’étuve.La résistance électrique de contact (200m!) entre les plots d’interconnexion d’une puce ensilicium et les pistes imprimées a été mesurée grâce à un montage dédié de mesure électriqueau nano-indendeur. Les forces à appliquer (300mN par bump) / Photonic sintering is an emerging technology based on the instantaneous conversion ofabsorbed light energy by nanoparticles (NPs) into heat. In this work, it is used oninterconnections printed on flexible substrates by inkjet printing of a metal silver nanoinkwith particle mean diameter of Ø=25nm.A process parameters study has allowed us to link them (energy, frequency) with theinduced sheet resistance (120m!/ ). This has been confirmed through thermal modeling ofthe multilayer system, and also by monitoring the resistance variations in-situ duringphotonic sintering (a few ms) using an innovative characterization tool, allowingmeasurements every 4 μs. The electrical resistance stabilization correlated with the opticalproperties of the film was found to be optimal for an exposition of 2-3J/cm², whichcorresponds to heating up to approximately 200°C.Films microstructure analysis with X-ray diffraction enlightens the link between crystallitescoarsening and defaults density reduction. The minimization of electrical resistivity iscorrelated with neck growth between nanoparticles trigged by surface atomic diffusion.Moreover, a stronger cohesion between NPs improves the mechanical hardness compared toclassical oven curing.The electrical contact resistance (200m!) between a silicon chip interconnection bumpand printed tracks is measured thanks to an in-house setting for electrical measurement withthe nanoindenter. The level of forces to apply (300mN per bump) is optimized and transferredto a thermocompression by industrial equipment. A set of prototypes are fabricated andconfirm the compatibility of these technologies with a future industrial integration.

L'objectif de cette thèse est de réaliser l'intégration monolithique de nanofils (NFs) à base de l’alliage Al0.2Ga0.8As sur des substrats de Si par épitaxie par jets moléculaires via la méthode vapeur-liquide-solide (VLS) auto-assistée et de développer une cellule solaire tandem (TSC) à base de ces NFs.Pour atteindre cet objectif, nous avons tout d'abord étudié la croissance de NFs GaAs, étape clé pour le développement des NFs p-GaAs/p.i.n-Al0.2Ga 0.8As coeur/coquille, qui devraient constituer la cellule supérieure de la TSC. Nous avons montré, en particulier, l'influence de l'angle d'incidence du flux de Ga sur la cinétique de croissance des NFs GaAs. Un modèle théorique et des simulations numériques ont été réalisées pour expliquer ces résultats expérimentaux.Nous avons ensuite utilisé le savoir-faire acquis pour faire croître des NFs p-GaAs/p.i.n-Al0,2Ga0,8As coeur/coquille sur des substrats de Si prêts pour l'emploi. Les caractérisations EBIC réalisées sur ces NFs ont montré qu'ils sont des candidats potentiels pour la réalisation d’une cellule photovoltaïque. Nous avons ensuite fait croître ces NFs sur des substrats de Si patternés afin d'obtenir des réseaux réguliers de ces NFs. Nous avons développé un protocole, basé sur un pré-traitement thermique, qui permet d'obtenir des rendements élevés de NFs verticaux (80-90 %) sur une surface patternée de 0,9 x 0,9 mm2.Enfin, nous avons consacré une partie de notre travail à définir le procédé de fabrication optimal pour la TSC, en concentrant notre attention sur le développement de la jonction tunnel de la TSC, l'encapsulation des NFs et le contact électrique supérieur du réseau de NFs. / The objective of this thesis is to achieve monolithical integration of Al0.2Ga0.8As-based nanowires (NWs) on Si substrates by molecular beam epitaxy via the self-assisted vapour-liquid-solid (VLS) method and develop a NWs-based tandem solar cell (TSC).In order to fulfil this purpose, we firstly focused our attention on the growth of GaAs NWs this being a key-step for the development of p-GaAs/p.i.n-Al0.2Ga0.8As core/shell NWs, which are expected to constitute the top cell of the TSC. We have shown, in particular, the influence of the incidence angle of the Ga flux on the GaAs NW growth kinetic. A theoretical model and numerical simulations were performed to explain these experimental results.Subsequently, we employed the skills acquired to grow p-GaAs/p.i.n-Al0.2Ga0.8As core/shell NWs on epi-ready Si substrates. EBIC characterizations performed on these NWs have shown that they are potential building blocks for a photovoltaic cell. We then committed to growing them on patterned Si substrates so as to obtain regular arrays of NWs. We have developed a protocol, based on a thermal pre-treatment, which allows obtaining high vertical yields of such NWs (80-90 %) on patterned Si substrates (on a surface of 0.9 x 0.9 mm2).Finally, we dedicated part of our work to define the optimal fabrication process for the TSC, focusing our attention to the development of the TSC tunnel junction, the NW encapsulation and the top contacting of the NWs.

The development of micro and nano-electromechanical systems (MEMS and NEMS) with entirely new or improved functionalities is typically based on novel or improved designs, materials and fabrication methods. However, today’s micro- and nano-fabrication is restrained by manufacturing paradigms that have been established by the integrated circuit (IC) industry over the past few decades. The exclusive use of IC manufacturing technologies leads to limited material choices, limited design flexibility and consequently to sub-optimal MEMS and NEMS devices. The work presented in this thesis breaks new ground with a multitude of novel approaches for the integration of non-standard materials that enable the fabrication of 3D micro and nanoelectromechanical systems. The objective of this thesis is to highlight methods that make use of non-standard materials with superior characteristics or methods that use standard materials and fabrication techniques in a novel context. The overall goal is to propose suitable and cost-efficient fabrication and integration methods, which can easily be made available to the industry. The first part of the thesis deals with the integration of bulk wire materials. A novel approach for the integration of at least partly ferromagnetic bulk wire materials has been implemented for the fabrication of high aspect ratio through silicon vias. Standard wire bonding technology, a very mature back-end technology, has been adapted for yet another through silicon via fabrication method and applications including liquid and vacuum packaging as well as microactuators based on shape memory alloy wires. As this thesis reveals, wire bonding, as a versatile and highly efficient technology, can be utilized for applications far beyond traditional interconnections in electronics packaging. The second part presents two approaches for the 3D heterogeneous integration based on layer transfer. Highly efficient monocrystalline silicon/ germanium is integrated on wafer-level for the fabrication of uncooled thermal image sensors and monolayer-graphene is integrated on chip-level for the use in diaphragm-based pressure sensors. The last part introduces a novel additive fabrication method for layer-bylayer printing of 3D silicon micro- and nano-structures. This method combines existing technologies, including focused ion beam implantation and chemical vapor deposition of silicon, in order to establish a high-resolution fabrication process that is related to popular 3D printing techniques. / <p>QC 20121207</p>

This thesis presents methods for the wafer-level integration of shape memory alloy (SMA) and electrostatic actuators to functionalize MEMS devices. The integration methods are based on heterogeneous integration, which is the integration of different materials and technologies. Background information about the actuators and the integration method is provided. SMA microactuators offer the highest work density of all MEMS actuators, however, they are not yet a standard MEMS material, partially due to the lack of proper wafer-level integration methods. This thesis presents methods for the wafer-level heterogeneous integration of bulk SMA sheets and wires with silicon microstructures. First concepts and experiments are presented for integrating SMA actuators with knife gate microvalves, which are introduced in this thesis. These microvalves feature a gate moving out-of-plane to regulate a gas flow and first measurements indicate outstanding pneumatic performance in relation to the consumed silicon footprint area. This part of the work also includes a novel technique for the footprint and thickness independent selective release of Au-Si eutectically bonded microstructures based on localized electrochemical etching. Electrostatic actuators are presented to functionalize MEMS crossbar switches, which are intended for the automated reconfiguration of copper-wire telecommunication networks and must allow to interconnect a number of input lines to a number of output lines in any combination desired. Following the concepts of heterogeneous integration, the device is divided into two parts which are fabricated separately and then assembled. One part contains an array of double-pole single-throw S-shaped actuator MEMS switches. The other part contains a signal line routing network which is interconnected by the switches after assembly of the two parts. The assembly is based on patterned adhesive wafer bonding and results in wafer-level encapsulation of the switch array. During operation, the switches in these arrays must be individually addressable. Instead of controlling each element with individual control lines, this thesis investigates a row/column addressing scheme to individually pull in or pull out single electrostatic actuators in the array with maximum operational reliability, determined by the statistical parameters of the pull-in and pull-out characteristics of the actuators. / QC20100729

La croissance continue et rapide du trafic de données dans les infrastructures de télécommunications, impose des niveaux de débit de transmission ainsi que de puissance de traitement de l’information, que les capacités intrinsèques des systèmes et microcircuits électroniques ne seront plus en mesure d’assurer à brève échéance : le développement de nouveaux scenarii technologiques s’avère indispensable pour répondre à la demande de bande passante imposée notamment par la révolution de l’internet, tout en préservant une consommation énergétique raisonnable. Dans ce contexte, l’intégration hétérogène fonctionnelle sur silicium de dispositifs photoniques à émission par la surface de type VCSEL utilisant des miroirs large-bandes ultra-compacts à cristaux photoniques constitue une stratégie prometteuse pour surmonter l’impasse technologique actuelle, tout en ouvrant la voie à un développement rapide d’architectures et de systèmes de communications innovants dans le cadre du mariage entre photonique et micro-nano-électronique. / The ever-growing demand for high-volume fast data transmission and processing is nowadays rapidly attaining the intrinsic limit of microelectronic circuits to offer high modulation bandwidth at reasonable power dissipation. Silicon photonics is set to break the technological deadlock aiming at a functional photonics-on-CMOS integration for innovative optoelectronic systems paving the way towards next-era communication architectures. Among the others photonic building blocks such as photodiodes, optical modulators and couplers, power-efficient compact semiconductors sources in the near-infrared telecommunication bands, characterized by performing modal features as well as thermal resiliency constitute an essential landmark to be achieved. Within such context, InP-based long-wavelength vertical-cavity surface-emitting lasers (VCSELs) using one-dimensional Si/SiO2 photonic crystals as wideband compact mirrors are proposed as next generation emitters for CMOS integration.