The largest 21st century radio telescope, the Square Kilometre Array (SKA) is now being planned, and the first phase of construction is estimated to commence in the year 2016. Phased array technology, the key feature of the SKA, requires the use of a tremendous number of receivers, estimated at approximately 37 million. Therefore, in the context of this project, the Low Noise Amplifier (LNA) located at the front end of the receiver chain remains the critical block. The demanding specifications in terms of bandwidth, low power consumption, low cost and low noise characteristics make the LNA topologies and their design methodologies one of the most challenging tasks for the realisation of the SKA. The LNA design is a compromise between the topology selection, wideband matching for a low noise figure, low power consumption and linearity. Considering these critical issues, this thesis describes the procedure for designing a monolithic microwave integrated circuit (MMIC) LNA for operation in the mid frequency band (400 MHz to 1.4 GHz) of the SKA. The main focus of this work is to investigate the potential of MMIC LNA designs based on a novel InGaAs/InAlAs/InP pHEMT developed for 1 µm gate length transistors, fabricated at The University of Manchester. An accurate technique for the extraction of empirical linear and nonlinear models for the fabricated active devices has been developed. In addition to the linear and nonlinear model of the transistors, precise models for passive devices have also been obtained and incorporated in the design of the amplifiers. The models show excellent agreement between measured and modelled DC and RF data. These models have been used in designing single, double and differential stage MMIC LNAs. The LNAs were designed for a 50 Ω input and output impedance. The excellent fits between the measured and modelled S-parameters for single and double stage single-ended LNAs reflects the accurate models that have been developed. The single stage LNA achieved a gain ranging from 9 to 13 dB over the band of operation. The gain was increased between 27 dB and 36 dB for the double stage and differential LNA designs. The measured noise figures obtained were higher by ~0.3 to ~0.8 dB when compared to the simulated figures. This is due to several factors which are discussed in this thesis. The single stage design consumes only a third of the power (47 mW) of that required for the double stage design, when driven from a 3 V supply. All designs were unconditionally stable. The chip sizes of the fabricated MMIC LNAs were 1.5 x 1.5 mm2 and 1.6 x 2.5 mm2 for the single and double stage designs respectively. Significantly, a series of differential input to single-ended output LNAs became of interest for use in the Square Kilometre Array (SKA), as it utilises differential output antennas in some of its configurations. The single-ended output is preferable for interfacing to the subsequent stages in the analogue chain. A noise figure of less than 0.9 dB with a power consumption of 180 mW is expected for these designs.

Ultra wide band (UWB) is an extremely promising wireless technology for researchers and industrials. One of the most interesting is its high data rate and fading robustness due to selective frequency fading. However, beside such advantages, UWB system performance is highly affected by existing narrowband interference (NBI), undesired UWB signals and tone/multi-tone noises. For this reason, research about NBI cancellation is still a challenge to improve the system performance vs. receiver complexity, power consumption, linearity, etc. In this work, the two major receiver sections, i.e., analog (radiofrequency or RF) and digital (digital signal processing or DSP), were considered and new techniques proposed to reduce circuit complexity and power consumption, while improving signal parameters. In the RF section, different multiband UWB low-noise amplifier key design parameters were investigated like circuit configuration, input matching and desired/undesired frequency band filtering, highlighting the most suitable filtering package for efficient UWB NBI cancellation. In the DSP section, due to pulse transmitter signals, different issues like modulation type and level, pulse variety, shape and color noise/tone noise assumptions, were addressed for efficient NBI cancelation. A comparison was performed in terms of bit-error rate, signal-to-interference ratio, signal-to-noise ratio, and channel capacity to highlight the most suitable parameters for efficient DSP design. The optimum number of filters that allows the filter bandwidth to be reduced by following the required low sampling rate and thus improving the system bit error rate was also investigated.

No description available.

The aim of Master’s thesis Transceiver and TNC for Data Communication in UHF Band with CC1020 Chip is design of unit, which provides a data transfer by the packet radio net. It is an experiment, whether CC1020 chip is possible to use for TNC design. The thesis consists of study AX25 a KISS protocols, study of CC1020 features, design of PA and LNA and programming control software for Atmel AVR microcontroller.

Spin torque oscillator (STO) technology has a unique blend of features, including but not limited to octave tunability, GHz operating frequency, and nanoscaled size, which makes it highly suitable for microwave and radar applications. This thesis studies the fundamentals of STOs, utilizes the state-of-art STO's advantages, and proposes two STO-based microwave systems targeting its microwave applications and measurement setup, respectively. First, based on an investigation of possible STO applications, the magnetic tunnel junction (MTJ) STO shows a great suitability for microwave oscillator in multi-standard multi-band radios. Yet, it also imposes a large challenge due to its low output power, which limits it from being used as a microwave oscillator. In this regard, different power enhancement approaches are investigated to achieve an MTJ STO-based microwave oscillator. The only possible approach is to use a dedicated CMOS wideband amplifier to boost the output power of the MTJ STO. The dedicated wideband amplifier, containing a novel Balun-LNA, an amplification stage and an output buffer, is proposed, analyzed, implemented, measured and used to achieve the MTJ STO-based microwave oscillator. The proposed amplifier core consumes 25.44 mW from a 1.2 V power supply and occupies an area of 0.16 mm2 in a 65 nm CMOS process. The measurement results show a S21 of 35 dB, maximum NF of 5 dB, bandwidth of 2 GHz - 7 GHz. This performance, as well as the measurement results of the proposed MTJ STO-based microwave oscillator, show that this microwave oscillator has a highly-tunable range and is able to drive a PLL. The second aspect of this thesis, firstly identifies the major difficulties in measuring the giant magnetoresistance (GMR) STO, and hence studying its dynamic properties. Thereafter, the system architecture of a reliable GMR STO measurement setup, which integrates the GMR STO with a dedicated CMOS high frequency IC to overcome these difficulties in precise characterization of GMR STOs, is proposed. An analysis of integration methods is given and the integration method based on wire bonding is evaluated and employed, as a first integration attempt of STO and CMOS technologies. Moreover, a dedicated high frequency CMOS IC, which is composed of a dedicated on-chip bias-tee, ESD diodes, input and output networks, and an amplification stage for amplifying the weak signal generated by the GMR STO, is proposed, analyzed, developed, implemented and measured. The proposed dedicated high frequency circuits for GMR STO consumes 14.3 mW from a 1.2 V power supply and takes a total area of 0.329 mm2 in a 65 nm CMOS process. The proposed on-chip bias-tee presents a maximum measured S12 of -20 dB and a current handling of about 25 mA. Additionally, the proposed dedicated IC gives a measured gain of 13 dB with a bandwidth of 12.5 GHz - 14.5 GHz. The first attempt to measure the (GMR STO+IC) pair presents no RF signal at the output. The possible cause and other identified issues are given. / <p>QC 20140114</p>

No description available.

Les systèmes radio impulsionnelle Ultra large bande (IR-ULB), de part la nature de leurs signaux et de leurs architectures, montrent des caractéristiques intéressantes pour concurrencer les technologies existantes (Zigbee, Bluetooth et RFID) pour certaines applications nécessitant un faible coût et une faible consommation de puissance. Dans ce contexte cette thèse évalue les potentialités des systèmes IR-ULB pour la réalisation d’objets communicants miniatures.En utilisant une technologie "System In Package" (SiP), des objets communicants ULB prototype intégrant une ou plusieurs puces CMOS et une antenne ULB directement réalisée sur le boîtier sont présentés dans la thèse. Les transitions entre le circuit imprimé et les puces sont réalisées avec des fils d'interconnexion ("wirebonding"). Les points d'étude de la thèse se focalisent particulièrement sur la mise en boîtier d'une puce ULB et sur la conception sur silicium de la tête radio fréquence d'un système ULB. La réalisation d'une interconnexion faible cout par "wirebonding" entre un circuit intégré ULB et son support est problématique aux fréquences utilisées en ULB (3-10 GHz) en raison des éléments parasites importants limitant sa bande passante. Pour obtenir une transition ne dégradant pas les signaux ULB, plusieurs méthodologies d’interfaçage sont proposées permettant de réaliser sans augmentation notable de cout une transition large bande entre le circuit intégré et le circuit imprimé du boîtier. L'intégration en technologie CMOS standard des éléments principaux constituant la tête radio fréquence d'un système ULB impulsionnel (LNA, détecteur d'impulsions et générateurs d'impulsions) est étudiée. L'intérêt d'un co-design entre le silicium et le circuit imprimé lors de la conception de ces éléments est mis en avant. L'intégration ainsi que la miniaturisation du système final dans une technologie SIP sont également présentées. / Due to the nature of their signals and their architectures, Impulse Radio Ultra Wide Band (IR-UWB) systems show interesting features to compete with existing technologies (Zigbee, Bluetooth and RFID UHF) for low cost and low power applications. In this context, this thesis evaluates the potential of UWB systems for the realization of miniature communication devices.The thesis presents UWB communicating devices realized with a System in Package (SiP) technology. Devices incorporate one or several CMOS chips and an antenna directly printed on the board (PCB). Transitions between the PCB and the chips are made with standard wire bonds. The thesis especially focuses on packaging of UWB dice and on the design of UWB front end radio frequency.Due to important parasitic elements limiting its bandwidth, wire bonds transition is problematic for UWB applications (3-10 GHz). This thesis proposes several methodologies to interface integrated circuit and PCB to obtain a broadband transition without increasing cost production. The integration in standard CMOS technology of main components comprising the UWB radio frequency front end (LNA, pulse detector and pulse generator) is studied. The interest of a co-design between silicon and PCB to design these elements is pointed up. Integration and miniaturization of the final system in a SIP technology are also presented.

En esta Tesis se ha realizado análisis, diseño y caracterización de los amplificadores de bajoruido y banda ancha en tecnología de GaAs PHEMT con aplicación a los módulos posteriores delradiómetro del instrumento de baja frecuencia del satélite Planck. La Tesis se compone de las siguientes partes:- Introducción y estudio del funcionamiento del radiómetro del instrumento de baja frecuencia de Planck.- Diseño y caracterización de amplificadores de bajo ruido utilizando tecnología de GaAs. Se presentan diseños MMIC en la banda Ka y en la banda Q, y un diseño MIC en la banda Q.- Diseño y construcción de los módulos posteriores en las bandas de 30 y 44 GHz. Se presentan varios prototipos fabricados en ambas bandas, así como medidas de cada uno de los subsistemas que los forman.- Desarrollo de técnicas de medida para receptores de banda ancha con detección directa y su aplicación a la caracterización de los módulos posteriores, mostrando el funcionamiento de los prototipos representativos para las dos bandas de frecuencia.- Integración de los módulos posteriores con los módulos frontales y presentación de algunos de los resultados de medida de los radiómetros completos. / This Thesis deals with the analysis, design and characterization of broadband low noise amplifiersin GaAs PHEMT technology with application to the radiometer Back-End Modules for the Planck Low Frequency Instrument (LFI). The Thesis is composed of the next parts:- Introduction and study about the radiometer of the Planck low frequency instrument.- Design and characterization of low noise amplifiers using GaAs technology. Ka-band MMIC designs and Q-band MMIC and a MIC design are presented.- Design and assembly of the 30 and 44 GHz back-end modules. Several prototypes have been manufactured in both frequency bands and the most representative test results of each subsystem are presented.- Development of measurement techniques for broadband direct detection receivers and their application to the characterization of the back-end modules. Performance of representative prototypes in both frequency bands is included.- Integration of the back end modules and front end modules and significant results of the tests for a radiometer in each frequency band.

Ce travail de thèse porte sur la conception de dispositifs filtrants accordables, c'est-à-dire pouvant commuter leurs caractéristiques d'un standard à un autre afin de réduire l’encombrement des chaines émission/réception d’un dispositif multistandard. Les filtres les plus utilisés actuellement sont des filtres acoustiques. En effet, ces filtres sont difficilement intégrables dans une technologie silicium et ils restent parmi les dispositifs passifs les plus encombrants du front-end RF. De plus, ils ne permettent pas d’avoir de bonnes performances en pertes d’insertion, en sélectivité et en accordabilité fréquentielle. De ce fait, des solutions alternatives sont à l’origine de ces travaux de thèse. Nous avons considéré tout d’abord un filtre actif qui a la possibilité de régler sa fréquence de résonnance, d’une part à la fréquence de résonnance du système Wifi et d’autre part, à la fréquence de résonnance du système Zigbee. Ensuite, une autre solution a été proposée dans le dernier chapitre qui consiste à réaliser une structure active filtrante bi-bande intégrée. Cette solution a pour avantage de récolter simultanément les données des systèmes opérant dans les deux bandes de fréquences visés. Les résultats obtenus des circuits réalisés sont validés par des simulations et de mesures. / This thesis concerns the design of tunable filter devices that can switch theirs characteristics from one standard to another in order to reduce the congestion of emission/reception chain of multi-standard systems. The most commonly used filters are acoustic filters. Indeed, these filters are difficult to be integrated in silicon technology and they remain one of the most bulky passive devices of the RF front-end. In addition, they don’t achieve good performance in insertion loss, frequency selectivity and tunability. Therefore, alternative solutions are at the origin of this thesis. An active filter is considered with the possibility of adjusting the resonance frequency: the resonant frequency of the Wifi system and the resonance frequency of the Zigbee system. Moreover, another solution is proposed in the last chapter, which consists to achieve a dual band structure of integrated active filter. This solution has the advantage to simultaneously collect data provided from the operating systems located in the two specified frequencies bands. Simulations and measurements validate the results of the realized circuits.

Silicon-on-Insulator (SOI) CMOS technology constitutes a good candidate for mixed signal RF CMOS applications. Due to its low junction capacitance and reduced leakage current, SOI provides reduced static and dynamic power consumption of the digital logic combined with increased cut-off frequencies. Moreover, in terms of passive device integration the major benefit of SOI when compared to the conventional bulk is the possibility to use a high resistivity substrate which allows a drastic reduction of substrate losses allowing a high quality factor of the passive devices. Another issue is the harsh environment applications. Electronics capable of operating at high temperatures are required in several industrial applications, including the automobile industry, the aerospace industry, the electrical and nuclear power industries, and the well-logging industry. The capability of SOI circuits to expand the operating temperature range of integrated circuits up to 300°C has been demonstrated. SOI devices and circuits present advantages in this field over bulk counterparts such as the absence of thermally-activated latch up and reduced leakage current. In this context, various topologies of integrated transmission lines and spiral inductors implemented on standard and high substrate resistivities have been analyzed over a large temperature range. The temperature behavior of the SOI transistors is presented. The main figures-of-merit of the SOI MOSFETs are analyzed and the extraction of the extrinsic and intrinsic parameters of the small signal equivalent circuit is performed. Also, an example of RF circuit applications of the SOI technology, based on a fully integrated Low-Noise Amplifier for low-power and narrow-band applications, is investigated and characterized at high temperature. The main figures-of-merit of the designed circuit are extracted and discussed. The good results show that the SOI technology is now emerging as a good candidate for the realization of analog integrated circuits for low-power and high-temperature applications.