I och med utvecklingen av de breda skidorna har antalet offpiståkare ökat.För många är pudersnö den största frihetskänslan.Men de lätta flingorna bildar en enorm naturkraft som i värsta fall kan innebära döden.Och 17 år gammal snö styr fortfarande livet för en 56-årig kvinna i Varberg. Konsten att bedöma laviner är svår.Och eftersom fjällräddningen tar lång tid är det kamraträddning som gäller när olyckan är framme. Sverige har i år fått sina första träningsanläggningar för sökning med lavinsändare,transceivers.För träning är enda sättet att vara förberedd när naturen sagt sitt.

Abstract This thesis studies the level of performance achievable using today's standard IC processes in the integrated RF subcircuits of the modern GSM base station. The thesis concentrates on those circuit functions, i.e. I/Q modulators, variable gain amplifiers and frequency synthesizers, most relevant for integration in the base station environment as pinpointed by studying the receiver/transmitter architectures available today. Several RF integrated circuits have been designed, fabricated and their level of performance measured. All main circuits were fabricated in a standard double-metal double-poly 1.2 and 0.8 μm BiCMOS process. Key circuit structures and their measured properties are: 90° phase shifter with ±1° phase error with VCC = 4.5…5.5 V and T = -10…+85 °C, I/Q modulator suitable for operation at output frequencies from 100 MHz to 1 GHz and baseband frequencies from 60 to 500 kHz (2.0 mm × 2.0 mm, 100 mA, 5.0 V) with LO suppression of 38 dBc and image rejection of 41 dBc, temperature compensated DC to 1.5 GHz variable gain amplifier (1.15 mm × 2.00 mm, 100 mA, 5.0 V) with a linear 50 dB gain adjustment range, maximum gain of 18.5 dB and gain variation of 1 dB up to 700 MHz over the whole operating conditions range of VCC = 4.5…5.5 V and T = -10…+85 °C, a complete bipolar semicustom synthesizer (90…122 mA, 5.0 V) and two complete full-custom BiCMOS synthesizer chips including all building blocks of a PLL-based synthesizer except for the voltage controlled oscillator and the loop filter. The synthesizers include circuit structures such as ∼2 GHz multi-modulus divider and low-noise programmable phase detector/charge pump (18.7 pA/√Hz at Iout = 500 μA) and have an exemplar phase noise performance of -110 dBc/Hz at 200 kHz offset. One of the main problems of the integer-N PLL based synthesizer when used in a multichannel telecommunications system is the level of spurious signals at the output, when the synthesizer is optimised for fast frequency switching. Therefore, a method using only two current pulses to make the frequency step response of the loop faster, thus allowing a narrower loop bandwidth to be used for additional spur suppression, is proposed. The operation of the proposed speed-up method is analysed mathematically and verified by measurements of an existing RF-IC synthesizer operating at 800 MHz. Measurements show that simple current pulses can be used to speed up the channel switching of a practical RF synthesizer having a frequency step time in the tens of μs range. In the example, a 7.65 MHz frequency step was made seven times faster using the proposed method.

Cal Poly’s PolySat CubeSat satellites have begun to conduct more complex and scientifically significant experiments. The large data products generated by these missions demonstrate the necessity for higher data rate communication than currently provided by the PolySat UHF radio. This thesis leverages the proliferation of consumer wireless monolithic transceivers to develop a 250kbps to 2000kbps, 2W CubeSat radio operating within the 2.45GHz Industrial, Scientific, and Medical (ISM) radio band. Estimating a link budget for a realistic CubeSat leads to the conclusion that this system will require a large deployable CubeSat antenna, large earth station satellite dish, and a fine-pointing attitude control system. Noise floor measurements of a CubeSat ground station demonstrate that terrestrial ISM interference can be minimized to below the thermal noise floor by carefully choosing the operating frequency. The radio is specifically designed as a daughter board for the PolySat System Board with a direct interface to the embedded Linux microprocessor. A state-of-the-art ZigBee transceiver evaluation board is measured to confirm its suitability for a CubeSat radio. A schematic is developed, which integrates the transceiver, power amplifier, low noise amplifier, amplifier protection circuitry, switching regulators, and RF power measurement into a single printed circuit board assembly (PCBA). The circuitry is then squeezed into a high-density, 1.4” x 3.3” layout. The PCBA is then manufactured, troubleshot, tuned, and characterized.

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A wireless local area network (LAN) system is proposed to provide mobility for existing data communication services. This thesis presents a physical layer design for a direct sequence spread spectrum ISM band radio LAN system. This radio system employs spread spectrum communication technology and a differential binary phase shift keying/quadrature phase shift keying (BPSK/QPSK) non-coherent receiver to overcome the adverse indoor wireless environment. Moreover, a variable data rate transmission technique is used to dynamically configure the spread spectrum system according to channel performance. This physical layer incorporates the Zilog Z2000 Evaluation Board performing direct sequence spread spectrum processing, a Grayson 900 MHz radio receiver and a transmitter module which was designed and built at Virginia Tech. The transmitted spectrum occupies a 4 MHz bandwidth in the 900 MHz ISM band and this system supports a data rate of up to 363 Kbits/sec. The spread spectrum system design along with detailed descriptions of hardware and control software development are presented. / Master of Science

Our society increasingly relies on the transmission and reception of vast amounts of data using serial connections featuring ever-increasing bit rates. In imaging systems, for example, the frame rate achievable is often limited by the serial link between camera and host even when modern serial buses with the highest bit rates are used. This thesis documents a scalable embedded transceiver system with a bandwidth and interface standard that can be adapted to suit a particular application. This new approach for a real-time scalable embedded transceiver system is referred to as a Novel Reference Model (NRM), which connects two or more applications through a transceiver network in order to provide real-time data to a host system. Different transceiver interfaces for which the NRM model has been tested include: LVDS, GIGE, PMA-direct, Rapid-IO and XAUI, one support a specific range for transceiver speed that suites a special type for transceiver physical medium. The scalable serial link approach has been extended with loss-less data compression with the aim of further increasing dataflow at a given bit rate. Two lossless compression methods were implemented, based on Huffman coding and a novel method called Reduced Lossless Compression Method (RLCM). Both methods are integrated into the scalable transceivers providing a comprehensive solution for optimal data transmission over a variety of different interfaces. The NRM is implemented on a field programmable gate array (FPGA) using a system architecture that consists of three layers: application, transport and physical. A Terasic DE4 board was used as the main platform for implementing and testing the embedded system, while Quartus-II software and tools were used to design and debug the embedded hardware systems.

ITC/USA 2005 Conference Proceedings / The Forty-First Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2005 / Riviera Hotel & Convention Center, Las Vegas, Nevada / This paper describes the Flexible Telemetry Transceiver (FNT)-a modular, scalable, standards-based, software configurable, microwave wireless telemetry network transceiver. The FNT enables flexible, high-rate, long-range, duplex, network services across multipoint to multipoint wireless channel.

La Radio Logicielle (SDR : Software Defined Radio) et la Radio Cognitive (CR : Cognitive Radio) deviennent d'un usage courant car elles répondent à plusieurs enjeux technico-économiques majeurs dans le domaine des télécommunications. Ces systèmes radio permettent de combler l'écart de développement technologique qui existe entre la partie matérielle et la partie logicielle des systèmes de communication, en permettant la gestion optimale des bandes de fréquences sous-utilisées par la commutation en temps réel d'une configuration radio à une autre. Dans ce cadre, cette thèse présente la mise en œuvre d'une chaîne de traitements Radio Logicielle (appelée SDR waveform) dans un Système Multiprocesseurs sur Puce (MPSoC) à usage général (implémenté dans un FPGA de type Xilinx Virtex-4). Cette plateforme est basée autour d'un Réseau sur Puce (NoC) interconnectant 16 processeurs élémentaires (appelés PE) disposant de quatre blocs-mémoires externes DDR2. Nous avons proposé des implémentations temps réel et embarquées sur MPSoC de différentes briques de traitements d'une chaîne SDR, en concevant une stratégie efficace de parallélisation et de synchronisation pour chaque composante élémentaire de la « waveform ». Nous avons amélioré la fonctionnalité de la chaîne de traitement Radio Logicielle, en intégrant un Transceiver reconfigurable basé sur différents modèles de Réseaux de Neurones Artificiels (RNA) : les Cartes Auto-Organisatrices (SOM), les Réseaux de Neurones Compétitifs (LVQ) et enfin les Réseaux Multi-Couches de Perceptrons (MLP). Ces trois RNA permettent la reconnaissance de la norme spécifique basée sur les paramètres d'entrée extraits du signal et la reconfiguration du Transceiver de CR. La solution adaptative que nous avons proposée commute vers le RNA le plus approprié en fonction des caractéristiques du signal d'entrée détecté. Il est important de pouvoir prendre en compte des signaux complexes et multi-porteuses. Dans ce cadre, nous avons adressé le cas d'un signal complexe composé de plusieurs porteuses, ainsi en divisant les PEs en différents groupes indépendants, nous affectons chaque groupe de PEs au traitement d'une nouvelle porteuse. Nous avons conçu une stratégie efficace de synchronisation et de parallélisation de ces trois RNA pour CR Transceiver. Nous l'avons appliquée, par la suite pour l'implantation de nos algorithmes sur le MPSoC déjà cité. L'accélération que nous obtenons pour la SDR waveform et pour les algorithmes de Transceiver de CR démontre que les MPSoC à usage général sont une réponse pertinente, entre autres, aux contraintes de performances sur une telle plateforme. Le système que nous proposons apporte une réponse aux défis technico-économiques des grandes entreprises qui investissent ou prévoient d'investir dans des équipements basés sur des SDR ou des CR, puisqu'il permet d'éviter de recourir à des équipements d'accélération coûteux. Nous avons, par la suite, ajouté d'autres fonctionnalités à notre waveform avec un « CR Transceiver multinormes », en proposant une nouvelle approche pour la gestion du spectre radio. Ceci étant l'aspect le plus important de CR. Nous rendons ainsi notre waveform spectralement efficace en modélisant les caractéristiques radiofréquences (RF) du signal utilisateur primaire sous la forme d'une série temporelle multi-variée. Cette série temporelle est ensuite fournie comme entrée dans un Réseau de Neurones Récurrent d'Elman (ERNN) qui prédit l'évolution de la série temporelle de RF pour déterminer si l'utilisateur secondaire peut exploiter la bande de fréquences. Nous avons exploité la cyclo-stationnarité inhérente des signaux primaires pour la Modélisation Non-Linéaire Autorégressive Exogène (NARX : Non-linear AutoRegressive Exogenous) des séries temporelles des caractéristiques RF, car la prédiction d'une caractéristique RF demande d'abord de connaître les autres caractéristiques radios pertinentes. Nous avons observé une tendance similaire pour les valeurs prédites et observées. En résumé, nous avons proposé des algorithmes pour SDR waveform à efficacité spectrale avec un Transceiver Universel, ainsi que leurs implantations parallèles sur MPSoC. Notre conception de waveform répond aux exigences en performances et aux contraintes de ressources embarquées des applications dans le domaine / Software Defined Radio (SDR) and Cognitive Radio (CR) are entering mainstream. These high performance and high adaptability requiring devices with agile frequency operations hold promise to :1. address the inconsistency between hardware and software advancements, 2. real time mode switching from one radio configuration to another and3. efficient spectrum management in under-utilized spectrum bands. Framed within this statement, in this thesis we have implemented a SDR waveform on 16 Processing Element (PE) Network on chip (NoC) based general purpose Multiprocessors System on chip (MPSoC), with access to four external DDR2 memory banks, which is implemented on a single chip Xilinx Virtex-4 FPGA. We shifted short term development of a waveform into software domain by designing an efficient parallelization and synchronization strategy for each waveform component, individually. We enhance our designed waveform functionality by proposing and implementing three Artificial Neural Networks Schemes : Self Organizing Maps, Linear Vector Quantization and Multi-Layer Perceptrons as effective techniques for reconfiguring CR Transceiver after recognizing the specific standard based on input parameters, pertaining to different layers, extracted from the signal. Our proposed adaptive solution switches to appropriate Artificial Neural Network, based on the features of input signal sensed. We designed an efficient synchronization and parallelization strategy to implement the Artificial Neural Networks based CR Transceiver Algorithms on the aforementioned MPSoC chip. The speed up we obtained for our SDR waveform and CR Transceiver algorithms demonstrated that the general purpose MPSoC devices are the most efficient answer to the acquisition challenge for major organizations that invest or plan to invest in SDR and CR based devices, thereby allowing us to avoid expensive hardware accelerators. We address the case of a complex signal composed of many modulated carriers by dividing the PEs in individual groups, thus received signal with more than one Standard is processed efficiently. We add further functionality in our designed Multi-standard CR Transceiver possessing SDR Waveform by proposing a new approach for radio spectrum management, perhaps the most important aspect of CR. We make our designed waveform Spectrum efficient by modelling the primary user signal Radio Frequency features as a multivariate time series, which is then given as input to Elman Recurrent Neural Network that predicts the evolution of Radio Frequency Time Series to decide if the secondary user can exploit the Spectrum band. We exploit the inherent cyclostationary in primary signals for Non-linear Autoregressive Exogenous Time Series Modeling of Radio Frequency features, as predicting one RF feature needs the previous knowledge of other relevant RF features. We observe a similar trend between predicted and actual values. Ensemble, our designed Spectrum Efficient SDR waveform with a Universal Multi-standard Transceiver answers the SDR and CR performance requirements under resource constraints by efficient algorithm design and implementation using lateral thinking that seeks a greater cross-domain interaction

Ce travail de thèse entre dans le cadre de projets nationaux et internationaux de radioastronomie d'une manière générale et en particulier dans celui de SKA (Square Kilometre Array). La conception de circuits intégrés d’applications spécifiques devient de plus en plus importante dans ce domaine. La première étape de ce travail consiste à une étude bibliographique sur les inductances actives intégrées et leurs principales applications dédiées à la radioastronomie. Cette étude a permis de faire un état de l'art. Cet état de l'art a fait ressortir que l'intégration de certaines fonctions s'avère particulièrement difficile voire impossible dès lors que l'utilisation d'une inductance est nécessaire. Ceci est essentiellement dû à la taille importante des inductances. Parmi ces fonctions, nous avons le filtrage, certains types de transceivers, le temps de retard, etc. Or ces fonctions sont très importantes dans une architecture de radiofréquence propre aux réseaux d'antennes phasées. Ce travail de thèse est donc consacré à l'étude et la conception de ces différentes fonctions à l'aide des inductances actives basées sur des topologies à gyrateurs en technologie SiGeC 0,25 μm afin de palier aux problèmes d'intégration. Une des finalités de cette thèse est aussi de montrer que la consommation de ce procédé d'intégration n’est pas si excessive pour ces applications, par rapport à l’utilisation d’inductances localisées intégrées occupant une surface importante sur le substrat. Ce dernier point sera un résultat très important pour les projets où la très haute intégration à bas coût est nécessaire, point clé de réussite des réseaux phasés denses du projet international SKA. / This thesis work is part of national and international projects of radio-astronomy in general and in particular that of the SKA (Square Kilometre Array). The design of integrated circuits for specific applications is becoming increasingly important in this field. The first step in this work is a bibliography study on integrated active reactors and their main applications dedicated to radio astronomy. This study allowed making a state of the art. This state of the art has highlighted that the integration of some functions is made especially difficult by the need to use an inductor. This is mainly due to the large size of passive inductors. These functions include the filtering function, some transceivers types, the time delay, etc. But, they are very important in radio-frequency architecture owing to phased array antennas. This thesis propose the study and design of these different functions using active inductors based on gyrators topologies in SiGeC 0.25 μm technology in order to overcome the integration problems. One of the aims of this thesis is to show that the consumption of this integration process is not so excessive for these applications, compared to the use of integrated located inductors occupying a large area on the substrate. This last point is a very important result for projects where high integration at low cost is necessary, key point of the success of dense phased array in the SKA international project.