L'accroissement de la densité d'intégration des circuits intégrés exige des moyens de contrôle d'une extrème précision. La microscopie électronique à balayage en contraste de potentiel convient particulièrement. La thèse présente tous les aspects: organisation, observabilité, méthodes d'observation, modes de traitement et les applications à la mise au point de circuits prototypes, l'analyse des défaillances, le contrôle de qualité, la recherche des limites de fonctionnement, la restructuration. Discussion de la nécessité du développement de méthodologies d'utilisation

Spectroscopic ellipsometry is emerging as a routine tool for in-situ and ex-situ thin-film characterization in semiconductor manufacturing. For interconnects in ULSI circuits, diffusion barriers of below 10&nbsp;nm thickness are required and precise thickness control of the deposited layers is indispensable. In this work, we studied single films of tantalum and two stoichiometries of tantalum nitride as well as TaN/Ta film stacks both on bare and oxidized silicon. Spectroscopic ellipsometry from the UV to the NIR was applied to determine the optical properties of the films for subsequent modeling by a Lorentz-Drude approach. These models were successfully applied to TaN/Ta thin-film stacks where the values of the film thickness could be determined exactly. Moreover, it is shown that considerable differences in the optical properties arise from both film thickness and substrate. <br> <br> ©2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. <br>

In this work, an approach for copper atomic layer deposition (ALD) via reduction of CuxO films was investigated regarding applications in ULSI interconnects, like Cu seed layers directly grown on diffusion barriers (e. g. TaN) or possible liner materials (e. g. Ru or Ni) as well as non-ferromagnetic spacer layers between ferromagnetic films in GMR sensor elements, like Ni or Co. The thermal CuxO ALD process is based on the Cu (I) β-diketonate precursor [(nBu3P)2Cu(acac)] and a mixture of water vapor and oxygen ("wet O2") as co-reactant at temperatures between 100 and 130 °C. Highly efficient conversions of the CuxO to metallic Cu films are realized by a vapor phase treatment with formic acid (HCOOH), especially on Ru substrates. Electrochemical deposition (ECD) experiments on Cu ALD seed / Ru liner stacks in typical interconnect patterns are showing nearly perfectly filling behavior. For improving the HCOOH reduction on arbitrary substrates, a catalytic amount of Ru was successful introduced into the CuxO films during the ALD with a precursor mixture of the Cu (I) β-diketonate and an organometallic Ru precursor. Furthermore, molecular and atomic hydrogen were studied as promising alternative reducing agents.

In this work, an approach for copper atomic layer deposition (ALD) via reduction of CuxO films was investigated regarding applications in ULSI interconnects, like Cu seed layers directly grown on diffusion barriers (e. g. TaN) or possible liner materials (e. g. Ru or Ni) as well as non-ferromagnetic spacer layers between ferromagnetic films in GMR sensor elements, like Ni or Co. The thermal CuxO ALD process is based on the Cu (I) β-diketonate precursor [(nBu3P)2Cu(acac)] and a mixture of water vapor and oxygen ("wet O2") as co-reactant at temperatures between 100 and 130 °C. Highly efficient conversions of the CuxO to metallic Cu films are realized by a vapor phase treatment with formic acid (HCOOH), especially on Ru substrates. Electrochemical deposition (ECD) experiments on Cu ALD seed / Ru liner stacks in typical interconnect patterns are showing nearly perfectly filling behavior. For improving the HCOOH reduction on arbitrary substrates, a catalytic amount of Ru was successful introduced into the CuxO films during the ALD with a precursor mixture of the Cu (I) β-diketonate and an organometallic Ru precursor. Furthermore, molecular and atomic hydrogen were studied as promising alternative reducing agents.

Since there is a continuous shrinking of feature sizes in ultra-large scale integrated (ULSI) circuits, requirements on materials and technology are going to rise dramatically in the near future. In particular, at the interconnect system this calls for new concepts and materials. Therefore, carbon nanotubes (CNTs) are considered as a promising material to replace partly or entirely metal interconnects in such devices. The present thesis aims to make a contribution to the CNT growth control with the thermal chemical vapor deposition (CVD) method and the integration of CNTs as vertical interconnects (vias) in ULSI circuits. Different support/catalyst systems are examined in processes for catalyst pretreatment and CNT growth. The investigations focus on the catalyst formation and the interactions at the interfaces. Those effects are related to the CNT growth. To get an insight into interactions at interfaces, film structure, composition, and CNT growth characteristics, samples are extensively characterized by techniques like AFM, SEM, TEM, XRD, XPS, and Raman spectroscopy. Screening studies on nanoparticle formation and CNT growth with the well known system SiO2/Ni are presented. This system is characterized by a weak support/catalyst interaction, which leads to undirected growth of multi-walled CNTs (MWCNTs). By contrast, at the Ta/Ni system a strong interaction causes a wetting of catalyst nanoparticles and vertically aligned MWCNT growth. At the system W/Ni a strong interaction at the interface is found as well, but there it induces Stranski-Krastanov catalyst film reformation upon pretreatment and complete CNT growth inhibition. Studies on the SiO2/Cr/Ni system reveal that Cr and Ni act as a bi-catalyst system, which leads to a novel nanostructure defined as interlayer CNT (ICNT) structure. The ICNT films are characterized by well crystallized vertically aligned MWCNTs, which grow out a Cr/Ni layer lifted off as a continuous and very smooth layer from the substrate with the growth. Besides, this nanostructure offers new possibilities for the integration of CNTs in different electronic applications. Based on the presented possibilities of manipulating CNT growth, an integration technology was derived to fabricate CNT vias. The technology uses a surface mediated site-selective CVD for the growth of MWCNTs in via structures. Developments are demonstrated with the fabrication of via test vehicles and the site-selective growth of MWCNTs in vias on 4 inch wafers. Furthermore, the known resistance problem of CNT vias, caused by too low CNT density, is addressed by a new approach. A CNT/metal heterostructure is considered, where the metal is implemented through atomic layer deposition (ALD). The first results of the coating of CNTs with readily reducible copper oxide nanoparticles are presented and discussed. / Aufgrund der kontinuierlichen Verkleinerung von Strukturen in extrem hoch integrierten (engl. Ultra-Large Scale Integration − ULSI) Schaltkreisen werden die Anforderungen an die Materialien und die Technologie in naher Zukunft dramatisch ansteigen. Besonders im Leitbahnsystem sind neue Materialien und Konzepte gefragt. Kohlenstoffnanoröhren (engl. Carbon Nanotubes − CNT) stellen hierbei ein vielversprechendes Material dar, um teilweise oder sogar vollständig metallische Leitbahnen zu ersetzen. Die vorliegende Arbeit liefert einen Beitrag zur CNT-Wachstumskontrolle mit der thermischen Gasphasenabscheidung (engl. Chemical Vapor Deposition − CVD) sowie der Integration von CNTs als vertikale Leitungsverbindungen (Via) in ULSI-Schaltkreisen. Verschiedene Untergrund/Katalysator-Systeme werden in Prozessen zur Katalysatorvorbehandlung sowie zum CNT-Wachstum betrachtet. Die Untersuchungen richten sich insbesondere auf die Katalysatorformierung und die Wechselwirkungen an den Grenzflächen. Diese werden mit dem CNT-Wachstum in Verbindung gebracht. Für Untersuchungen von Grenzflächeninteraktionen, Schichtstruktur, Zusammensetzung sowie CNT-Wachstumscharakteristik werden Analysen mit AFM, REM, TEM, XRD, XPS und Raman-Spektroskopie genutzt. Zunächst werden Voruntersuchungen an dem gut bekannten System SiO2/Ni zur Nanopartikelformierung und CNTWachstum vorgestellt. Dieses System ist gekennzeichnet durch eine schwache Wechselwirkung zwischen Untergrund und Katalysator sowie ungerichtetem Wachstum von mehrwandigen CNTs (MWCNTs). Im Gegensatz dazu hat bei dem System Ta/Ni eine starke Interaktion an der Grenzfläche eine Katalysatornanopartikelbenetzung und vertikales MWCNT-Wachstum zur Folge. Für das W/Ni-System gelten ebenfalls starke Interaktionen an der Grenzfläche. Bei diesem System wird allerdings eine Stranski-Krastanov-Schichtformierung des Katalysators und eine vollständige Unterbindung von CNT-Wachstum erreicht. Bei dem System SiO2/Cr/Ni agieren Cr und Ni als Bi- Katalysatorsystem. Dies führt zu einer neuartigen Nanostruktur, die als Zwischenschicht-CNT (engl. Interlayer Carbon Nanotubes − ICNTs) Struktur definiert wird. Die Schichten sind durch eine gute Qualität von gerichteten MWCNTs charakterisiert, die aus einer geschlossenen, sehr glatten und von den CNTs getragenen Cr/Ni-Schicht herauswachsen. Darüber hinaus bietet die Struktur neue Möglichkeiten für die Integration von CNTs in verschiedene elektronische Anwendungen. Auf der Grundlage der vorgestellten Manipulationsmöglichkeiten von CNT-Wachstum wurde eine Integrationstechnologie für CNTs in Vias abgeleitet. Der Ansatz ist eine oberflächeninduzierte selektive CVD von vertikal gerichteten MWCNTs in Via-Strukturen. Diese Technologie wird mit der Herstellung von einem Via-Testvehikel und dem selektiven CNT-Wachstum in Vias auf 4 Zoll Wafern demonstriert. Um das Widerstandsproblem von CNT-Vias, verursacht durch eine zu niedrige CNT-Dichte, zu reduzieren, wird eine Technologieerweiterung vorgeschlagen. Der Ansatz geht von einer CNT/Metall-Heterostruktur aus, bei der das Metall mit Hilfe der Atomlagenabscheidung (engl. Atomic Layer Deposition − ALD) implementiert wird. Es werden erste Ergebnisse zur CNT-Beschichtung mit reduzierbaren Kupferoxidnanopartikeln vorgestellt und diskutiert.

A new high-k dielectric material, i.e., zirconium-doped tantalum oxide (Zr-doped TaOx), in the form of a sputter-deposited thin film with a thickness range of 5-100 nm, has been studied. Important applications of this new dielectric material include the gate dielectric layer for the next generation metal-oxide-semiconductor field effect transistor (MOSFET). Due to the aggressive device scaling in ultra-large-scale integrated circuitry (ULSI), the ultra-thin conventional gate oxide (SiO2) is unacceptable for many practical reasons. By replacing the SiO2 layer with a high dielectric constant material (high-k), many of the problems can be solved. In this study, a novel high-k dielectric thin film, i.e., TaOx doped with Zr, was deposited and studied. The film’s electrical, chemical, and structural properties were investigated experimentally. The Zr dopant concentration and the thermal treatment condition were studied with respect to gas composition, pressure, temperature, and annealing time. Interface layer formation and properties were studied with or without an inserted thin tantalum nitride (TaNx) layer. The gate electrode material influence on the dielectric properties was also investigated. Four types of gate materials, i.e., aluminum (Al), molybdenum (Mo), molybdenum nitride (MoN), and tungsten nitride (WN), were used in this study. The films were analyzed with ESCA, XRD, SIMS, and TEM. Films were made into MOS capacitors and characterized using I-V and C-V curves. Many promising results were obtained using this kind of high-k film. It is potentially applicable to future MOS devices.

The following is the accepted manuscript of the original article: Marcel Melzer, Thomas Waechtler, Steve Müller, Holger Fiedler, Sascha Hermann, Raul D. Rodriguez, Alexander Villabona, Andrea Sendzik, Robert Mothes, Stefan E. Schulz, Dietrich R.T. Zahn, Michael Hietschold, Heinrich Lang and Thomas Gessner “Copper oxide atomic layer deposition on thermally pretreated multi-walled carbon nanotubes for interconnect applications”, Microelectron. Eng. 107, 223-228 (2013). Digital Object Identifier: 10.1016/j.mee.2012.10.026 Available via http://www.sciencedirect.com or http://dx.doi.org/10.1016/j.mee.2012.10.026 © 2013 Elsevier B.V. Carbon nanotubes (CNTs) are a highly promising material for future interconnects. It is expected that a decoration of the CNTs with Cu particles or also the filling of the interspaces between the CNTs with Cu can enhance the performance of CNT-based interconnects. The current work is therefore considered with thermal atomic layer deposition (ALD) of CuxO from the liquid Cu(I) β-diketonate precursor [(nBu3P)2Cu(acac)] and wet oxygen at 135°C. This paper focuses on different thermal in-situ pre-treatments of the CNTs with O2, H2O and wet O2 at temperatures up to 300°C prior to the ALD process. Analyses by transmission electron microscopy show that in most cases the CuxO forms particles on the multi-walled CNTs (MWCNTs). This behavior can be explained by the low affinity of Cu to form carbides. Nevertheless, also the formation of areas with rather layer-like growth was observed in case of an oxidation with wet O2 at 300°C. This growth mode indicates the partial destruction of the MWCNT surface. However, the damages introduced into the MWCNTs during the pre treatment are too low to be detected by Raman spectroscopy.

A new high-k dielectric material, i.e., zirconium-doped tantalum oxide (Zr-doped TaOx), in the form of a sputter-deposited thin film with a thickness range of 5-100 nm, has been studied. Important applications of this new dielectric material include the gate dielectric layer for the next generation metal-oxide-semiconductor field effect transistor (MOSFET). Due to the aggressive device scaling in ultra-large-scale integrated circuitry (ULSI), the ultra-thin conventional gate oxide (SiO2) is unacceptable for many practical reasons. By replacing the SiO2 layer with a high dielectric constant material (high-k), many of the problems can be solved. In this study, a novel high-k dielectric thin film, i.e., TaOx doped with Zr, was deposited and studied. The film’s electrical, chemical, and structural properties were investigated experimentally. The Zr dopant concentration and the thermal treatment condition were studied with respect to gas composition, pressure, temperature, and annealing time. Interface layer formation and properties were studied with or without an inserted thin tantalum nitride (TaNx) layer. The gate electrode material influence on the dielectric properties was also investigated. Four types of gate materials, i.e., aluminum (Al), molybdenum (Mo), molybdenum nitride (MoN), and tungsten nitride (WN), were used in this study. The films were analyzed with ESCA, XRD, SIMS, and TEM. Films were made into MOS capacitors and characterized using I-V and C-V curves. Many promising results were obtained using this kind of high-k film. It is potentially applicable to future MOS devices.

<p> As a possible alternative for growing seed layers required for electrochemical Cu deposition of metallization systems in ULSI circuits, the atomic layer deposition (ALD) of Cu is under consideration. To avoid drawbacks related to plasma-enhanced ALD (PEALD), thermal growth of Cu has been proposed by two-step processes forming copper oxide films by ALD which are subsequently reduced. </p> <p> This talk, given at the 8th International Conference on Atomic Layer Deposition (ALD 2008), held in Bruges, Belgium from 29 June to 2 July 2008, summarizes the results of thermal ALD experiments from [(^<i>n</i>Bu₃P)₂Cu(acac)] precursor and wet O₂. The precursor is of particular interest as it is a liquid at room temperature and thus easier to handle than frequently utilized solids such as Cu(acac)₂, Cu(hfac)₂ or Cu(thd)₂. Furthermore the substance is non-fluorinated, which helps avoiding a major source of adhesion issues repeatedly observed in Cu CVD. </p> <p> As result of the ALD experiments, we obtained composites of metallic and oxidized Cu on Ta and TaN, which was determined by angle-resolved XPS analyses. While smooth, adherent films were grown on TaN in an ALD window up to about 130°C, cluster-formation due to self-decomposition of the precursor was observed on Ta. We also recognized a considerable dependency of the growth on the degree of nitridation of the TaN. In contrast, smooth films could be grown up to 130°C on SiO₂ and Ru, although in the latter case the ALD window only extends to about 120°C. To apply the ALD films as seed layers in subsequent electroplating processes, several reduction processes are under investigation. Thermal and plasma-assisted hydrogen treatments are studied, as well as thermal treatments in vapors of isopropanol, formic acid, and aldehydes. So far these attempts were most promising using formic acid at temperatures between 100 and 120°C, also offering the benefit of avoiding agglomeration of the very thin ALD films on Ta and TaN. In this respect, the process sequence shows potential for depositing ultra-thin, smooth Cu films at temperatures below 150°C. </p>

Copper films with a thickness in the nanometer range are required as seed layers for the electrochemical Cu deposition to form multilevel interconnects in ultralarge-scale integrated (ULSI) electronic devices. Continuously shrinking device dimensions and increasing aspect ratios of the dual-damascene structures in the copper-based metallization schemes put ever more stringent requirements on the films with respect to their conformality in nanostructures and thickness homogeneity across large wafers. Due to its intrinsic self-limiting film growth characteristic, atomic layer deposition (ALD) appears appropriate for homogeneously coating complex substrates and to replace conventional physical vapor deposition (PVD) methods beyond the 32 nm technology node. To overcome issues of direct Cu ALD, such as film agglomeration at higher temperatures or reduced step coverage in plasma-based processes, an ALD copper oxide film may be grown under mild processing conditions, while a subsequent reduction step converts it to metallic copper. In this poster, which was presented at the AVS 9th International Conference on Atomic Layer Deposition (ALD 2009), held in Monterey, California from 19 to 22 July 2009, we report detailed film growth studies of ALD copper oxide in the self-limiting regime on SiO2, TaN and Ru. Applications in subsequent electrochemical deposition processes are discussed, comparing Cu plating results on as-deposited PVD Ru as well as with PVD and reduced ALD Cu seed layer.