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Estudo de transistores UTBOX SOI não auto-alinhados como célula de memória. / Study of the extensionless UTBOX SOI transistors as memory cell.Talitha Nicoletti 19 June 2013 (has links)
O objetivo principal deste trabalho é o estudo de transistores UTBOX SOI não auto-alinhados operando como célula de memória de apenas um transistor aproveitando-se do efeito de corpo flutuante (1T-FBRAM single Transistor Floating Body Random Access Memory). A caracterização elétrica dos dispositivos se deu a partir de medidas experimentais estáticas e dinâmicas e ainda, simulações numéricas bidimensionais foram implementadas para confirmar os resultados obtidos. Diferentes métodos de escrita e leitura do dado 1 que também são chamados de métodos de programação do dado 1 são encontrados na literatura, mas com intuito de se melhorar os parâmetros dinâmicos das memórias como o tempo de retenção e a margem de sensibilidade e ainda, permitir um maior escalamento dos dispositivos totalmente depletados, o método de programação utilizado neste trabalho será o BJT (Bipolar Junction Transistor). Uma das maiores preocupações para a aplicação de células 1T-DRAMs nas gerações tecnológicas futuras é o tempo de retenção que diminui juntamente com a redução do comprimento de canal do transistor. Com o intuito de solucionar este problema ou ao menos retardá-lo, é apresentando pela primeira vez um estudo sobre a dependência do tempo de retenção e da margem de sensibilidade em função do comprimento de canal, onde se observou que esses parâmetros dinâmicos podem ser otimizados através da polarização do substrato e mantidos constantes para comprimentos de canal maiores que 50 no caso dos dispositivos não auto-alinhados e 80 nos dispositivos de referência. Entretanto, observou-se também que existe um comprimento de canal mínimo que é dependente do tipo de junção (30 no caso dos dispositivos não auto-alinhados e 50 nos dispositivos de referência) de modo que para comprimentos de canal abaixo desses valores críticos não há mais espaço para otimização dos parâmetros, degradando assim o desempenho da célula de memória. O mecanismo de degradação dos parâmetros dinâmicos de memória foi identificado e atribuído à amplificação da corrente de GIDL (Gate Induced Drain Leakage) pelo transistor bipolar parasitário de base estreita durante a leitura e o tempo de repouso do dado 0. A presença desse efeito foi confirmada através de simulações numéricas bidimensionais dos transistores quando uma alta taxa de geração de portadores surgiu bem próxima das junções de fonte e dreno somente quando o modelo de tunelamento banda-a-banda (bbt.kane) foi considerado. Comparando o comportamento dos dispositivos não auto-alinhados com os dispositivos de referência tanto nos principais parâmetros elétricos (tensão de limiar, inclinação de sublimiar, ganho intrínseco de tensão) como em aplicações de memória (tempo de retenção, margem de sensibilidade, janela de leitura), constatou-se que a estrutura não auto-alinhada apresenta melhor desempenho, uma vez que alcança maior velocidade de chaveamento devido a menor inclinação de sublimiar; menor influência das linhas de campo elétrico nas cargas do canal, menor variação da tensão de limiar, até mesmo com a variação da temperatura. Além disso, constatou-se que os dispositivos não auto-alinhados são mais escaláveis do que os dispositivos de referência, pois são menos susceptíveis à corrente de GIDL, apresentando menor campo elétrico e taxa de geração próximos das junções de fonte e dreno que os dispositivos de referência, alcançando então um tempo de retenção de aproximadamente 6 e margem de sensibilidade de aproximadamente 71 A/m. Segundo as especificações da International Technology Roadmap for Semicondutor de 2011, o valor do tempo de retenção para as memórias DRAM convencionais existentes no mercado de semicondutores é de aproximadamente 64. Com o intuito de aumentar o tempo de retenção das 1T-DRAMs a valores próximos à 64 recomenda-se então o uso da tecnologia não auto-alinhada e também a substituição do silício por materiais com maior banda proibida (band-gap), como exemplo o arseneto de gálio e o silício-carbono, dificultando assim o tunelamento dos elétrons e, consequentemente, diminuindo o GIDL. / The main topic of this work is the study of extensionless UTBOX SOI transistors, also called underlapped devices, applied as a single transistor floating body RAM (1T-FBRAM single transistor floating body access memory). The electrical characterization of the devices was performed through static and dynamic experimental data and two dimensional simulations were implemented to confirm the obtained results. In the literature, different methods to write and read the data 1 can be found but in order to improve the dynamic parameters of the memories, as retention time and sense margin and still allows the scaling of fully depleted devices, the BJT (Bipolar Junction Transistor) method is used in this work. One of the biggest issues to meet the specifications for future generations of 1T-DRAM cells is the retention time that scales together with the channel length. In order to overcome this issue or at least slow it down, in this work, we present for the first time, a study about the retention time and sense margin dependence of the channel length where it was possible to observe that these dynamic parameters can be optimized through the back gate bias and kept constant for channel lengths higher than 50 nm for extensionless devices and 80 nm for standard ones. However, it was also observed that there is a minimal channel length which depends of the source/drain junctions, i.e. 30 nm for extensionless and 50 nm for standard devices in the sense that for shorter channel lengths than these ones, there is no room for optimization degrading the performance of the memory cell. The mechanism behind the dynamic parameters degradation was identified and attributed to the GIDL current amplification by the lateral bipolar transistor with narrow base. Simulations confirmed this effect where higher generation rates near the junctions were presented only when the band-toband- tunneling adjustment was considered (bbt.kane model). Comparing the performance of standard and extensionless devices in both digital and analog electrical parameters and also in memory applications, it was found that extensionless devices present better performance since they reach faster switching which means lower subthreshold slope; less influence of the electrical field in the channel charges; less variation of the threshold voltage even increasing the temperature. Furthermore, it was seen that the gate length can be further scaled using underlap junctions since these devices are less susceptible to the GIDL current, presenting less electric field and generation rate near the source/drain junctions and reach a retention time of around 4 ms and sense margin of 71A/m. According to the International Technology Roadmap for Semiconductor of 2011, the retention time for the existing DRAM is around 64 ms. In order to increase the retention time of the 1T-DRAMs to values close to 64 ms it is recommended the use of extensionless devices and also the substitution of silicon by materials with higher band gap, i.e., gallium arsenide and siliconcarbon, which makes difficult the electron tunneling therefore, decreasing the GIDL.
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Dagvattenutredning för Hamrebäcken : Utredning av föroreningsbelastning och framtagande av åtgärdsförslag för att förbättra vattenkvaliteten / Stormwater pollution of the Hamrebäcken stream : Investigating the pollutant load in order to develop measures to increase the ecological and chemical status of the streamFeltelius, Vilhelm January 2015 (has links)
Hamrebäcken rinner genom östra delen av Västerås och har Mälaren som recipient. Under bäckens flödesväg tillkommer dagvatten och föroreningar i form av näringsämnen och tungmetaller från dess avrinningsområde. Bäcken utgör ett av de mest prioriterade vattendragen i Västerås gällande utsläpp av dagvatten. Detta examensarbete har utförts med syftet att utreda föroreningssituationen för Hamrebäcken och hur dess recipient Mälaren påverkas. Examensarbetet syftade även till att undersöka reningseffekten för en befintlig dagvattendamm samt att utifrån ett kostnads- och reningsperspektiv beskriva ett antal åtgärdsförslag för att uppnå en förbättring av bäckens ekologiska och kemiska status. Utvärdering av Hamrebäckens föroreningsbelastning samt reningseffekt för befintlig dagvattendamm och åtgärdsförslag utfördes med hjälp av den Excelbaserade dagvatten- och recipientmodellen StormTac. Resultatet från studien visade att den modellerade belastningen från flera av bäckens delavrinningsområden överskrider föreslagna riktvärden för mindre vattendrag. Den totala belastningen från Hamrebäckens avrinningsområde överskrider i fallet för föroreningarna bly och suspenderat material även föreslagna riktvärden för Mälaren. Modellering av den befintliga dammen indikerar att anläggningen är underdimensionerad i förhållande till dess belastningsyta. Dammens reningseffekt uppnår inte heller effektmålen i Västerås stads handlingsplan för dagvatten. Ett förslag om utbyggnation av dammen har tagits fram utifrån litteraturstudie och tillgänglig yta för åtgärden. Den simulerade ombyggnationen uppnådde inte uppsatta effektmål men gav en betydande ökning i reningseffekt. Åtgärder som syftar till att öka dammens avskiljningsförmåga bör därför utredas ytterligare. Fyra ytterligare åtgärdsförslag togs fram och reningseffekten av dessa modellerades i StormTac. Detta inkluderade två olika placeringar av dagvattendammar, en skärmbassäng med flytande våtmark, samt en konstruerad våtmark. Från genomförd modellering rekommenderas vidare utredning av åtgärdsförslagen inkluderande ett anläggande av en skärmbassäng med flytande våtmark, alternativt en konstruerad våtmark. Detta då dessa åtgärdsförslag uppnådde effektmålen för rening enligt Västerås stads handlingsplan för dagvatten. Åtgärdsförslagen skilde sig något åt gällande kostnadseffektivitet. Detta ansågs dock inte ensamt vara argument nog för att motivera anläggning av något åtgärdsförslag till följd av osäkerheter i det beräknade resultatet. Att en skärmbassäng kan utföras i närtid och inte kräver några ingrepp i avrinningsområdet kan anses som ytterligare argument för installation av anläggningen. En konstruerad våtmark kan i sin tur motiveras med att anläggningen bidrar till att höja det estetiska och ekologiska värdet av området. Dessa argument bör beaktas i valet av metod och det fortsatta arbetet med att minska områdets föroreningsbelastning och förbättra bäckens ekologiska och kemiska status. / Hamrebäcken is a small stream in Västerås, which flows through the eastern part of the city. Along it’s course to Lake Mälaren, the stream receives polluted stormwater containing such as heavy metals and nutrients. The primary objective of this master thesis was to investigate the level of pollutants in Hamrebäcken. A secondary objective was to study the reduction efficiency of an existing wet stormwater treatment pond in the area, and propose ways in which to achieve a higher ecological and chemical status for the stream. The stormwater and recipient software model StormTac was used to estimate the level of pollutants and to investigate the reduction efficiencies of different stormwater treatment facilities. The study revealed that pollutant levels were too high for several of the subwatersheds, based on the recommended guidance for small streams. The pollutant load for the total watershed exceeded the guidance levels for Lake Mälaren for lead and suspended solids. Modelling the reduction efficiency of the existing wet pond indicated that the pond’s size was inadequate to cater for the quantity of incoming stormwater in need of treatment. Subsequently, the pollution reduction efficiency of the pond was not meeting those objectives set out in the Stormwater Action Plan developed by Västerås municipality. A proposal for rebuilding the pond was therefore developed, taking into account the existing conditions of the area and using recommendations from literature. When modeled in StormTac, the modified pond showed a substantial increase in reduction efficiency compared to that of the existing pond. Despite not reaching the objectives of the Action Plan, this suggested that it would be beneficial to investigate measures that increase the reduction efficiency of the existing wet pond further. As a result, an additional four alternatives for reducing the pollutant load of Hamrebäcken were developed using StormTac. These consisted of two wet stormwater treatment ponds at different locations within the watershed, a screen basin with floating treatment wetlands, and a constructed wetland. The modeling revealed that the most feasible of the investigated measures was an installation of either a screen basin with floating treatment wetlands or a constructed wetland, both measures adjacent to the outlet of Hamrebäcken. This was mainly due to the modeled reduction capacity of these measures where the reduction objectives of the Action Plan were reached. A difference in cost effectiveness was found between the different measures. This was however not considered to solely be argument to justify the implementation of a certain measure due to uncertainties in the modelled result. The fact that a screen basin can be installed in the near future and without occupying space in the watershed are additional arguments for the use of this measure. A constructed wetland can in return be motivated by a potential increase in esthetic and ecological value of the area. These arguments should be considered in the continued investigation of choosing a measure for reducing the pollutant load of Hamrebäcken and to achieve a higher ecological and chemical status for the stream.
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Simulation temps-réel embarquée de systèmes électriques au moyen de FPGA / FPGA-based Embedded real time simulation of electrical systemsDagbagi, Mohamed 08 October 2015 (has links)
L'objectif de ce travail de thèse est de développer une bibliothèque de modules IPs (Intellectual Properties) de simulateurs temps réel embarqués qui simulent différents éléments d'un système électrique. Ces modules ont été conçus pour être utiliser non seulement pour une validation HIL (Hardware-In-the-Loop) des commandes numériques mais aussi pour des applications de commande embarquées, où le module IP de simulateur et le contrôleur sont tous les deux implémentés et exécutés dans la même cible FPGA. Cette nouvelle classe de simulateurs temps réel devrait être de plus en plus incluse dans la prochaine génération de contrôleurs numériques. En effet, ces modules IPs de simulateurs temps réel embarqués peuvent être avantageusement intégrés dans les contrôleurs numériques pour assurer des fonctions comme l'observation, l'estimation, le diagnostic où la surveillance de la santé. Inversement aux cas de HIL, le principal défi lors de la conception de tels simulateurs est de faire face à leur complexité ayant à l'esprit que, dans le cas des systèmes embarqués, les ressources matérielles disponibles sont limitées en raison du coût. En outre, ce problème est renforcé par la nécessité des pas de simulation très petit. Ceci est généralement le cas lors de la simulation des convertisseurs de puissance.Pour développer ces modules IPs, des lignes directrices dédiés de conception ont été proposées pour être suivies pour gérer la complexité de ces simulateurs (solveur de modèle, solveur numérique, pas de simulation, conditionnement de données) tout en tenant compte des contraintes temporelles et matérielles/coût (temps de calcul limité, ressources matérielles limitées ...).Les modules IPs de simulateurs à développer ont été organisés en deux catégories principales: ceux qui sont consacrées aux éléments électromagnétiques d'un système électrique, et ceux dédiés à ses éléments commutés.La première catégorie regroupe les éléments où les phénomènes électriques, magnétiques sont modélisés en plus de phénomènes mécaniques (pour les parties mécaniques) et des phénomènes potentiellement thermiques. Trois cas sont traités: le simulateur temps réel embarqué d'une machine synchrone triphasée, celui d'une machine asynchrone triphasée et celui d'un alternateur synchrone à trois étages. En plus de cela, les avantages de l'utilisation de la transformation delta pour améliorer la stabilité du solveur numérique lorsque un petit pas de calcul et le codage virgule fixe (avec une précision de données limitée) sont utilisés, ont été étudiés.La deuxième catégorie concerne des éléments commutés tels que les convertisseurs de puissance où les événements de commutation sont considérés. Là encore, plusieurs topologies de convertisseurs ont été étudiées: un redresseur simple alternance, un hacheur série, un hacheur réversible en courant, un hacheur quatre quadrant, un onduleur monophasé, un onduleur triphasé, un redresseur à diodes triphasé et un redresseur MLI triphasé. Pour tous ces modules IPs de simulateurs, l'approche de modélisation ADC (Associated Discrete Circuit) est adoptée.Le module IP de simulateur temps réel embarqué du redresseur MLI a été appliqué dans un contexte d'une application embarquée. Cette dernière consiste en une commande tolérante aux défauts d'un convertisseur de tension coté réseau. Ainsi, ce module IP est associé à celui d'un simulateur temps réel d'un filtre RL triphasé et les deux sont embarqués dans le dispositif de commande du redresseur pour estimer les courants de lignes. Ces courants sont injectés dans le dispositif de commande dans le cas d'un défaut de capteur de courant. La capacité de cet estimateur de garantir la continuité de service en cas de défauts est validée par des tests HIL et expérimentalement. / The aim of this thesis work is to develop an IP-Library of FPGA-based embedded real-time simulator IPs (Intellectual Properties) that simulate different elements of an electrical system. These IPs have been designed to be used not only for Hardware-In-the-Loop (HIL) testing of digital controllers but also for low cost embedded control applications, where the simulator IP and the controller are both implemented and run altogether in the same FPGA device. This emerging class of real-time simulators is expected to be more and more included in the next generation of digital controllers. Indeed, such embedded real-time simulator IPs can be advantageously embedded within digital controllers to ensure functions like observation, estimation, diagnostic or health-monitoring. Conversely to the HIL case, the main challenge when designing such simulator IPs is to cope with their complexity having in mind that, in the case of embedded systems, the available hardware resources are limited due to the cost. Furthermore, this challenge is strengthened by the need of very short simulation time-steps which is typically the case when simulating power converters.To develop these IPs, dedicated design guidelines have been proposed to be followed to manage the complexity of these simulator IPs (model solver, numerical solver, time-step, data conditioning) with regards to the timing and the area/cost constraints (computation time limit, limited hardware resources …).The simulators IPs to be developed have been organized into two main categories: those dedicated to electromagnetic elements of an electrical system and those dedicated to their switching elements.The first category gathers elements where electric, magnetic phenomena are modelized in addition to mechanical phenomena (for moving systems) and potentially thermal phenomena. Three cases are dealt with: the embedded real-time simulator of a three-phase synchronous machine, the one of a three-phase induction machine and the one of a brushless synchronous generator. Also, the advantages of using delta transformation to improve the stability of the numerical solver when short simulation time-step and fixed-point (with limited data precision) are used, have been studied.The second category concerns switching elements such as power converters where switching events are considered. Here again, several converter topologies have been studied: a half-wave rectifier, a buck DC-DC converter, a bidirectional buck DC-DC converter, a H-bridge DC-DC converter, a single-phase H-bridge DC-AC converter, a three-phase voltage source inverter, a three-phase diode rectifier and a three-phase PWM rectifier. For all these IPs, the Associated Discrete Circuit (ADC) modeling approach is adopted.The embedded real-time simulator IP of the three-phase PWM rectifier has been applied in the context of an embedded application. The latter consists of a fault-tolerant control of a grid-connected voltage source rectifier. Thus, this simulator IP is associated with the one of a three-phase RL-filter and are both implemented within the rectifier controller to estimate the grid currents. These currents are injected in the controller in the case of a current sensor fault. The ability of this estimator to guarantee the service continuity in the case of faults is validated through HIL tests and experiments.
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Boende på vatten – en utredande studie om den flytande bostadens förutsättningar i Sverige / Living on water - an exploratory study about the possibilities for floating homes in SwedenSimon Käck, Käck, Emelie, Dalblad Lundin January 2017 (has links)
Syfte: Bostadsbristen drabbar alla, i framtiden måste vi utforma bostäder och stadsdelar som främjar social-, ekonomisk- och ekologisk hållbarhet. Flytande bostäder har dessa egenskaper men har svårt att etablera sig i Sverige. Studien syftar till att utreda möjligheter och problem som finns för flytande bostäder i Sverige. Metod: Studien har en genomgående kvalitativ karaktär. Metoderna är semistrukturerade intervjuer, observationer och dokumentanalys. Respondenter är myndigheter, fastighetsägare och entreprenörer. Resultat: De återkommande problemområden som hittades var ekonomi, juridik och teknik. Oro för tekniska lösningar nämndes enbart av respondenter som saknade erfarenhet av flytande bostäder. Det som skiljer en flytande bostad från en på mark är att dragningar för el, vatten och avlopp dras i vattnet samt att flytanordning och dess anslutning till fast mark tillkommer. Att bygga på vatten blir inte nödvändigtvis dyrare jämfört med att bygga på land. Det är osäkerhet och oerfarenhet som kan göra att färdigställandet av en flytande bostad dyr. Det område som anses vara det största hindret är juridiken. Bygglovsprocessen är längre på grund av att det finns fler regelverk och myndigheter inblandade. Rent konkret är det den svenska lagstiftningen för strandskydd, vattenverksamhet och detaljplanering försvårar processen för flytande bostäder. Konsekvenser: Genom att ge kommuner större frihet i exploatering av marken kan genombrottet för flytande bostäder i Sverige underlättas. Detaljplaneringsarbetet behöver inkludera vattenområden för att underlätta bygglovsansökan. Det behövs fler referensobjekt för att den flytande bostaden inte ska ses som främmande och för att ge en större kännedom om flytande hus. Idag förknippas flytande bostäder med lyx och inte som ett bidrag i lösningen på bostadsbristen. Begränsningar: Studien avser Sverige som geografisk region. Respondentsgrupperna som intervjuats är myndigheter, entreprenörer och fastighetsägare och därför är resultatet talande för endast dessa kategorier, likväl som ett fåtal respondenter från dessa grupper talar för dess majoritet. Ett skissförslag, kalkyl eller konkreta lagförslag ingår inte i rapporten och anses därför vara förslag på vidare forskning. Nyckelord: Alternativa boendelösningar, alternativ markanvändning, boende på vatten, bostadsbrist, flytande bostäder, strandskyddet, stadsutveckling / Purpose: The housing shortage affects everyone and in the future, we have to think about social, ecologic and economic sustainability in architecture and urban planning. Floating houses has the potential to satisfy all these requirements but in Sweden they have a hard time to settle as a concept. This study aims to investigate the possibilities and setbacks for floating homes in Sweden. Method: The methods of research in this investigation is qualitative. The collection of empirical data is done through semi-structured interviews, observation and analysis of documents. Findings: The biggest problem areas that we discovered was economy, law and technical solutions. Worry about the possible technical problems was only put forth by respondents who had little or none experience in working with floating homes. The main technical differences between a floating home and one on dry land is that the plumbing goes in the floating device instead of the ground, the connection between the house and the floating device and that a floating property doesn´t need any groundwork done. The cost of a floating house is often similar to one on dry land. The economic issues are uncertainty and inexperience, these factors can make the construction of a floating house more expensive. The area that contains the most problems for floating houses is the juridical. The process of getting a building permit is longer due to the extra number of laws and agencies involved. Implications: Municipalities needs bigger freedom in deciding land exploitation to make it easier for floating houses to be an established concept in Sweden. The detailed development plan needs to include water areas. Another thing that will help is more completed projects, more projects for reference means more knowledge about the concept, instead of it being seen as just a luxury. Limitations: The investigation refers to Sweden as the geographic region. We interviewed respondents from agencies, entrepreneurs and property owners and the answers can only be seen as representative for those groups. Sketches of a floating home, a deeper calculation of the economy and precise law changes are not included in the thesis and are therefore suggestions for further research. Keywords: Alternative housing, alternative land use, floating houses, housing shortage, living on water, shoreline protection, urban development.
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Economic Modelling of Floating Offshore Wind Power : Calculation of Levelized Cost of EnergyHeidari, Shayan January 2017 (has links)
Floating offshore wind power is a relatively new technology that enables wind turbines to float above the sea level, tied by anchors at the seabed. The purpose of this work is to develop an economic model for the technology in order to calculate the total cost of a planned wind farm. Cost data are retrieved from reports and academic journals available online. Based on these data, a model in Microsoft Excel is developed which calculates the Levelized cost of energy (LCOE) for floating wind power plants as a function of several input values. As an addition to this model, financing offshore projects are described using literature study and by doing interviews with three major companies, currently investing in offshore wind. As a result, the model allows the user to calculate Capital expenditures, Operating expenditures and LCOE for projects at any given size and at any given site. The current LCOE for a large floating offshore wind farm is indicated to be in the range of 138-147 £/MWh. The outline from interviews was that today there is no shortage of capital for funding wind projects. However, in order to attract capital, the governmental regulatory of that market has to be suitable since it has a crucial impact on price risks of a project.
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Développement de technique de procédé de fabrication innovante et de nouvelle architecture de transistor MOS / Development of innovative manufacturing process techniques and a new MOS transistor architectureMarzaki, Abderrezak 29 November 2013 (has links)
La miniaturisation des composants et l’amélioration des performances des circuits intégrés (ICs) sont dues aux progrès liés au procédé de fabrication. Malgré le nombre de technologie existante, la technologie CMOS est la plus utilisée. Dans le cadre du développement de la technologie CMOS 90nm à double niveau de poly, des recherches sur l’introduction de techniques innovantes de procédé de fabrication et d’une nouvelle architecture de transistor MOS à tension de seuil ajustable ont été menées dans le but d’améliorer les performances des ICs. Une première étude sur l’implémentation des effets de pointe dans les ICs, en particulier pour les mémoires non volatiles est entreprise. Un nouveau procédé de fabrication permettant d’obtenir des pointes dans un matériau est proposé. Il est démontré le gain en courant tunnel obtenu sur une structure pointue par rapport à une structure plane. Une seconde étude est orientée sur le développement d’une nouvelle technique de « patterning ». Les techniques de « patterning » permettent de réduire les dimensions de la photolithographie sans utiliser de masque ayant des dimensions agressives. Les avantages de cette nouvelle technique aux niveaux de sa mise en œuvre et de la suppression des problèmes d’alignement sont présentés. Une dernière étude sur le développement d’un transistor à tension de seuil ajustable est développée. Il est démontré l’avantage de ce composant par rapport aux autres composants à tension de seuil ajustable. La réalisation du modèle et des premières simulations électriques de circuit élémentaire à base de se composant sont présentés. L’amélioration de certaines performances des circuits élémentaire est démontrée. / The component miniaturization and the circuit performance improvement are due to the progress related to the manufacturing process. Despite the number of existing technology, the CMOS technology is the most used. In the 90nm CMOS technology development, with a double poly-silicon level, the research on the introduction of innovative manufacturing process techniques and a new architecture of MOS transistor with an adjustable threshold voltage are carried out to improve the integrated circuit performances. A first study, on the peak effect implementation in the integrated circuits, particularly in the non-volatile memories is undertaken. A new process to obtain a peak effect in a material is proposed. It is shown the tunnel current gain obtained on a peak structure compared with a planar structure. A second study is focused on the development of a new patterning technique. The patterning techniques allow to reduce the photolithography dimensions without using an aggressive mask. The advantages of this new technique in terms of its implementation and the suppression of alignment problems are presented. A last study on the development of a MOS transistor with an adjustable threshold voltage is developed. It is shown the advantage of this component relative to the other components with an adjustable threshold voltage. The model implementation and the first electrical simulations of elementary circuits composed with this new component are presented. The performance improvement of some elementary circuits is demonstrated.
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The Performance of Simple Artificial Floating Wetland Communities and Their Effects on Aquatic Nutrient Levels and Algal AbundanceSleeth, Bradley L 01 January 2014 (has links)
Harmful algal blooms are exponential increases in autotrophic microorganisms that proliferate in such a way that the surrounding environment, the local economy and the health of regional populations are negatively affected. Among the causes of these blooms are anthropogenic inputs of excess nitrogen and phosphorus into the environment through overfertilization. Floating treatment wetlands (FTW) have emerged as a novel method of reducing the negative impacts of these nutrient inputs by using artificial rafts to float normally emergent wetland plants on the surface of water bodies to assimilate excess nutrients. Because their use is so new, only limited research has been performed on their effectiveness. This mesocosm-level study evaluated the performance of a FTW consisting of a community of yellow canna (Canna flaccida), blue flag iris (Iris hexagona) and bulltongue arrowhead (Saggittaria lancifolia) in simulated stormwater of varying nitrogen and phosphorus concentrations. The community of plants displayed nitrogen limitation, while the cyanobacteria-dominated algal community that developed displayed phosphorus limitation, leading to the conclusion that in order for this community of macrophytes to limit algal growth, nitrogen must be present to support their growth and concurrent assimilation of the algae-limiting nutrient phosphorus. Canna and iris were found to significantly outperform arrowhead in terms of biomass gains. The study also showed that the size of the plants may be of great importance in the ability of FTWs to limit algal development. Despite the fact that the community of plants in this study were unable to limit the development of algae, the use of FTWs remains promising and further research should be done to continue to enhance our understanding of their strengths and weaknesses.
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Mitigating Congestion by Integrating Time Forecasting and Realtime Information Aggregation in Cellular NetworksChen, Kai 11 March 2011 (has links)
An iterative travel time forecasting scheme, named the Advanced Multilane Prediction based Real-time Fastest Path (AMPRFP) algorithm, is presented in this dissertation. This scheme is derived from the conventional kernel estimator based prediction model by the association of real-time nonlinear impacts that caused by neighboring arcs’ traffic patterns with the historical traffic behaviors. The AMPRFP algorithm is evaluated by prediction of the travel time of congested arcs in the urban area of Jacksonville City. Experiment results illustrate that the proposed scheme is able to significantly reduce both the relative mean error (RME) and the root-mean-squared error (RMSE) of the predicted travel time. To obtain high quality real-time traffic information, which is essential to the performance of the AMPRFP algorithm, a data clean scheme enhanced empirical learning (DCSEEL) algorithm is also introduced. This novel method investigates the correlation between distance and direction in the geometrical map, which is not considered in existing fingerprint localization methods. Specifically, empirical learning methods are applied to minimize the error that exists in the estimated distance. A direction filter is developed to clean joints that have negative influence to the localization accuracy. Synthetic experiments in urban, suburban and rural environments are designed to evaluate the performance of DCSEEL algorithm in determining the cellular probe’s position. The results show that the cellular probe’s localization accuracy can be notably improved by the DCSEEL algorithm. Additionally, a new fast correlation technique for overcoming the time efficiency problem of the existing correlation algorithm based floating car data (FCD) technique is developed. The matching process is transformed into a 1-dimensional (1-D) curve matching problem and the Fast Normalized Cross-Correlation (FNCC) algorithm is introduced to supersede the Pearson product Moment Correlation Co-efficient (PMCC) algorithm in order to achieve the real-time requirement of the FCD method. The fast correlation technique shows a significant improvement in reducing the computational cost without affecting the accuracy of the matching process.
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Automatické řízení výpočtu ve specializovaném výpočetním systému / Specialized Computer System Automatic ControlOpálka, Jan January 2016 (has links)
This work deals with the automatic control of calculations of specialized system. The reader is acquainted with the numerical solution of differential equations by Taylor series method and numerical integrators. The practical aim of this work is to analyze parallel characteristics of Taylor series method, specification of parallel math operations and design of control of this operations.
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Aplikační aspekty textilních zátěrů s termochromními pigmenty / The application aspects of thermochromic textile coatingŠtaffová, Martina January 2018 (has links)
V diplomové práci je prezentovaná literární rešerše na téma termochromní pigmenty a jejich aplikace v polymerních matricích. Výzkum byl zaměřen na hlubší pochopení termochromního efektu v pigmentech na bázi molekulárních komplexů. Termochromní pigmenty byly aplikovány do polyuretanového textilního zátěru a bylo zjištěno optimální nastavení podmínek zátěru. Textilní zátěry byly podrobeny termickým zkouškám a zároveň byla pozorována jejich stálobarevnost.
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