CoordenaÃÃo de AperfeiÃoamento de Pessoal de NÃvel Superior / Diante da necessidade em aperfeiÃoar as tecnologias existentes para a conversÃo de energia elÃtrica em sistemas de alta potÃncia, este trabalho tem por finalidade projetar, analisar e implementar experimentalmente uma tÃcnica de modulaÃÃo com o intuito de reduzir o conteÃdo harmÃnico da tensÃo de saÃda em um inversor multinÃvel com capacitor flutuante de trÃs nÃveis. Algumas das diversas tÃcnicas de modulaÃÃo (PSPWM, LSPWM, HE-PWM e CSV-PWM) foram analisadas e implementadas no controlador digital FPGA a fim de comparar suas caracterÃsticas de desempenho com a tÃcnica de modulaÃÃo proposta. AlÃm disso, foi realizado o estudo de perdas da topologia de inversor multinÃvel com capacitor flutuante de trÃs nÃveis e a anÃlise teÃrica da distorÃÃo harmÃnica total da modulaÃÃo proposta. Finalmente, o desenvolvimento digital das tÃcnicas mostrou resultados coerentes, com formas de onda obtidas experimentalmente com alta qualidade de resoluÃÃo. A comparaÃÃo entre as estratÃgias de modulaÃÃo em termos de DHT resultou positivamente à modulaÃÃo proposta, cujos resultados experimentais de DHT nas tensÃes de linha na saÃda apresentaram o melhor desempenho para toda a faixa de Ãndices de modulaÃÃo comparadas Ãs tÃcnicas PSPWM, LSPWM-POD e CSV-PWM e uma reduÃÃo de atà 4,5% em relaÃÃo à HE-PWM. Isto comprova o estudo teÃrico realizado e sua aplicaÃÃo no inversor multinÃvel com capacitor flutuante de trÃs nÃveis. / Given the need to improve the existing technologies for electrical energy conversion into high power systems, this works purpose to design, analyze and implement a modulation technique that aims to reduce the output voltage harmonic content on the three-level flying capacitor multilevel inverter. Some of the various conventional modulation techniques (PSPWM, LSPWM, HE-PWM e CSV-PWM) have been analyzed and implemented in FPGA controller in order to compare their performance features with the proposed modulation technique. Furthermore, the losses study of the three-level flying capacitor multilevel inverter topology and the total harmonic distortion theoretical analysis of the proposed modulation technique have been made. Finally, the digital implementation of the techniques showed consistent results with experimentally obtained waveforms with high quality resolution. The comparison between the modulation strategies in the THD rates resulted positively for the proposed modulation, which THD experimental results in the line output voltage showed the best performance for all range of modulation indexes compared to techniques PSPWM, LSPWM-POD and CSV-PWM and the reduction of up to 4.5% better than HE-PWM. This proved the theoretical study done and its application in three-level flying capacitor multilevel inverter.

This dissertation presents voltage stabilization techniques for flying capacitors used in soft-switching multilevel active power filters. The proposed active filter has proved to be a solution for power system harmonics produced by static high power converters. However, voltage unbalance of the clamping capacitors in the active filter in practical applications was observed due to its unequal parameters. Thus, the fundamentals of flying capacitors were characterized dealing with voltage balancing between flying capacitors and dc capacitors under practical operation, rather than ideal conditions. The study of voltage balancing provides the fundamental high-level solutions to flying capacitor based multilevel converter and inverter applications without additional passive balancing circuits. The use of proposed voltage balancing techniques made it possible to have a simple structure for solving the problems associated with the conventional bulky passive resistors and capacitor banks. Furthermore, the proposed control algorithms can be implemented with a real time digital signal processor. It can achieve the high performance of the active filter by compensating an adaptive gain to the controller. The effectiveness of the proposed controller was confirmed through various simulations and experiments. The focus of this study is to identify and develop voltage stabilization techniques for flying capacitors used in a proposed active filter. The voltage unbalance is investigated and characterized to provide safe operations. After having defined the problems associated with the voltage unbalance, the most important voltage stabilization techniques are proposed to solve this problem, in conjunction with an instantaneous reactive power (IRP) control of an active filter. In order to reduce the switching losses and improve the efficiency of the active filter, the proposed soft-switching techniques were evaluated through simulation and experimentation. Experimental results indicate that the proposed active filter achieved zero-voltage conditions in all of the main switches and zero-current turn-off conditions to the auxiliary switches during commutation processes. Also, various studies on soft-switching techniques, multilevel inverters, control issues and dynamics of the proposed active filter are discussed and analyzed in depth. / Ph. D.

Orientador: Carlos Alberto Canesin / Resumo: No presente trabalho de dissertação, é analisado e desenvolvido um conversor ressonante com o objetivo de produzir ozônio, aplicado à água de processos de higienização industrial. Na atualidade, no ano de 2018, dois dos fatores de grande importância no desenvolvimento de conversores para geração de ozônio são: a eficiência energética, isto é, quanta energia é aproveitada em relação à energia total fornecida ao conversor, e a outra é a produção de ozônio fazendo uso dessa energia aproveitada. Os dois fatores não necessariamente estão relacionados, por exemplo, para dois conversores distintos com a mesma energia disponível, pode acontecer que em um deles possa ser produzido maiores concentrações de ozônio com um menor aproveitamento de energia. Portanto, este trabalho enfatiza a melhoria da eficiência energética na produção de ozônio, empregando comutação suave nas estruturas envolvidas do conversor ressonante proposto, o que resulta em uma eficiência energética de 91,57%. A estrutura do conversor proposto apresenta dois estágios em cascata, o primeiro deles, um conversor que é responsável por gerar um barramento CC estável de 400,5 V e que atende aos requisitos de fator de potência e distorção harmônica total com valores de 0,994 e 5,79%(para a corrente de entrada), respectivamente, e o segundo, um inversor ressonante capaz de fornecer uma tensão de 4,4 kV com uma frequência de 10 kHz que atua como fonte de alimentação de um reator conformado por câmaras de descarga usadas em ... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: In the present dissertation, it is studied and developed a resonant converter in order to produce ozone, applied in water treatment for cleaning processes. Currently, in the year 2018, two of the factors of great importance in the development of converters for ozone generation are: energy efficiency, that is, how much energy is used in relation to the total energy supplied to the converter, and the other is the production of ozone making use of this energy harnessed. The two factors are not necessarily related, for example, for two different converters with the same energy available, it can happen that in one of them can be produced higher concentrations of ozone with a lower use of energy. Therefore, this work emphasizes the improvement of energy efficiency in the production of ozone using soft switching in the involved structures of the proposed resonant converter, which results in an energy efficiency of 91.57%. The structure of the proposed converter has two stages in cascade, the first one, a converter that is responsible for generating a stable DC bus of 400.5 V and that meets the requirements of power factor and total harmonic distortion with values of 0.994 and 5.79% (for the input current), respectively, and the second, a resonant inverter capable of providing a voltage of 4.4 kV with a frequency of 10 kHz which acts as a power supply for a reactor formed by discharge chambers used in ozone generation applications by electric discharge. Naturally, relevant ozone info... (Complete abstract click electronic access below) / Mestre

Thesis (PhD (Electrical and Electronic Engineering))--University of Stellenbosch, 2011. / AFRIKAANSE OPSOMMING: Hierdie proefskrif handel oor die natuurlike balanserings meganismes van veelvlakkige en modulêre omsetters wat fase-skuif dragolf puls wydte modulasie gebruik. Die meganismes kan in twee hoof groepe verdeel word: ‘n swak balanserings meganisme wat afhanklik is van die oorvleuling van die skakelfunksies en ‘n sterk meganisme wat voorkom ongeag of die skakelfunksies oorvleul al dan nie. Die sterk meganisme verdeel verder in twee subgroepe, ‘n direkte oordrag van onbalans energie en ‘n meganisme wat afhang van die verliese in die stelsel. Elkeen van die meganismes word aan die hand van ‘n omsetter topologie waarin die spesifieke meganisme oorheers beskryf en ontleed. In die ondersoek word klem geplaas op die daarstelling van uitdrukkings om die tydskonstantes van herbalansering na ’n afwyking vir elk van die omsetter toplologieë te beskryf. / ENGLISH ABSTRACT: This thesis investigates the natural balancing mechanisms in multilevel and modular converters using phase shifted carrier pulse width modulation. Two groups of mechanisms are identified; a weak balancing mechanism that is only present when the switching functions are interleaved and a strong mechanism that occurs irrespective of the interleaving of the switching functions. It is further shown that the strong balancing mechanism can be divided into a balancing mechanism that depends on the direct exchange of unbalance energy and a loss based balancing mechanism. Each of the mechanisms is discussed and analysed using a converter where the specific mechanism dominates as example. Emphasis is placed on the calculation of the rebalancing time constant following a perturbation. Closed form expressions for the rebalancing time constants for each of the analysed converters are presented.

Thesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2011. / ENGLISH ABSTRACT: This thesis investigates the viability of constructing a solid-state transformer (SST) with a series-input, parallel-output connection of full-bridge, three-level ying-capacitor converters. It focusses on the active recti er front-end of the SST which is used to control the input current to be sinusoidal and in-phase with the sinusoidal input voltage. A stack of two converters are built and tested. The input current, as well as the ying capacitor voltages of the two active recti ers in the stack, are actively controlled by a nite-state model-based predictive (FS-MPC) controller. The use of multiple ying-capacitor converters poses a problem when using FS-MPC because of the large number of possible switching states to include in the prediction equations. Three FS-MPC control algorithms are proposed to attempt to overcome the problem associated with the large number of switching states. They are implemented on an FPGA digital controller. The algorithms are compared on the bases of voltage and current errors, as well as their responses to disturbances that are introduced into the system. The simulation and experimental results that are presented shows that by interleaving the control actions for the two converters, one can obtain fast and robust responses of the controlled variables. The viability of extending the interleaving control algorithm beyond two converters is also motivated. / AFRIKAANSE OPSOMMING: Hierdie tesis ondersoek die moontlikheid van volbrug, drievlak vlieënde-kapasitoromsetters wat gebruik word om 'n serie-intree, parallel-uittree drywingselektroniese transformator (DET) te bou. Dit fokus op die aktiewe gelykrigter van die DET wat gebruik word om die intreestroom te beheer om sinusvormig en in fase met die sinusvormige intreespanning te wees. 'n Stapel van twee omsetters word gebou en getoets. Die intreestroom, sowel as die vlieënde kapasitorspannings van die twee aktiewe gelykrigters in die stapel, word aktief beheer met behulp van 'n eindige-toestand, model-gebaseerde voorspellende beheerder (ET-MVB). Die gebruik van veelvuldige vlieënde-kapasitoromsetters bemoeilik die implementering van 'n ET-MVB-beheerder as gevolg van die groot aantal skakeltoestande wat in die voorspellende vergelykings in ag geneem moet word. Drie ET-MVB-algoritmes word voorgestel om te poog om die probleme, wat met die groot aantal skakeltoestande geassosieer word, te oorkom. Die algoritmes word in 'n FPGA digitale verwerker geïmplementeer. Die algoritmes word vergelyk op grond van hul stroom- en spanningsfoute, asook hul reaksie op steurings wat op die stelsel ingevoer word. Die simulasie en praktiese resultate toon dat, deur die beheeraksies vir die twee omsetters te laat oorvleuel, die gedrag van die beheerde veranderlikes vinniger en meer robuust is. Die moontlikheid om die oorvleuelende beheeraksies uit te brei tot meer as twee omsetters word ook gemotiveer.

The demand for high-power converters are surging due to applications like renewable energy, motor drives and grid-interface applications. Typically, these converters’ power ranges from tens of kilowatts (kW) to several megawatts (MW). To reach such high power levels the converter voltage ratings must increase, as the current ratings cannot be reached by the available devices or because the system losses become excessive. To address this, two strategies can be utilized: multilevel topologies (e.g. Multilevel Modular Converter or Flying Capacitor Multilevel Converter) and high voltage switches. For medium voltage applications, the most commonly employed switches are the IGBT and the IGCT. Both are silicon-based technology and are limited to a rated voltage of 6.5 kV and 4.5 kV, respectively. Often, these devices switching frequency are limited to less than 1 kHz. To expand the frontiers of medium voltage converters and to demonstrate the capabilities of wide band gap devices in medium voltage, a 7-level 13.8 kV AC 22 kV DC 1.1 MW flying capacitor multilevel converter based on 10 kV SiC MOSFET with 2.5 kHz switching frequency was designed and constructed. Given the complexity of a multilevel topology, the high voltage levels, and the critical nature of the loads, a failure in a high-power converter can incur significant costs, long service downtime, and safety risks to personnel. Hence, understanding the failure modes of these converters is essential for designing protections and mitigation strategies to prevent or reduce the risks of failures. Furthermore, the adoption of 10 kV SiC MOSFET introduces additional challenges in terms of protection. Despite their well-known benefits, these devices exhibit shorter energy withstanding time compared with their silicon counterpart, and increased insulation stress resulting from the high dv/dt imposed by the fast-switching transient at higher voltages. In this context, a failure mode analysis was conducted for the converter aforementioned. The analysis examined the fault dynamics and evaluated the protections schemes at the converter level. The study identified a failure mechanism between cells, so called Cell Short- Circuit Fault (CSCF), capable of damaging the entire phase-leg. In response, a protection scheme based on TVS (Transient Voltage Suppression) diodes was designed to prevent extremely imbalanced cell voltages and failure propagation. Because of the high electric field intensity environment of the converter, an FEA (Finite Element Analyses) simulation is performed to verify and control the electric field (E-field) intensity within the protection module itself and in the converter assembly. Next, the protection module insulation design was successfully verified in a Partial Discharge (PD) experiment. In sequence, an experimental verification utilizing an equivalent circuit based on the fault model demonstrated the efficacy of the protection module. Waveforms extracted while the converter was operating showing the protection module acting during a fault are presented and analyzed. Finally, the influence of the protection module in the switching of the 10 kV SiC MOSFET was evaluated via a double pulse test (DPT), revealing negligible effects on the converter performance. / Center of Power Electronics Systems (CPES) Department of Energy (DoE) / Master of Science / Due to governmental policies and market opportunities renewable energy (e.g. solar and wind energy) is increase its share in the electricity generation in the US and around the world. This scenario poses challenges regarding the stability of the grid and variation in the generation along the day. One of the alternatives to alleviate the problem is to use highpower converters that provides a interface between grid and manufacturing plants. This type of converter have bidirectional capabilities and can store the energy generated by solar farms during the day and return it to the grid at night for example. Moreover, it can provide grid support capabilities in terms of variation of frequency and voltage. To expand on the grid interface converters application concept, a medium voltage power converter in 22 kV DC and 13.8 kV AC is designed utilizing novel techniques and the latest technologies in semiconductors, 10 kV SiC MOSFETs. The benefits of this design are a small form factor, high efficiency, immunity to electromagnetic interference and power quality. This work presents a failure mode analysis of the power converter aforementioned, the analysis examined the fault dynamics and an evaluation of the protections schemes at the converter level. The failure analysis revealed the need of a protection scheme extremely imbalanced cell voltages and failure propagation. Hence, a protection module based on TVS (Transient Voltage Suppression) diodes was successfully designed and tested. Due to the high voltages present in this equipment, an FEA (Finite Element Analyses) simulation is performed to verify and control the electric field (E-field) intensity within the protection module itself and in the converter assembly. Experimental results are provided for insulation design integrity (partial discharge test), for the efficacy of the protection module against the fault, and for the impact of the protection module on the operation performance.

Les principaux critères de comparaison des convertisseurs sont le rendement, la masse, le volume, le coût et la fiabilité. Le contexte environnemental et économique et le développement des applications nomades ouvrent à l’électronique de puissance un domaine d’application de plus en plus vaste. Mais pour imposer cette technologie, il faut sans cesse améliorer ces performances et les compromis entre celles qui sont antagonistes (augmentation du rendement et diminution de la masse par exemple…) ce qui amène naturellement à la problématique de conception et d’optimisation. Le cas spécifique de l’aéronautique n’échappe pas à la règle et les contraintes y semblent encore plus fortes. La réduction de la masse, du volume et l’augmentation du rendement et de la fiabilité sont parmi les défis principaux actuels, et la transition de systèmes hydrauliques ou pneumatique vers des systèmes électriques laisse espérer à une amélioration des performances globales de l’avion. Les architectures des convertisseurs sont un moyen efficace d’améliorer les convertisseurs parce qu’ils permettent de réduire les contraintes au sein des convertisseurs tout en améliorant les formes d’onde en entrée et/ou en sortie. Parallèlement, les composants classiques en silicium ont bénéficié de larges avancés au cours de ces dernières décennies et approchent de leurs limites théoriques. Pour espérer une amélioration, des technologies en rupture sont désormais nécessaires. Au cours de ces dernières années, les technologies de semi-conducteurs dit « à grand gap », essentiellement à base de Nitrure de Gallium ou de Carbure de Silicium (resp. GaN et SiC) se sont considérablement amélioré et sont d’ores et déjà plus performant que les composants Si dans de nombreux cas. Les semi-conducteurs étant généralement plus performants lorsqu’ils ont une tenue en tension plus faible, on envisage ici de cumuler plusieurs avantages en envisageant la mise en série de composants GaN basse-tension pour améliorer l’intégration des convertisseurs de puissance. Dans un premier temps, un convertisseur multi-niveaux élémentaire de type Flying Capacitor (FlyCap) est mis en oeuvre. Des condensateurs de puissance intégrés sont utilisés, ce qui pourrait permettre de réduire l’empreinte de ces composants et de proposer une dissipation thermique commune par le dessus des composants. L’utilisation de composant au temps de commutation réduit est critique pour la fiabilité des convertisseurs. Une étude de l’influence des paramètres physique du circuit électrique sur les inductances parasites de la maille de puissance et de commande est menée permettant de mettre en évidence des règles de conception dans le but d’améliorer la fiabilité des convertisseurs. Dans un second temps, l’équilibrage dynamique de la topologie FlyCap qui est critique pour les formes d’onde et la sureté de fonctionnement est étudié. La prise en compte des pertes dans les semi-conducteurs permet d’améliorer l’estimation de la dynamique d’équilibrage. Une base de réflexion sur le dimensionnement d’un équilibreur passif est également proposée pour optimiser sa dynamique et les pertes associées. Un prototype expérimental à 5 cellules de commutation est présenté permettant d’atteindre une tension d’entrée de 270 V avec des composants 100V. / Performance, weight, volume, cost and reliability are key criteria to compare converters. Environment and economical context and the development of mobile applications lead electronics to have a wider field of application. Improving performances and tradeoff between conflicting characteristics (high efficiency and reduced weight for example) is thus constantly needed to impose this technology, which calls for design and optimization methods and tools. The specific case of aeronautics is no exception and there is in this field a high demand. Mass and volume reduction, efficiency and reliability improvement is one of the most important challenges, and the change from hydraulic and pneumatic systems to electric systems is expected to allow a global improvement of aircraft performances. Converter’s topology is a good candidate to improve and reduce the size of converters because it can reduce stress while improving the input and/or output waveforms. Meanwhile, conventional silicon components have taken advantage of wide advances in recent decades and are now close to their theoretical limits. To hope for a significant improvement, breaking technologies are now needed. In recent years, GaN and SiC Wide Band Gap semiconductors have seen significant development and are already often better than Si power devices. Lowvoltage semiconductors are generally better than higher voltage ones. Thus, we consider here cumulating advantages with a serial arrangement of low voltage GaN semi-conductors to improve power converter’s integration. First, a basic multilevel Flying Capacitor GaN-based converter is implemented. The integration of power capacitors is proposed to evaluate this technology, which could reduce the footprint of these components and could allow a common heatsink dissipation through the top of the components. Very fast turn-on and turn-off of GaN devices is critical for safe operation due to parasitic inductances. A study of physical parameters of the electrical circuit on parasitic inductances of power and control loop is conducted to lay down design rules in order to improve the reliability of converters. Secondly, dynamic balancing of Flying Capacitor which is critical for the waveforms and reliability is studied. Semi-conductor’s losses are considered to improve the estimation of dynamic balancing. A method for the design of a passive balancer is also proposed to optimize the balancing and associated losses. An experimental prototype with 5 switching cells is presented to achieve an input voltage of 270 V with 100 V rated voltage devices.

In high-power electric drives, multilevel inverters are generally deployed to address issues such as electromagnetic interference, switch voltage stress and harmonic distortion. The switching frequency of the inverter is always kept low, of the order of 1KHz or even less to reduce switching losses and synchronous pulse width modulation (PWM) is used to avoid the problem of sub-harmonics and beat frequencies. This is particularly important if the switching frequency is very low. The synchronous PWM is getting popularity as its realization is very easy with digital controllers compared to analog controllers. Neutral-point-clamped (NPC) inverters, cascaded H-bridge, and flying-capacitor multilevel inverters are some of the popular schemes used for high-power applications. Hybrids of these multilevel inverters have also been proposed recently to take advantage of the basic configurations. Multilevel inverters can also be realized by feeding the induction motor from both ends (open-end winding) using conventional inverter structures. For controlling the output voltage of these inverters, various PWM techniques are used. Chapter-1 of this thesis provides an over view of the various multilevel inverter schemes preceded by a discussion on basic two-level VSI topology. The inverters used in motor drive applications have to be operated in over-modulation range in order to extract the maximum fundamental output voltage that is possible from the dc-link. Operation in this high modulation range is required to meet temporary overloads or to have maximum power operation in the high speed range (flux weakened region). This, however, introduces a substantial amount of low order harmonics in the Motor phase voltages. Due to these low-order harmonic frequencies, the dynamic performance of the drive is lost and the current control schemes are severely affected especially due to 5th and 7th harmonic components. Further, due to these low-order harmonics and non-linear PWM operation in over-modulation region, frequent over-current fault conditions occur and reliability of the drive is jeopardized. The twelve sided-polygonal space vector diagram (dodecagonal space vectors) can be used to overcome the problem of low order 5th and 7th harmonics and to give more range for linear modulation while keeping the switching frequency at a minimum compared to conventional hexagonal space vector based inverters. Thus, the dodecagonal space-vector switching can be viewed as an engineering compromise between low switching frequency and quality load current waveform. Most of the previous works of dodecagonal space-vector generation schemes are based on NPC inverters. However, sophisticated charge control schemes are required in NPC inverters to deal with the neutral-point voltage fluctuation and the neutral-point voltage shifting issues. The losses in the clamping diodes are another major concern. In the second chapter, a multilevel dodecagonal space-vector generation scheme based on flying capacitor topology, utilizing an open end winding induction motor is presented. The neutral point charge-balancing problem reported in the previous works is not present in this scheme, the clamping diodes are eliminated and the number of power supplies required has been reduced. The capacitors have inherent charge balancing capability, and the charge control is done once in every switching cycle, which gives tight voltage control for the capacitors. For the speed control of induction motors, the space-vector PWM scheme is more advantageous than the sine-triangle PWM as it gives a more linear range of operation and improved harmonic performance. One major disadvantage with the conventional space-vector PWM is that the trigonometric operations demand formidable computational efforts and look-up tables. Carrier based, common-mode injected PWM schemes have been proposed to simplify the PWM process. However, the freedom of selecting the PWM switching sequences is limited here. Another way of obtaining SVPWM is using the reference voltage samples and the nearest vector information to switch appropriate devices for proper time intervals, realizing the reference vector in an average sense. In-formation regarding the sector and nearest vectors can be easily obtained by comparing the instantaneous amplitudes of the reference voltages. This PWM approach is pro-posed for the speed control of the motor in this thesis. The trigonometric operations and the requirement of large look-up tables in the conventional SVPWM are avoided in this method. It has the additional advantage that the switching sequences can be decided at will, which is helpful in reducing further, the harmonic distortion in certain frequency ranges. In this way, this method tries to combine the advantages of vector based methods (conventional SVPWM) and scalar methods (carrier-based methods). The open-end winding schemes allowed the required phase voltage levels to be generated quite easily by feeding from both ends of the windings. Thus, most of the multilevel inverters based on dodecagonal space-vector structures relied on induction motors with open-end windings. The main disadvantage of open-end winding induction motor is that six wires are to be run from the inverter to the motor, which may be unacceptable in certain applications. Apart from the inconvenience of laying six wires, the voltage reflections in the wires can lead to over voltages at the motor terminals, causing insulation failures. Where as the topology presented in chapter-2 of this thesis uses open-end winding motor with flying-capacitor inverters for the generation of dodecagonal space-vectors, the topology presented in chapter-3 utilizes a cascade connection of flying-capacitors and floating H-bridge cells to generate the same set of voltage space-vectors, thus allowing any standard induction motor as the load. Of the methods used for the speed control of induction motors, namely sine-triangle PWM and space vector PWM, the latter that provides extra modulation range is naturally preferred. It is a well-understood fact that the way in which the PWM switching sequences are applied has a significant influence on the harmonic performance of the drive. However, this topic has not been addressed properly for dodecagonal voltage space-vector based multilevel inverter drives. In chapter-4 of the thesis, this aspect is taken into ac-count and the notion of “harmonic flux trajectories” and “stator flux ripple” are used to analyze the harmonic performance of the various PWM switching schemes. Although the PWM method used in this study is similar to that in chapter-2, the modification in the PWM switching sequence in the PWM algorithm yields significant improvements in harmonic performance. The proposed topologies and PWM schemes are extensively simulated and experimentally verified. The control scheme was implemented using a DSP processor running at a clock frequency 150MHz and a four-pole, 3.7kW, 50Hz, 415V three-phase induction motor was used as the load. Since the PWM ports are limited in a DSP, a field-programmable gate array (FPGA) was used to decode the PWM signals from the DSP to generate timing information required for PWM sequencing for all the power devices. The same FPGA was used to generate the dead-time signals for the power devices also.

Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suffer from high harmonic content. Multilevel inverters have multiple DC voltage levels with switches that enable one of the voltage steps to be applied to the load. Due to decrease in step size during each switching instant, output voltages and currents of the multilevel inverters have considerably less harmonic content. As the number of levels increase, the switching step reduces thereby the harmonic content also reduces drastically. Due to their advantages, multilevel inverters have gained lot of acceptance in the industry even at lower voltages. The three main configurations that have gained popularity are the neutral point clamped converter, the flying capacitor converter and the cascaded H-bridge converter. Each converter has its own set of advantages and disadvantages. Based on the requirements of various applications, it is possible to fabricate hybrid multilevel topologies that are combinations of the three basic topologies. Researchers around the world have proposed several such converters for diverse applications so as to suit particular requirements like modularity, ease of control, improved reliability, fault tolerant capability etc. The present thesis explores multilevel converters with single DC link to be used for motor drive and grid connected applications. A novel five-level inverter topology formed by cascading a floating capacitor H-bridge module to a regular three-level flying capacitor inverter has been explored in chapter 2. The three-level flying capacitor inverter can generate pole voltages of 0, VDC /2 and VDC . By cascading it with another floating capacitor H-bridge of voltage magnitude VDC /4, pole voltages of 0, VDC /4, VDC/2, 3VDC /4 and VDC . Each of these pole voltage levels can have one or more switching combinations. However each switching combination has a unique effect on the state of the two capacitor voltages. By switching through redundant switching combinations for the same pole voltage, the two capacitors present in each phase can be balanced. The proposed topology also has an advantage that if one of the devices in the H-bridge fails, the topology can still be operated as a regular three-level flying capacitor inverter that can supply full load at rated power by bypassing the faulty H-bridge. This fault tolerant operation of the converter will enable it to be used in applications like traction and marine drives where high reliability is needed. The proposed converter needs a single DC link. All the required voltage levels can be generated from the single DC link. This enables back to back grid connected operation possible where multiple converters can interact with a single DC link. Various pole voltage switching combination and its effect on individual capacitor has been studied. A control algorithm to balance the capacitor voltages by switching through multiple redundancies for the same pole voltage has been developed. The proposed configuration has been implemented in hardware using IGBT H-bridge modules and the control circuitry is realized using DSP and FPGA. The performance of the drive is verified for various frequencies and modulation indices during steady state by running a three phase induction motor at no load. The stability of the drive during transients has been studied by accelerating the machine suddenly at no load and analyzing the performance of the drive. The capacitor voltages are made to deviate from their intended values and the capacitor balancing algorithm has been verified for its ability to bring the capacitor voltages back to their intended values. The experimental results have been presented and discussed in detail in the chapter 2. In the third chapter a common-mode voltage eliminated three-level inverter using a single DC link has been proposed. The power schematic is similar to the one presented in chapter 2. In this chapter the space vector polygon formed by the three phases of the proposed topology has been presented. The common-mode voltage generated by different pole voltage combinations for same space vector location and the redundant switching state combinations has been studied. The pole voltage combinations with zero common mode voltage have been studied. The switching state redundancies for the the pole voltage have been studied. The space vector polygon formed with the pole voltage combinations has been analyzed. A drive is made with the proposed common-mode voltage eliminated inverter. The performance of the drive is tested for various modulation indices and frequencies by running a three phase squirrel cage induction motor at no load. The transient performance is verified by accelerating the motor suddenly and checking the common-mode voltage along with the capacitor voltages. The results have been presented and discussed in detail in chapter 3. This converter has advantages like use of single DC supply, ability to operate as a regular three level converter in case of failure of one of the H-bridges. The work presented in fourth chapter proposes a novel three phase 17-level inverter configuration which utilizes a single DC supply. The rest of voltages are generated using three floating capacitor H-bridges. The redundant switching combinations for generating various pole voltages and their effect on the capacitors have been studied and suitable capacitor balancing algorithm has been developed. The proposed topology has been realized in hardware and the performance of the drive during steady state has been studied by running an induction motor at various modulation indices and frequencies. The transient response of the drive has been observed by accelerating the motor suddenly under no load. The results have been presented in detail in chapter four. This configuration also needs a single DC link. The advantages of this configuration is in case of failure of any devices in the H-bridge, the drive can be operated at reduced number of levels while supplying full load current. This feature helps the drive to be used in fault tolerant applications like marine and traction drives where reliability of the drive is of prime importance. All the topologies that have been presented in the previous chapters have mentioned about the usage of the proposed genre of topologies use single DC link and hence will enable back to back grid tied inverter connection. In the fifth chapter this has has been verified experimentally. The three phase squirrel cage induction motor is driven by using the seventeen-level inverter drive proposed in chapter four. A five-level active front-end is realized by the converter topology proposed in chapter two. The converter is run and the performance of the drive is studied at various modulation indices and speeds of the motor. Various aspects like re-generation operation, acceleration and other aspects of the drive have been studied experimentally and the results are presented in detail. For experimental setup, Semikron SKM75GB12T4 IGBT modules have been used to realize the power topology. These IGBTs are driven by M56972L drivers. The control circuit is realized using TMS320F2812 DSP along with Xilinx Spartan 3 FPGA (XC3S200) has been used. The voltages and currents are sensed using LEM LV-20P and LA 55-P hall effect based sensors.

This thesis describes the flexible voltage control of a multi-level-voltage-reinjection voltage source converter. The main purposes are to achieve reactive power generation flexibility when applied for HVdc transmission systems, reduce dynamic voltage balancing for direct series connected switches and an improvement of high power converter efficiency and reliability. Waveform shapes and the impact on ac harmonics caused by the modulation process are studied in detail. A configuration is proposed embracing concepts of multi level, soft-switching and harmonic cancellation. For the configuration, the firing sequence, waveform analysis, steady-state and dynamic performances and close-loop control strategies are presented. In order not to severely compromise the original advantages of the converter, the modulated waveforms are proposed based on the restrictions imposed mathematically by the harmonic cancellation concept and practically by the synthesis circuit complexity and high switching losses. The harmonic impact on the ac power system prompted by the modulation process is studied from idealistic and practical aspects. The circuit topology being proposed in this thesis is developed from a 12-pulse bridge and a converter used classically for inverting power from separated dc sources. Switching functions are deduced and current paths through the converter are analysed. Safe and steady-state operating regions of the converter are studied in phasor diagrams to facilitate the design of simple controllers for active power transfer and reactive power generations. An investigation into the application of this topology to the back-to-back VSC HVdc interconnection is preformed via EMTDC simulations.