京都大学 / 0048 / 新制・課程博士 / 博士(情報学) / 甲第20033号 / 情博第628号 / 新制||情||109(附属図書館) / 33129 / 京都大学大学院情報学研究科通信情報システム専攻 / (主査)教授 髙木 直史, 教授 小野寺 秀俊, 教授 佐藤 高史 / 学位規則第4条第1項該当 / Doctor of Informatics / Kyoto University / DFAM

No description available.

There exists a need to promote better Science Technology Engineering and Math (STEM) education at the high school level. To satisfy this need a series of hands-on laboratory assignments were created to be accompanied by 2 educational trainers that contain various electronic components. This project provides an interdisciplinary, hands-on approach to teaching C programming that meets several standards defined by the Tennessee Board of Education. Together the trainers and lab assignments also introduce key concepts in math and science while allowing students hands-on experience with various electronic components. This will allow students to mimic real world applications of using the C programming language while exposing them to technology not currently introduced in many high school classrooms. The developed project is targeted at high school students performing at or above the junior level and uses the Arduino Mega open-source Microprocessor and software as the primary control unit.

Particle suspension is a phenomenon when solid particles get trapped in a liquid. This phenomenon is a common occurrence in the water treatment industry. It is typically measured continuously throughout the treatment process to ultimately ensure high water-quality. Cerlic Controls AB specializes in developing sensors for the water treatment industry and have been doing so since 1977. Cerlic Control's sensors are used within the various stages of water-purification. The type of sensor central to this project uses transmission of light to determine a concentration of suspended particles. This project describes the development-process for one of Cerlic Controls existing embedded systems. The embedded system is undergoing a modernization process where the electronics and software are updated to a more modern design. This report describes the improvements to the measurement range while maintaining the same or improved resolution. These improvements are mostly performed by modern electronics and more advanced signal processing techniques in comparison to the previous implementation. A large portion of the previous implementation's software was split over two embedded systems due to limitations in processing power. This modern version focuses on bringing these two systems into one. The sensor's microprocessor has been replaced with a more modern higher performance alternative which allows all computations to be performed in the sensor. Linearity and stability are key aspects defining system performance. Optical filters block a certain amount of light and are heavily used in verification of performance. Suspensions using activated carbon were also used to evaluate the measurement range. The results of the project were largely successful. An initial implementation was achieved with optimistic results, but further work must be done before the sensor is ready for use in industry.

Ramp descent is a demanding task for trans-tibial amputees, due to the difficulty in controlling body weight progression over the prosthetic foot. A deeper understanding of the impact of foot function on ramp descent biomechanics is required to make recommendations for rehabilitation programs and prosthetic developments for lower-limb amputees. The thesis aim was to determine the biomechanical adaptations made by active unilateral trans-tibial amputees (TT) using a microprocessor-controlled ankle-foot prosthesis in active (MC-AF) compared to non-active mode (nonMC-AF) or elastically articulated ankle-foot device. A secondary aim was to determine the biomechanical adaptation made by able-bodied individuals when ankle motion was restricted using a custom made ankle-foot-orthosis and provide further insight into the importance of ankle dynamics when walking on ramps. Kinetic and kinematic data were recorded from nine TT’s and twenty able-bodied individuals. Able-bodied participants, ankle restriction, led to an increase in involved limb loading response knee flexion that is accompanied by the increased knee power generation during the single-limb-support phase that correlates to TTs results. TT’s use of an MC-AF reduced the ‘plantar-flexion’ resistance following foot contact allowing foot-flat to be attained more quickly. Followed by the increased ‘dorsi-flexion’ resistance which reduced the shank/pylon rotation velocity over the support foot, leading to an increase in negative work done by the prosthesis. These findings highlight the importance of having controlled ankle motion in ramp descent. Use of an MC-AF can provide TTs controlled motion for descending ramps and hence provide biomechanical benefits over using more conventional types of ankle-foot devices. / Engineering and Physical Science Research Council (EPSRC) via Doctoral Training Account (DTA) (EP/P504821/1) Chas. A. Blatchford and Sons Ltd., Basingstoke, UK provided the prosthetic hardware, prosthetist support, and facilitated the attendance of the TT participants for this study

Asynchronous design is a possible alternative design methodology that has the ability to alleviate issues associated with clock skew, power dissipation, and process and environmental variability among transistors, issues encountered in typical synchronous design methodologies. This investigation studies the implementation of two asynchronous models of the Texas Instruments MSP430 processor family using a logic system known as Null Convention Logic (NCL). The study also investigates two design styles of NCL: the data-driven and control-driven design styles. This example and others show that although there are tradeoffs in chip area and performance, the control-driven design style is a viable methodology that can lead to designs that are low in energy usage. The openMSP430 processor project is the baseline for the investigation as it is a mature open-source project. Silicon-proven multiple times and fully synthesizable, it parallels the original Texas Instruments family nearly cycle for cycle. UNCLE (Unified NCL Environment) is a toolset used to create comparable implementations of the openMSP430 architecture that are data-driven and control-driven in nature. This investigation shows that the control-driven implementation has a slightly larger chip area due to the complexity of the control path and its effects on the data path. While the control path has a lower area than the data-driven model due to area optimization, the data path of the control-driven version is larger than that of the data-driven model. Because of these issues of complexity in both the control and data paths, the performance of the model suffers as well, degrading from the already poor performance of the traditional data-driven NCL model. Along with the increase in chip area and the decrease in performance, the control-driven model sees a 50.2% average decrease in energy usage as compared to the data-driven model. As with most design choices in engineering, there are tradeoffs when using either design style of NCL. This investigation serves to allow designers to make a well-informed decision when deciding between the two.

No description available.

Near Field Communication (NFC) är en trådlös kommunikationsteknik för korta avstånd, vanligast med cirka 10 cm vilket medför en säkrare förbindelse. NFC är en relativt ung teknologi som är billig att implementera samt användarvänlig. NFC är lämpad främst för mobiltelefoner där en bred implementering av applikationer är möjlig. Tekniken medför snabbare och enklare utbyte av information genom att ställa enheter sida vid sida. I dagsläget används tekniken mest i Asien. I Europa har ingen stor satsning påbörjats än, men den är på väg. I framtiden förväntas det att NFC kommer att finnas i de flesta mobiltelefoner.Denna uppsats behandlar praktisk implementering av en ”verktygslåda” med NFC teknologi. Målet är att skapa en ”verktygslåda” med olika komponenter. ”verktygslådan” är tänkt att användas som grundskelett för implementering av NFC applikationer och för experiment med de olika komponenterna. Hårdvarukomponenterna består av mobiltelefon, tagg, RFID läsarmodul och mikroprocessor. Programvarukomponenterna består av ett antal kodexempel.Vårt arbete har resulterat i tre prototyper som tillsammans utgör ”verktygslådan”. I prototyperna sker kommunikation mellan en kombination av komponenter i ”verktygslådan”: mobiltelefon och tagg, läsare och tagg samt läsare och mobiltelefon. / Near Field Communication (NFC) is a contactless short distance (approximately 10 centimeters) communication technology, which conveys a more secure connection. NFC is a relatively young technology which is cheap to implement, and user-friendly. NFC is directed to mainly cellphones, where opportunities for implementation of applications are wide. The technology conveys a faster and easier exchange of information, by putting units side by side. At present, the technology is used mostly in Asia. In Europe, no major effort has begun yet, but is expected to. NFC is expected to exist in a majority of cellphones, in the future.This essay treats practical implementation of a “toolbox” with the NFC technology. The goal was to make a “toolbox” with different components. The “toolbox” is intended as a base for implementing NFC applications and for experimenting with the different components. The hardware components are: cellphone, a tag, a RFID module and a microprocessor. The program components consist of a number of code examples.Our work has resulted in three prototypes which together constitute a “toolbox”. The prototypes communicate between any combinations of the components in the “toolbox”: cellphone with tag, reader with tag and reader with cellphone.

This dissertation addresses two important problems in reusing intellectual properties (IPs) in the form of reusable design or verification components. The first problem is associated with fast and effective integration of reusable design components into a System-on-chip (SoC), so faster design turn-around time can be achieved, leading to faster time-to-market. The second problem has the same goals of faster product design cycle, but emphasizes on verification model reuse, rather than design component reuse. It specifically addresses reuse of reusable verification IPs to enable a "write once, use many times" verification strategy. This dissertation is accordingly divided into part I and part II which are related but describe the two problems and our solutions to them. These two related but distinctive problems faced by system design companies have been tackled through a unique approach which hither-to-fore only have been used in the software engineering domain. This approach is called metamodeling, which allows creating customized meta-language to describe the syntax and semantics for a modeling domain. It provides a way to create, transform and analyze domain specific languages, which are themselves described by metamodels, and the transformation and processing of models in such languages are also described by metamodels. This makes machine based interpretation and translation from these models an easier and formal task. In part I, we consider the problem of rapid system-level model integration of existing reusable components such that (i) the required architecture of the SoC can be expressed formally, (ii) automatic selection of components from an IP library to match the need of the system being integrated can be done, (iii) integrability of the components is provable, or checkable automatically, and (iv) structural and behavioral type systems for each component can be utilized through inferencing and matching techniques to ensure their compatibility. Our solutions include a component composition language, algorithms for component selection, type matching and inferencing algorithms, temporal property based behavioral typing, and finally a software system on top of an existing metamodeling environment. In part II, we use the same metamodeling environment to create a framework for modeling generative verification IPs. Our main contributions relate to INTEL's microprocessor verification environment, and our solution spans various abstraction levels (System, architectural, and microarchitecture) to perform verification. We provide a unified language that can be used to model verification IPs at all abstraction levels, and verification collaterals such as testbenches, simulators, and coverage monitors can be generated from these models, thereby enhancing reuse in verification. / Ph. D.

This thesis is an attempt to explore post industrial society and how modern industry can become part of the urban experience. Through the design of a nanotechnology research laboratory, I was able to discover a connection between modern architecture and nanotechnology which revolved around the topics of scale, layering and revealing. / Master of Architecture