Organic thin film transistors (TFT) are an attractive option for low cost electronic applications and may be used for active matrix displays and for RFID applications. To extend the range of applications there is a need to develop and optimise the performance of non-volatile memory devices that are compatible with the solution-processing fabrication procedures used in plastic electronics. A possible candidate is an organic TFT incorporating the ferroelectric co-polymer poly(vinylidenefluoride-trifluoroethylene)(P(VDF-TrFE)) as the gate insulator. Dielectric measurements have been carried out on all-organic metal-insulator-semiconductor structures with the ferroelectric polymer poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) as the gate insu-lator. The capacitance spectra of MIS devices, were measured under different biases, showing the effect of charge accumulation and depletion on the Maxwell-Wagner peak. The position and height of this peak clearly indicates the lack of stable depletion behavior and the decrease of mobility when increasing the depletion zone width, i.e. upon moving into the P3HT bulk. The lack of stable depletion was further investigated with capacitance-voltage (C-V) measurements. When the structure was driven into depletion, C-V plots showed a positive flat-band voltage shift, arising from the change in polarization state of the ferroelectric insulator. When biased into accumulation, the polarization was reversed. It is shown that the two polarization states are stable i.e. no depolarization occurs below the coercive field. However, negative charge trapped at the semiconductor-insulator interface during the depletion cycle masks the negative shift in flat-band voltage expected during the sweep to accumulation voltages. The measured output characteristics of the studied ferroelectric-field-effect transistors confirmed the results of the C-V plots. Furthermore, the results indicated a trapping of electrons at the positively charged surfaces of the ferroelectrically polarized P(VDF-TrFE) crystallites near the insulator/semiconductor in-terface during the first poling cycles. The study of the MIS structure by means of thermally stimulated current (TSC) revealed further evidence for the stability of the polarization under depletion voltages. It was shown, that the lack of stable depletion behavior is caused by the compensation of the orientational polarization by fixed electrons at the interface and not by the depolarization of the insulator, as proposed in several publications. The above results suggest a performance improvement of non-volatile memory devices by the optimization of the interface. / Organische Transistoren sind besonders geeignet für die Herstellung verschiedener preisgünstiger, elektronischer Anwendungen, wie zum Beispiel Radio-Frequenz-Identifikations-Anhänger (RFID). Für die Erweiterung dieser Anwendung ist es notwendig die Funktion von organischen Speicherelementen weiter zu verbessern. Das ferroelektrische Polymer Poly(vinylidene-Fluoride-Trifluoroethylene) (P(VDF-TrFE)) eignet sich besonders gut als remanent polarisierbarer Isolator in Dünnschich-Speicherelementen. Um Schalt- und Polarisationsverhalten solcher Speicherelemente zu untersuchen, wurden P(VDF-TrFE)-Kondensatoren und Metall-Halbleiter-Isolator-Proben sowie ferroelektrische Feld-Effekt-Transistoren (Fe-FET) aus dem Halbleiter Poly(3-Hexylthiophene) (P3HT) und P(VDF-TrFE) hergestellt und dielektrisch untersucht. Die Charakterisierung der MIS-Strukturen mittels spannungsabhängiger Kapazitätsspektren machte deutlich, dass es nicht möglich ist, einen stabilen Verarmungzustand (Aus-Zustand) zu realisieren. Kapazität-Spannungs-Messungen (C-V) an MIS-Proben mit uni/bi-polaren Spannungszyklen zeigten eine stabile ferroelektrische Polarisation des P(VDF-TrFE)-Films. Eine Depolarisation des Isolators durch den Mangel an Minoritäts-Ladungsträgern konnte als Grund für die Instabilität des Verarmungs-Zustandes ausgeschlossen werden. Die C-V-Kurven wiesen vielmehr auf die Existenz fixierter, negativer Ladungsträger an der Grenzfläche hin. Zusammenfassend kann festgestellt werden: die Ursache der Ladungsträgerinstabilitäten in organischen ferroelektrischen Speicherelementen ist auf die Kompensation der ferroelektrischen Orientierungspolarisation durch "getrappte"(fixierte) negative Ladungsträger zurückzuführen. Dieses Ergebnis liefert nun eine Grundlage für die Optimierung der Isolator/Halbleiter-Grenzfläche mit dem Ziel, die Zahl der Fallenzustände zu minimieren. Auf diesem Wege könnte die Stabilität des Speicherzustandes in organischen Dünnschichtspeicherelementen deutlich verbessert werden.

The aim of this work was to find a correlation between the electrical, optical and microstructural properties of thin SiO2 layers containing group IV nanostructures produced by ion beam synthesis. The investigations were focused on two main topics: The electrical properties of Ge- and Si-rich oxide layers were studied in order to check their suitability for non-volatile memory applications. Secondly, photo- and electroluminescence (PL and EL) results of Ge-, Si/C- and Sn-rich SiO2 layers were compared to electrical properties to get a better understanding of the luminescence mechanism.

Nanokristalle werden beispielsweise für eine Anwendung in Solarzellen, Lichtemittern und nichtflüchtigen Datenspeichern diskutiert. Damit diese Anwendungen funktionieren können, ist eine genaue Kontrolle der Kristallitgröße sowie der Flächendichte und Lage der Kristallite in der Matrix wichtig. Zudem sollte die Matrix amorph sein, da amorphe Matrixmaterialien die Nanokristall-Oberfläche besser passivieren und beständiger gegen Leckströme sind. In dieser Arbeit werden Ge-Nanokristalle in die Hoch-Epsilon-Dielektrika ZrO2 und TaZrOx eingebettet. Im System Ge/ZrO2 kristallisieren die Ge-Cluster und die ZrO2-Matrix bei der gleichen Temperatur. Aufgrund der kristallinen Matrix weicht die Form der Ge-Nanokristalle von einer Kugel ab, worunter unter anderem die Größenkontrolle leidet. Die Beimischung von Ta2O5 stabilisiert die amorphe Phase des ZrO2 und verhindert dadurch die gemeinsame Kristallisation. Dadurch wird es im System Ge/TaZrOx möglich, kugelförmige Ge-Nanokristalle im Größenbereich von 3 nm bis 6 nm positionskontrolliert in eine amorphe Matrix einzubetten. Für die Untersuchung einer möglichen Anwendung des Materialsystems wurden Speicherzellen eines nichtflüchtigen Datenspeichers auf Basis von Ge-Nanokristallen hergestellt. Dabei zeigte sich, dass das System Ge/TaZrOx überdurchschnittlich viele Ladungen speichert und daher für diese Anwendung vielversprechend ist. Zudem stabilisiert die Beimischung von Ta2O5 eine extrem seltene orthorhombische Modifikation des ZrO2. Für ferroelektrische Datenspeicher könnte diese Phase eine aussichtsreiche Alternative zum HfO2 sein.

Les mémoires vives à changement de résistance (ReRAM de l'anglais Resistive Random Access Memories) attirent fortement l'attention car elles sont considérées comme unes des plus prometteuses pour la prochaine génération de composants. Ceci est du à leurs basse consommation de puissance, leurs vitesse de commutation élevée et leurs potentiel pour devenir une mémoire à haute densité compatible avec la technologie CMOS. Ces mémoires se basent sur l'effet de commutation résistive (RS de l'anglais resistive switching) qui est un changement réversible de la résistivité contrôlé par un champ électrique externe. Il a été proposé que le RS soit couplé avec la migration de lacunes d'oxygène qui permet de générer, de façon réversible, un canal de conduction dans l'oxyde. Plusieurs expériences ont été menées pour élucider les mécanismes de la commutation pendant les dernières années sans aucune conclusion définitive sur le mécanisme sous jacent au RS. Le principal objectif de ce travail est de comprendre les mécanismes physiques qui contrôlent le RS et de pointer quels sont les paramètres clés qui pourraient améliorer la performance des dispositifs d'un point de vue technologique. Dans cette mémoire nous présentons des études de RS dans différentes interfaces métal/oxyde en utilisant de l'or, de l'argent et du platine comme métaux et des oxydes complexes : YBa2Cu3O7–δ (YBCO), La0.67Sr0.33MnO3 (LSMO) et La0.7Sr0.3CoO3 (LSCO). Ces oxydes ont été choisis car ce sont des systèmes à électrons fortement corrélés ayant des propriétés physiques qui dépendent fortement de la Stœchiométrie d'oxygène. Ils ont une structure similaire (type pérovskite) et une haute mobilité d'oxygène. Nous avons réalisé la validation du principe de fonctionnement pour chaque type de jonction et expliqué le RS en utilisant un modèle de diffusion de lacunes d'oxygène assisté par champ électrique. Nous avons caractérisé ensuite le mécanisme de conduction des jonctions qui suit une conduction dominé par un effet Poole-Frenkel dans YBCO et par un mécanisme type SCLC dans LSCO. La faisabilité des dispositifs de mémoire dans ces jonctions a été testée atteignant des répétitivités élevées avec une consommation de puissance optimale avec plus de 103 commutations RS réussies. Nous avons également étudié l'effet d'accumulation d'impulsions électriques cycliques d'amplitude croissante sur l'état de résistance de la mémoire non-volatile de la jonction. On a trouvé une relation entre l'amplitude du RS et le nombre d'impulsions appliquées pour une amplitude et une température fixées. Cette relation est similaire à l'équation de Basquin qui décrit la loi d'endommagement dans les essais mécaniques de fatigue reliant la contrainte appliquée au nombre de répétitions de la sollicitation (temps de vie). Ceci fait ressortir la similarité de la physique du RS et de la propagation de défauts dans les matériaux soumis à des contraintes mécaniques cycliques. Finalement, nous avons analysé l'évolution temporelle de l'état résistif rémanent dans l'interface oxyde-métal. Le temps de relaxation peut se décrire par une loi exponentielle étendue qui est caractérisée par un exposant d'étirement près de 0.5. Nous trouvons que les temps caractéristiques augmentent avec la température et la puissance appliquée ce qui veut dire que ce n'est pas un phénomène classique d'activation thermique. Les résultats mettent clairement en évidence la relation entre le RS et la diffusion de lacunes d'oxygène dans une surface avec une densité de pièges dépendante de la température et qui peut correspondre physiquement à la diffusion aux joints de grains. / Resistive Random Access Memories (RRAM) have attracted significant attention recently, as it is considered as one of the most promising candidates for the next generation of non-volatile memory devices. This is due to its low power consumption, fast switching speed and the ability to become a high density memory compatible with the conventional CMOS processes. The working principle of this kind of memories is the resistive switching (RS) which is simply the controlled reversible change in the resistivity of a junction generated by an external electric field. It has been proposed that the RS is coupled with the migration of oxygen vacancies generating a reversible conduction path inside the oxide. Many experiments have been done to address the switching mechanism during the last decade without any conclusive answer of what is the physical mechanism beneath the RS. The main goal of the present work it's to understand the physical mechanism that control the RS and to point out which are the key parameters that can help improve the performance of the memory devices from a technological point of view. In this dissertation we report on the studies of the RS in different interfaces metal/oxide where we have utilized gold, silver and platinum as metal and as complex oxides: YBa2Cu3O7–δ (YBCO), La0.67Sr0.33MnO3 (LSMO) y La0.7Sr0.3CoO3 (LSCO). This oxides have been chosen because all of them are strongly correlated compounds with physical properties strongly dependent of their oxygen stoichiometry. They also have a similar crystalline structure (perovskite type) and a high oxygen mobility. We realized the proof of concept for each type of junction successfully and explain the RS effect and explained the RS utilizing an electric assisted diffusion of oxygen vacancies model. We characterized them the conduction mechanism of the junctures with a conduction dominated by the Poole-Frenkel effect in the YBCO and by the SCLC mechanism in the LSCO. The feasibility of the memory devices in this junctions have been tested reaching high repeatability with optimize power consumption with more than 103 successful switching events. We have also studied the effects of accumulating cyclic electrical pulses of increasing amplitude on the non-volatile resistance state of the junctions. We have found a relation between the RS amplitude and the number of applied pulses, at a fixed amplitude and temperature. This relation remains very similar to the Basquin equation use to describe the stress-fatigue lifetime curves in mechanical tests. This points out to the similarity between the physics of the RS and the propagation of defects in materials subjected to repeated mechanical stress. This relation can be used as the basis to build an error correction scheme. Finally, we have analyzed the time evolution of the remnant resistive state in the oxide-metal interfaces. The time relaxation can be described by a stretched exponential law that is characterized by a power exponent close to 0.5. We found that the characteristic time increases with increasing temperature and applied power which means that this is not a standard thermally activated process. The results are a clear evidence of the relation between RS and the diffusion of oxygen vacancies on a two-dimensional surface with a temperature-dependent density of trapping centers, which may correspond, physically, to the diffusion along grain boundaries. / Las memorias resistivas están entre los principales candidatos a ser utilizados como elementos en una nueva generación de memorias no volátiles. Esto se debe a su bajo consumo energético, una alta velocidad de lectura/escritura y a la posibilidad de lograr memorias de alta densidad compatibles con los procesos de la tecnología CMOS actual (por sus siglas en inglés: Complementary Metal–Oxide–Semiconductor).El funcionamiento de estas memorias se basa en la conmutación resistiva (CR), que consiste en el cambio controlado de la resistencia de una interfase metal-óxido a través de estímulos eléctricos. Si bien hasta el presente no se ha podido determinar con certeza el mecanismo físico que controla la CR, se piensa que está basado en el movimiento de vacancias de oxígeno que formarían de manera reversible zonas de alta/baja conducción dentro del óxido.La presente tesis tiene como objetivo principal entender los mecanismos físicos que gobiernan a la CR y poner en evidencia algunos de los aspectos esenciales que pueden contribuir a lograr dispositivos útiles desde el punto de vista tecnológico.Para ello se han realizado estudios de las características principales de la CR para distintas interfases metal-óxido a distintas condiciones de temperatura. Se han utilizado Au, Pt y Ag como metales y los siguientes óxidos complejos YBa2Cu3O7–δ (YBCO), La0.67Sr0.33MnO3 (LSMO) y La0.7Sr0.3CoO3 (LSCO). Se han elegido estos óxidos complejos debido a que presentan características similares, como ser materiales fuertemente correlacionados con una estructura cristalina tipo perovskita y una alta movilidad de oxígenos, lo que afecta muchas de sus propiedades físicas, ya que dependen fuertemente de la estequiometría.Nuestros resultados han demostrado la existencia de una CR bipolar en todos estos sistemas. Ésta es explicada satisfactoriamente a través de un modelo de difusión de vacancias de oxígeno asistidas por campo eléctrico.Se han caracterizado las interfases como dispositivos de memoria, estudiando sus mecanismos de conducción, encontrándose una conducción dominada por un mecanismo del tipo Poole-Frenkel para la muestra de YBCO y una conducción del tipo SCLC para el LSCO y el LSMO. Adicionalmente, se ha conseguido una alta durabilidad y repetitividad en el funcionamiento de estas junturas como dispositivos de memoria,vgracias a la optimización en el protocolo utilizado para escribir/borrar, lográndose más de 103 conmutaciones consecutivas sin fallas en dispositivos bulk.También se ha estudiado el efecto de la acumulación de pulsos idénticos en las interfases obteniéndose una relación entre la amplitud de la CR y el número de pulsos aplicado a amplitud y temperatura fijas. Luego de someter la interfase a ciclos de fatiga eléctrica, se ha encontrado una similitud entre la evolución de la resistencia remanente en esta con la propagación de defectos en un metal sometido a pruebas de fatiga mecánica. Esta relación puede ser usada como base para generar un algoritmo de corrección de errores y para mejorar la efectividad y el consumo de energía de estos dispositivos de memoria.Finalmente, se han realizado estudios sobre la evolución temporal de cada estado de resistencia. Hemos demostrado que sigue una ley exponencial estirada con un exponente cercano a 0.5 y un tiempo característico dado, que depende tanto de la temperatura como de la potencia utilizada. Estos resultados implican que la evolución temporal no está dominada por un proceso estándar de difusión térmicamente activado. La difusión de vacancias de oxígeno ocurre en una superficie con una densidad de trampas que depende de la temperatura, donde dicha superficie correspondería físicamente a los bordes de grano del óxido.

Les mémoires résistives PCRAM sont basées sur le passage rapide et réversible entre un état amorphe hautement résistif et un état cristallin faiblement résistif d’un matériau à changement de phase (PCM). Ces mémoires constituent un des candidats les plus prometteurs pour la nouvelle génération de mémoires non-volatiles grâce à un large éventail de propriétés uniques comme une vitesse de fonctionnement élevée, une capacité de stockage multi-niveaux sur plusieurs bits, une bonne endurance et une possibilité de miniaturisation poussée. Cependant, la nécessité d’utiliser des courants d’effacement (IRESET) importants pour l’étape d’amorphisation du PCM représente l’un des principaux freins à l’explosion de la technologie PCRAM sur le marché des mémoires non volatiles. Dans ce contexte, il a été démontré que le confinement du PCM dans des structures possédant des facteurs de forme élevés permet d’améliorer l’efficacité du chauffage nécessaire au changement de phase du PCM et donc de réduire les courants d’amorphisation. Afin d’incorporer des matériaux PCM dans de telles structures, il est alors nécessaire de développer un procédé de dépôt très conforme. C’est pourquoi un procédé de dépôt PE-MOCVD (Plasma Enhanced- Metal Organic Chemical Vapor deposition) à injection liquide pulsée a été développé dans ce travail. Dans un premier temps des films amorphes et homogènes du composé binaire GeTe ont été déposés à partir des précurseurs organométalliques TDMAGe et DIPTe. Les analyses XPS révèlent que les couches de GeTe déposées sont stoechiométriques mais présentent une forte contamination en carbone. Ainsi, un des objectifs de cette thèse a été de réduire le taux de carbone dans les couches afin d’optimiser leurs propriétés de changement de phase. Une étude de l’impact des paramètres de dépôt tel que la puissance, la pression, la nature et le débit des gaz utilisés est alors présentée. En étudiant et en optimisant les paramètres de dépôt, des couches de GeTe contenant seulement 2 % at. de carbone ont pu être obtenues. Dans un second temps, des films du composé ternaire GeSbTe ont été déposés en injectant simultanément les trois précurseurs TDMAGe, TDMASb et DIPTe dans le plasma de dépôt. Une large gamme de composition peut alors être obtenue en variant les paramètres d’injection et de dépôt. L’un des principaux avantages de ce procédé est la capacité de couvrir une large gamme de compositions permettant d’obtenir des films possédant des propriétés de changement de phase très variées. L’impact des paramètres plasma sur la conformité du dépôt a aussi été étudié. Il est montré que l’ajout d’une composante BF à la puissance RF du plasma permet d’améliorer le remplissage des structures possédant des facteurs de forme élevés. Enfin, l’intégration dans des dispositifs mémoires PCRAM tests de matériaux PCM obtenus par ce procédé PE-MOCVD a mis en évidence des propriétés électriques proches de celles obtenues avec des matériaux déposés par les procédés de dépôt conventionnels de type PVD. / Phase change random access memories PCRAM are based on the fast and reversible switch between the high resistive amorphous state and the low resistive crystalline state of a phase change material (PCM). These memories are considered to be one of the most promising candidates for the next generation of non volatile memories thanks to their unique set of features such as fast programming speed, multi-level storage capability, good endurance and high scalability. However, high power consumption during the RESET operation (IRESET) is the main challenge that PCRAM has to face in order to explode the non volatile memory market. In this context, it has been demonstrated that by integrating the phase change material (PCM) in high aspect ratio lithographic structures, the heating efficiency is improved leading to a reduced reset current. In order to fill such confined structures with the phase change material, a highly conformal deposition process is required. Therefore, a pulsed liquid injection Plasma Enhanced-Metal Organic Chemical Vapor Deposition process (PE-MOCVD) was developed in this work. First, amorphous and homogeneous GeTe films were deposited using the organometallic precursors TDMAGe and DIPTe as Ge and Te precursors. XPS measurements revealed a stoichiometric composition of GeTe but with high carbon contamination. Thus, one of the objectives of this work was to reduce the carbon contamination and to optimize the phase change properties of the deposited PCMs. The effect of deposition parameters such as plasma power, pressure and gas rate on the carbon contamination is then presented. By tuning and optimizing deposition parameters, GeTe films with carbon level as low at 2 at. % were obtained. Thereafter, homogeneous films of GeSbTe were deposited by injecting simultaneously the organometallic precursors TDMAGe, TDMASb and DiPTe in the plasma. A wide range of compositions was obtained by varying the injection and deposition operating parameters. Indeed, one of the main advantages of this process is the ability of varying films composition, which results in varying phase change characteristics of the deposited PCM. The impact of plasma parameters on the conformity of the process was also studied. It was shown that by adding a low frequency power component to the radio frequency power of the plasma, structures with high aspect ratio were successfully filled with the phase change material. Finally, electrical characterization of PCRAM test devices integrating phase change materials deposited by PE-MOCVD as active material have presented electrical properties similar to the ones obtained for materials deposited by conventional physical vapor deposition (PVD) process.

Afin de permettre de développer un modèle de mémoire non-volatile basée sur le transistor à nanotube de carbone à commande optique qui est utilisée dans des circuits électroniques neuromorphiques, il est nécessaire de comprendre les physiques électroniques et optoélectroniques des nanotubes de carbone, en particulier l’origine de l'effet mémoire que présente ces transistors. C’est dans ce contexte général que cette thèse s'intègre. Le travail est mené sur trois plans :• Caractériser électriquement et optoélectroniquement des structures de test des CNTFETs et des OG-CNTFETs.• Développer un modèle compact pour les contacts Schottky dans les transistors à nanotube de carbone de la façon auto-cohérente basé sur le diamètre et la nature du métal d’électrode en utilisant la méthode de la barrière effective avec les paramètres nécessaires calibrés.• Modéliser l'OG-CNTFET selon les régimes de fonctionnement, lecture, écriture, effacement ou programmation pour application à une mémoire non-volatile en intégrant le mécanisme de piégeage et dépiégeage à l’interface polymère/oxyde. / This PhD thesis presents a computationally efficient physics-based compact model for optically-gated carbon nanotube field effect transistors (OG-CNTFETs), especially in the non-volatile memory application. This model includes memory operations such as “read”, “write”, “erase” or “program”, and “reset” which are modeled using trapping and detrapping mechanisms at the polymer/oxide interface. The relaxation of the memory state is taken into account. Furthermore, the self-consistent modeling of Schottky barriers at contacts between the carbon nanotube channel and metal electrodes is integrated in this model applying the effective Schottky barrier method. The Schottky contact model can be included in CNTFET based devices for a typical biasing range of carbon nanotube transistors. This compact model is validated by the good agreement between simulation results and experimental data (I-V characteristics). In the non-volatile memory application, this model can fully reproduce device behaviors in transient simulations. A prediction study of the key technological parameter, the CNT diameter variety is established to expect its impact on the transistor performance, and more importantly, on the memory operation. In the other hand, this thesis presents a preliminary electric characterization (I-V) of CNTFETs and OG-CNTFETs for the device modeling database. A preliminary optoelectronic characterization method is proposed.

Database systems have long been optimized to hide the higher latency of storage media, yielding complex persistence mechanisms. With the advent of large DRAM capacities, it became possible to keep a full copy of the data in DRAM. Systems that leverage this possibility, such as main-memory databases, keep two copies of the data in two different formats: one in main memory and the other one in storage. The two copies are kept synchronized using snapshotting and logging. This main-memory-centric architecture yields nearly two orders of magnitude faster analytical processing than traditional, disk-centric ones. The rise of Big Data emphasized the importance of such systems with an ever-increasing need for more main memory. However, DRAM is hitting its scalability limits: It is intrinsically hard to further increase its density. Storage-Class Memory (SCM) is a group of novel memory technologies that promise to alleviate DRAM’s scalability limits. They combine the non-volatility, density, and economic characteristics of storage media with the byte-addressability and a latency close to that of DRAM. Therefore, SCM can serve as persistent main memory, thereby bridging the gap between main memory and storage. In this dissertation, we explore the impact of SCM as persistent main memory on database systems. Assuming a hybrid SCM-DRAM hardware architecture, we propose a novel software architecture for database systems that places primary data in SCM and directly operates on it, eliminating the need for explicit IO. This architecture yields many benefits: First, it obviates the need to reload data from storage to main memory during recovery, as data is discovered and accessed directly in SCM. Second, it allows replacing the traditional logging infrastructure by fine-grained, cheap micro-logging at data-structure level. Third, secondary data can be stored in DRAM and reconstructed during recovery. Fourth, system runtime information can be stored in SCM to improve recovery time. Finally, the system may retain and continue in-flight transactions in case of system failures. However, SCM is no panacea as it raises unprecedented programming challenges. Given its byte-addressability and low latency, processors can access, read, modify, and persist data in SCM using load/store instructions at a CPU cache line granularity. The path from CPU registers to SCM is long and mostly volatile, including store buffers and CPU caches, leaving the programmer with little control over when data is persisted. Therefore, there is a need to enforce the order and durability of SCM writes using persistence primitives, such as cache line flushing instructions. This in turn creates new failure scenarios, such as missing or misplaced persistence primitives. We devise several building blocks to overcome these challenges. First, we identify the programming challenges of SCM and present a sound programming model that solves them. Then, we tackle memory management, as the first required building block to build a database system, by designing a highly scalable SCM allocator, named PAllocator, that fulfills the versatile needs of database systems. Thereafter, we propose the FPTree, a highly scalable hybrid SCM-DRAM persistent B+-Tree that bridges the gap between the performance of transient and persistent B+-Trees. Using these building blocks, we realize our envisioned database architecture in SOFORT, a hybrid SCM-DRAM columnar transactional engine. We propose an SCM-optimized MVCC scheme that eliminates write-ahead logging from the critical path of transactions. Since SCM -resident data is near-instantly available upon recovery, the new recovery bottleneck is rebuilding DRAM-based data. To alleviate this bottleneck, we propose a novel recovery technique that achieves nearly instant responsiveness of the database by accepting queries right after recovering SCM -based data, while rebuilding DRAM -based data in the background. Additionally, SCM brings new failure scenarios that existing testing tools cannot detect. Hence, we propose an online testing framework that is able to automatically simulate power failures and detect missing or misplaced persistence primitives. Finally, our proposed building blocks can serve to build more complex systems, paving the way for future database systems on SCM.

Database systems have long been optimized to hide the higher latency of storage media, yielding complex persistence mechanisms. With the advent of large DRAM capacities, it became possible to keep a full copy of the data in DRAM. Systems that leverage this possibility, such as main-memory databases, keep two copies of the data in two different formats: one in main memory and the other one in storage. The two copies are kept synchronized using snapshotting and logging. This main-memory-centric architecture yields nearly two orders of magnitude faster analytical processing than traditional, disk-centric ones. The rise of Big Data emphasized the importance of such systems with an ever-increasing need for more main memory. However, DRAM is hitting its scalability limits: It is intrinsically hard to further increase its density. Storage-Class Memory (SCM) is a group of novel memory technologies that promise to alleviate DRAM’s scalability limits. They combine the non-volatility, density, and economic characteristics of storage media with the byte-addressability and a latency close to that of DRAM. Therefore, SCM can serve as persistent main memory, thereby bridging the gap between main memory and storage. In this dissertation, we explore the impact of SCM as persistent main memory on database systems. Assuming a hybrid SCM-DRAM hardware architecture, we propose a novel software architecture for database systems that places primary data in SCM and directly operates on it, eliminating the need for explicit IO. This architecture yields many benefits: First, it obviates the need to reload data from storage to main memory during recovery, as data is discovered and accessed directly in SCM. Second, it allows replacing the traditional logging infrastructure by fine-grained, cheap micro-logging at data-structure level. Third, secondary data can be stored in DRAM and reconstructed during recovery. Fourth, system runtime information can be stored in SCM to improve recovery time. Finally, the system may retain and continue in-flight transactions in case of system failures. However, SCM is no panacea as it raises unprecedented programming challenges. Given its byte-addressability and low latency, processors can access, read, modify, and persist data in SCM using load/store instructions at a CPU cache line granularity. The path from CPU registers to SCM is long and mostly volatile, including store buffers and CPU caches, leaving the programmer with little control over when data is persisted. Therefore, there is a need to enforce the order and durability of SCM writes using persistence primitives, such as cache line flushing instructions. This in turn creates new failure scenarios, such as missing or misplaced persistence primitives. We devise several building blocks to overcome these challenges. First, we identify the programming challenges of SCM and present a sound programming model that solves them. Then, we tackle memory management, as the first required building block to build a database system, by designing a highly scalable SCM allocator, named PAllocator, that fulfills the versatile needs of database systems. Thereafter, we propose the FPTree, a highly scalable hybrid SCM-DRAM persistent B+-Tree that bridges the gap between the performance of transient and persistent B+-Trees. Using these building blocks, we realize our envisioned database architecture in SOFORT, a hybrid SCM-DRAM columnar transactional engine. We propose an SCM-optimized MVCC scheme that eliminates write-ahead logging from the critical path of transactions. Since SCM -resident data is near-instantly available upon recovery, the new recovery bottleneck is rebuilding DRAM-based data. To alleviate this bottleneck, we propose a novel recovery technique that achieves nearly instant responsiveness of the database by accepting queries right after recovering SCM -based data, while rebuilding DRAM -based data in the background. Additionally, SCM brings new failure scenarios that existing testing tools cannot detect. Hence, we propose an online testing framework that is able to automatically simulate power failures and detect missing or misplaced persistence primitives. Finally, our proposed building blocks can serve to build more complex systems, paving the way for future database systems on SCM.

The aim of this work was to find a correlation between the electrical, optical and microstructural properties of thin SiO2 layers containing group IV nanostructures produced by ion beam synthesis. The investigations were focused on two main topics: The electrical properties of Ge- and Si-rich oxide layers were studied in order to check their suitability for non-volatile memory applications. Secondly, photo- and electroluminescence (PL and EL) results of Ge-, Si/C- and Sn-rich SiO2 layers were compared to electrical properties to get a better understanding of the luminescence mechanism.

<p>  </p> <p>By means of this dissertation we bring to light that FETs (that are either Si or 2D-TMD based) when coupled with piezoelectric or ferroelectric materials can offer attractive solutions such as (i) technology scaling, (ii) non-volatile memory functionality and (iii) beyond-von-Neumann computing paradigms that address the limitations of current architectures. Our efforts encompass the domains of steep switching devices, non-volatile memories, computation-in-memory and non-Boolean computing, wherein we explore devices embedded with piezoelectric (strain-based) and ferroelectric (polarization-based) properties and propose novel circuits based on them, while focusing on understanding their device-circuit interactions and system implications.</p>