The state-variable analog filter topologies are described. Using the transfer function theory and operational configurations suitable for integration and derivation, a new universal filter topology are proposed. The circuit has been implemented in CMOS technology by using six operational amplifiers, eight analog switches and five programming resistor array. Tunable corner frequencies, quality factors and gain are realized. Using the serial peripheral interface or digital memory can be realized this real-time digitally programmable first- and second-order analog filter with the tunable parameters.

Goal of this doctoral thesis is to focus to understand of behavior of working of basic electronics circuits and to appoint which parameters of these circuits is possible to control using external digital system. Further the examples of some digitally controlled analog circuits are present and the analysis of these circuits is achieved. Some of these blocks are realized and the results of that’s measuring is presented.

L’utilisation croissante de l’information audiovisuelle devant les tribunaux de droit pénal international indique une trajectoire qui oblige à considérer plus attentivement les enjeux soulevés par ce type de preuve à partir de sa collecte, sa conservation jusqu’à son utilisation dans le cadre d’un procès. Ces enjeux peuvent être variés et se rattacher à la véracité, l’authenticité et l’intégrité du contenu d’une telle information. Dans le cadre de ce mémoire, nous plaidons, au moins, pour une approche rigoureuse dans l’évaluation de la preuve audiovisuelle, et ce, tout au long du processus judiciaire d’une affaire devant la CPI, ou au plus, pour un encadrement objectif des règles applicables à la preuve audiovisuelle, et ce, en s’écartant du principe général de souplesse et de flexibilité fortement ancré dans la culture de l’administration de la preuve devant cette institution, pour adopter une approche stricte et rigoureuse. Laquelle favoriserait, d’une part, l’application du critère préalable de fiabilité lors de la phase de l’introduction d’un élément de preuve audiovisuel, et d’autre part, l’application d’une méthode d’évaluation de la preuve audiovisuelle basée sur le modèle d’admission. La présence d’une phase préalable d’analyse substantielle des éléments sensibles, tels que les éléments de preuve audiovisuels, n’implique pas forcément une perte du pouvoir discrétionnaire des juges à renvoyer l’évaluation des éléments de preuve introduits à la fin du processus. L’enjeu fondamental réside dans le fait que le critère préalable de fiabilité et le modèle d’admission permettraient de tempérer le pouvoir discrétionnaire des juges et favoriseraient une analyse plus diligente et rigoureuse des éléments de preuve audiovisuels. À notre avis, cette démarche devra être initiée par les juges des chambres préliminaires et de première instance, en leur qualité de juges de faits et de la preuve, et se concrétiser sur le terrain par les premiers et différents intervenants impliqués dans le processus judiciaire de cette institution. / The increasing use of audiovisual information before international criminal courts is indicative of a trajectory that calls for a closer look at the issues raised by this type of evidence, from its collection and preservation to its use in court. These issues can be varied and relate to the veracity, authenticity and integrity of the content of such information. In this research Paper, we argue for at least a rigorous approach to the evaluation of digital evidence, throughout the judicial process of a case before the ICC, or at most, an objective framing of the rules applicable to digital evidence, departing from the general principle of flexibility strongly rooted in the culture of the administration of evidence before this institution, in favor of a strict and rigorous approach. This would favor the application of the preliminary criterion of reliability when introducing audiovisual evidence, and the application of a method for evaluating audiovisual evidence based on the admission model. The presence of a substantial preliminary analysis phase for sensitive elements, such as digital evidence, does not necessarily imply a loss of judicial discretion to defer the evaluation of the evidence produced to the end of the process. What is fundamentally at stake is the fact that the prior reliability criterion and the admission model would temper judicial discretion and encourage a more diligent and rigorous analysis of digital evidence. In our opinion, this approach should be initiated by the judges of the preliminary and trial chambers, in their capacity as judges of fact and evidence, and implemented in the field by the first and various stakeholders involved in the judicial process of this institution.

Récemment, la chimie des phosphoramidites s’est montrée efficace et polyvalente en tant que plateforme pour accéder à des poly(phosphodiester)s à séquence définies abiotiques. Grâce à cette stratégie, les monomères peuvent être placés dans la chaîne à des positions choisies, ouvrant la voie à de nombreuses possibilités pour la préparation de macromolécules fonctionnelles. Ici, la méthode phosphoramidite a été explorée pour la synthèse de polymères dits numériques, qui contiennent des séquences de monomères encodées binairement. Des polymères dont les longueurs de chaînes et les séquences numériques sont contrôlées ont été préparés en utilisant une stratégie phosphoramidite classique impliquant des groupements protecteurs diméthoxytrityles, ou bien un procédé photocontrôlé faisant intervenir des groupements nitrophénylpropyloxycarbonyles clivables à la lumière. En outre, plusieurs stratégies pour modifier l’information contenue dans les chaînes latérales ont été étudiées dans cette thèse. Une modification binaire post-polymérisation à travers deux cycloadditions alcyne-azoture catalysées par le cuivre(I) consécutives a été examinée pour optimiser les chaînes latérales des poly(phosphodiester)s à séquences définies. De plus, la libération photocontrôlée de différents motifs éthers ortho-nitrobenzyliques latéraux a été étudiée. Ces fonctions ont permis la conception d’oligo(phosphodiester)s numériques dont les séquences d’information peuvent être effacées ou révélées grâce à la lumière. / Phosphoramidite chemistry has recently been evidenced to be an efficient and versatile platform to access sequence-defined abiotic poly(phosphodiester)s. Using this strategy, monomers can be placed at defined positions positions in a chain, thus opening up wide possibilities for the preparation of functional macromolecules.Here, the phosphoramidite platform was explored to synthesize so-called digital polymers, which contain monomer-coded binary sequences. Polymers with controlled chain lengths and digital sequences were prepared using either a standard phosphoramidite strategy involving dimethoxytrityl protective groups or a photo-controlled process involving light-cleavable nitrophenylpropyloxycarbonyl protective groups. Additionally, several strategies to modify the side chain information were investigated in this thesis. A binary post-polymerization modification by means of sequential copper(I)-catalyzed alkyne-azide cycloadditions was investigated for tuning the side chain functionality of sequence-defined poly(phosphodiester)s. Moreover, the photo-controlled release of several ortho-nitrobenzylic ether side chain motifs was studied. These moieties allowed the design of digital oligo(phosphodiester)s whose sequence information can be erased or revealed with light as a trigger.

Digitally controlled switching DC-DC converters have recently emerged as an attractive alternative to conventional switching converters based on analog control techniques. This research focuses on eliminating the issues associated with the state of the art switching converters by proposing three novel control techniques: (1) a digitally controlled Buck-Boost converter uses a fully synthesized constant ON/OFF time-based fractional-N controller to regulate the output over a 3.3V-to-5.5V input voltage range and provides seamless transition from buck to buck-boost modes (2) a hysteretic buck converter that employs a highly digital hybrid voltage/current mode control to regulate output voltage and switching frequency independently (3) a 10MHz continuous time PID controller using time based signal processing which alleviates the speed limitations associated with conventional analog and digital. All the three techniques employ digitally assisted control techniques and require no external compensation thus making the controllers fully integrated and highly cost effective. / Graduation date: 2013 / Access restricted to the OSU Community at author's request from June 25, 2012 - June 25, 2014

This research study looks at digital academic space, which is defined here as web-based digitally mediated artifacts produced by universities and their members. Open source software projects and the Open Access movement play large roles within digital academic space, not only because of their strong historical academic roots, but also because these projects are growing in prevalence in many universities. Framed by theories from the field of higher education and media studies, this research study is an analysis of the dynamics and effects of one open source software project that produces Open Access electronic journals. The software system, called the Open Journal Systems (OJS), originally developed by an education professor from a Canadian university, has been adopted by thousands of universities world- wide to publish electronic peer reviewed academic journals. OJS users distributed at universities throughout the world have contributed software code back to the system, by for example, creating translation modules enabling users to publish journals in a range of languages thus adding an interesting global dimension to the project. Based on interviews with the OJS software developers, administrators, and users, as well as a range of material culled from online, this situational analysis of the OJS sketches out the conditions, dynamics, discourses and professional identities that form the basis of an emerging phenomenon within universities that is named here the digitally mediated open research project (DMORP

This research study looks at digital academic space, which is defined here as web-based digitally mediated artifacts produced by universities and their members. Open source software projects and the Open Access movement play large roles within digital academic space, not only because of their strong historical academic roots, but also because these projects are growing in prevalence in many universities. Framed by theories from the field of higher education and media studies, this research study is an analysis of the dynamics and effects of one open source software project that produces Open Access electronic journals. The software system, called the Open Journal Systems (OJS), originally developed by an education professor from a Canadian university, has been adopted by thousands of universities world- wide to publish electronic peer reviewed academic journals. OJS users distributed at universities throughout the world have contributed software code back to the system, by for example, creating translation modules enabling users to publish journals in a range of languages thus adding an interesting global dimension to the project. Based on interviews with the OJS software developers, administrators, and users, as well as a range of material culled from online, this situational analysis of the OJS sketches out the conditions, dynamics, discourses and professional identities that form the basis of an emerging phenomenon within universities that is named here the digitally mediated open research project (DMORP

Tato disertační práce se zaměřuje na výzkum v oblasti frekvenčních filtrů. Hlavním cílem je navrhnout a analyzovat plně diferenční kmitočtové filtry pracující v proudovém módu a využívající moderní aktivní prvky. Prezentované filtry jsou navrženy za použití proudových sledovačů, operačních transkonduktančních zesilovačů, plně diferenčních proudových zesilovačů a transrezistančních zesilovačů. Návrh se zaměřuje na možnost řídit některý z typických parametrů filtru pomocí řiditelných aktivních prvků, které jsou vhodně umístněny do obvodové struktury. Jednotlivé prezentované filtry jsou navrženy v nediferenční a diferenční verzi. Velký důraz je věnován srovnání plně diferenčních struktur s jejich odpovídajícími nediferenčními formami. Funkčnost jednotlivých návrhů je ověřena simulacemi a v některých případech i experimentálním měřením.

Following the rise of Internet of Things (IoT), or just the technological advancements and expectations in a world where the things are or will be connected, new demands are put on Integrated Circuit (IC) for wireless connectivity. The use cases seem endless; smart home, healthcare, entertainment, and science are all areas that can benefit from connectivity of low power electronics. But there are obstacles to overcome. Meeting the specifications, especially the phase noise requirements of modern high-speed wireless standards can be a challenge for devices that run on low supply voltages and are allowed only very limited power consumption. The focus of this thesis is the exploration of modern LC-oscillator architectures for RF-transceivers, and the design and post-layout evaluation of a Digitally Controlled Oscillator (DCO) intended to be used in an All-Digital Phase Locked Loop (ADPLL) in a 22 nm FD-SOI process. The DCO specifications are set by an ADPLL for the Wi-Fi 6 (MCS 11) standard. The ADPLL is replacing the blocks that are usually implemented as noise-sensitive analog components with more robust digital blocks that are easier to integrate with baseband- and digital-circuitry. A dual-core class-C oscillator with a dynamic-biasing circuit is proposed and designed to meet the specification of -121 dBc/Hz phase noise at a 1 MHz offset from 7.8 GHz, a –7.18.6 GHz tuning range, and a frequency resolution of at most 35 kHz around 7.8 GHz. The phase noise specification is met; a phase noise of -121 dBc/Hz at the 1 MHz offset from 7.8 GHz is achieved in post-layout simulation along with a Figure of Merit (FoM) of 189.9, and an average tracking frequency step of 5.8 MHz. The tuning range specification was not met, but it is reasonable to believe that the specified range can be met after some redesign of the capacitor banks. Further work will be required. / Till följd av tillväxten inom Internet of Things (IoT), eller bara de teknologiska framgångar och förväntningar på en värld där dem flesta saker är eller kommer att bli uppkopplade, ställs nya krav på Integrated Circuit (IC)-komponenter för trådlös uppkoppling. Tillämningsområdena är oändliga; smart home, sjukvård och hälsa, underhållning och forskning är områden som som kan dra nytta av nya uppkopplingsmöjligheter med extremt strömsnål elektronik. Att leva upp till specifikationerna för moderna trådlösa höghastighetsuppkopplingar, speciellt när det kommer till fasbrus, kan dock vara en utmaning för enheter som måste klara sig med en väldigt begränsad effektåtgång. Fokus för denna avhandling är design och utvärdering på schematik och layout-nivå av en Digitally Controlled Oscillator (DCO) för en 22 nm Fully Depleted Silicon-On-Insulator (FD-SOI)-process avsedd att klara specifikationen satt av en given All-Digital Phase Locked Loop (ADPLL) för Wi-Fi 6 (MCS 11) standarden. En DCO och ADPLL ersätter block som tidigare tillämpats som analoga bruskänsliga komponenter med robustare digitala komponenter som är enklare att integrera med bas-band och digital logik-kretsar. En dubbelkärnig klass-C DCO med en dynamisk biaskrets föreslås för att nå kravet på fasbrus på maximalt -121 dBc/Hz mätt vid 1 MHz från en frekvens på 7.8 GHz, med ett frekvensomfång 7.1-8.6 GHz och en frekvensupplösning under 35 kHz. Fasbruset vid denna 1 MHz från 7.8 GHz uppmättes i simulering till -121 dBc/Hz, och en Figure of Merit (FoM) på 189.9 har uppnåtts, samt en genomsnittlig frekvensupplösning på 5.8 MHz nära 7.8 GHz. Designen klarar inte av att möta kraven på frekvensomfång, men det är sannolikt att en liknande design kan möta specifikationen efter ytterligare revision. Ytterligare arbete krävs.

Desire for low-power, high performance computing has been at core of the symbiotic union between digital circuits and CMOS scaling. While digital circuit performance improves with device scaling, analog circuits have not gained these benefits. As a result, it has become necessary to leverage increased digital circuit performance to mitigate analog circuit deficiencies in nanometer scale CMOS in order to realize world class analog solutions. In this thesis, both circuit and system enhancement techniques to improve performance of clock generators are discussed. The following techniques were developed: (1) A digital PLL that employs an adaptive and highly efficient way to cancel the effect of supply noise, (2) a supply regulated DPLL that uses low power regulator and improves supply noise rejection, (3) a digital multiplying DLL that obviates the need for high-resolution TDC while achieving sub-picosecond jitter and excellent supply noise immunity, and (4) a high resolution TDC based on a switched ring oscillator, are presented. Measured results obtained from the prototype chips are presented to illustrate the proposed design techniques. / Graduation date: 2013 / Access restricted to the OSU Community at author's request from July 16, 2012 - July 16, 2014