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The Global ETD Search service is a free service for researchers
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Showing 901 to 910 of 1371 (0.02 seconds)Spelling suggestions: "subject:"[een] IP"" "subject:"[enn] IP""
| 901 |
Testing and Verification Strategies for Enhancing Trust in Third Party IPsBanga, Mainak 17 December 2010 (has links)
Globalization in semiconductor industry has surged up the trend of outsourcing component design and manufacturing process across geographical boundaries. While cost reduction and short time to market are the driving factors behind this trend, the authenticity of the final product remains a major question. Third party deliverables are solely based on mutual trust and any manufacturer with a malicious intent can fiddle with the original design to make it work otherwise than expected in certain specific situations. In case such a backfire happens, the consequences can be disastrous especially for mission critical systems such as space-explorations, defense equipments such as missiles, life saving equipments such as medical gadgets where a single failure can translate to a loss of lives or millions of dollars. Thus accompanied with outsourcing, comes the question of trustworthy design - "how to ensure that integrity of the product manufactured by a third party has not been compromised".
This dissertation aims towards developing verification methodologies and implementing non-destructive testing strategies to ensure the authenticity of a third party IP. This can be accomplished at various levels in the IC product life cycle. At the design stage, special testability features can be incorporated in the circuit to enhance its overall testability thereby making the otherwise hard to test portions of the design testable at the post silicon stage. We propose two different approaches to enhance the testability of the overall circuit. The first allows improved at-speed testing for the design while the second aims to exaggerate the effect of unwanted tampering (if present) on the IC. At the verification level, techniques like sequential equivalence checking can be employed to compare the third-party IP against a genuine specification and filter out components showing any deviation from the intended behavior. At the post silicon stage power discrepancies beyond a certain threshold between two otherwise identical ICs can indicate the presence of a malicious insertion in one of them. We have addressed all of them in this dissertation and suggested techniques that can be employed at each stage. Our experiments show promising results for detecting such alterations/insertions in the original design. / Ph. D.
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| 902 |
Impact of Queuing Schemes and VPN on the Performance of a Land Mobile Radio VoIP SystemBallapuram, Vijayanand Sreenivasan 23 July 2007 (has links)
Land mobile radio (LMR) systems are used for communication by public safety and other government and commercial organizations. LMR systems offer mission-critical or even life-critical service in the day-to-day activities of such organizations. Traditionally, a variety of different LMR systems have been deployed by different organizations, leading to a lack of radio interoperability. A voice application that connects LMR systems via a packet-switched network is called an LMR Voice over IP (LMRVoIP) system and is a potential solution to the interoperability problem. LMRVoIP systems are time critical, i.e., are delay and jitter sensitive. Transmission of LMRVoIP traffic in a congested packet-switched network with no quality of service (QoS) or priority mechanisms in place could lead to high delays and extreme variations in delay, i.e., high jitter, thus resulting in poor application performance. LMRVoIP systems may also have performance issues with the use of virtual private networks (VPNs). To the best of our knowledge, there has been no prior thorough investigation of the performance of an LMRVoIP system with different queuing schemes for QoS and with the use of VPN. In this thesis, we investigate the performance of an LMRVoIP system with different queuing schemes and with the use of VPN.
An experimental test bed was created to evaluate four QoS queuing schemes: first-in first-out queuing (FIFO), priority queuing (PQ), weighted fair queuing (WFQ), and class-based weighted fair queuing (CBWFQ). Quantitative results were obtained for voice application throughput, delay, jitter, and signaling overhead. Results show that, compared to a baseline case with no background traffic, LMRVoIP traffic suffers when carried over links with heavy contention from other traffic sources when FIFO queuing is used. There is significant packet loss for voice and control traffic and jitter increases. FIFO queuing provides no QoS and, therefore, should not be used for critical applications where the network may be congested. The situation can be greatly improved by using one of the other queuing schemes, PQ, WFQ, or CBWFQ, which perform almost equally well with one voice flow. Although PQ has the best overall performance, it tends to starve the background traffic. CBWFQ was found to have some performance benefits over WFQ in most cases and, thus, is a good candidate for deployment.
The LMRVoIP application was also tested using a VPN, which led to a modest increase in latency and bandwidth utilization, but was found to perform well. / Master of Science
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| 903 |
Runtime Intellectual Property Protection on Programmable PlatformsSimpson, Eric 18 July 2007 (has links)
Modern Field-Programmable Gate Arrays (FPGAs) can accommodate complex system-on-chip designs and require extensive intellectual-property (IP) support. However, current IP protection mechanisms in FPGAs are limited, and do not reach beyond whole-design bitstream encryption. This work presents an architecture and protocol for securing IP based designs in programmable platforms. The architecture is reprsented by the Secure Authentication Module (SAM), an enabler for next-generation intellectual-property exchange in complex FPGAs. SAM protects hardware, software, application data, and also provides mutual assurances for the end-user and the intellectual-property developer. Further, this work demonstrates the use of SAM in a secure video messaging device on top of a Virtex-II Pro development system. / Master of Science
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| 904 |
Adaptive Protocols to Improve TCP/IP Performance in an LMDS Network using a Broadband Channel SounderEshler, Todd Jacob 26 April 2002 (has links)
Virginia Tech researchers have developed a broadband channel sounder that can measure channel quality while a wireless network is in operation. Channel measurements from the broadband sounder hold the promise of improving TCP/IP performance by trigging configuration changes in an adaptive data link layer protocol. We present an adaptive data link layer protocol that can use different levels of forward error correction (FEC) codes and link layer automatic retransmission request (ARQ) to improve network and transport layer performance.
Using a simulation model developed in OPNET, we determine the effects of different data link layer protocol configurations on TCP/IP throughput and end-to-end delay using a Rayleigh fading channel model. Switching to higher levels of FEC encoding improves TCP/IP throughput for high bit error rates, but increases end-to-end delay of TCP/IP segments. Overall TCP/IP connections with link layer ARQ showed approximately 150 Kbps greater throughput than without ARQ, but lead to the highest end-to-end delay for high bit error rate channels.
Based on the simulation results, we propose algorithms to maximize TCP/IP throughput and minimize end-to-end delay using the current bit error rate of the channel. We propose a metric, carrier-to-interference ratio (CIR) that is calculated from data retrieved from the broadband channel sounder. We propose algorithms using the carrier-to-interference ratio to control TCP/IP throughput and end-to-end delay.
The thesis also describes a monitor program to use in the broadband wireless system. The monitor program displays data collected from the broadband sounder and controls the settings for the data link layer protocol and broadband sounder while the network is in operation. / Master of Science
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| 905 |
Fuzzing tool for industrial communicationKöhler Djurberg, Markus, Heen, Isak January 2024 (has links)
Unit testing is a fundamental practice in software development and the goal is to create a test suite that tests the robustness of the software. It is challenging to create a test suite that covers every possible input to a system which can lead to security flaws not being detected. Fuzz testing is a technique that creates randomly generated, or fuzzy, input with the goal to uncover these areas of the input space potentially missed by the unit test suite. EtherNet/IP is an industrial communications protocol built on top of the TCP/IP suite. HMS Anybus develops hardware to use in secure networks in industrial settings utilizing the EtherNet/IP protocol. This report outlines the development of a Scapy-based fuzz testing tool capable of testing the implementation of the protocol on HMS devices. Additionally we propose a strategy for how the tool can be deployed in future testing. The resulting fuzz testing tool is capable of creating packets containing selected commands’ encapsulation headers and layering them with command specific data fields. These packets can be filled with static or fuzzy input depending on user configuration. The tool is implemented with the intention of providing HMS the capability for conducting fuzz testing. The report mentions multiple improvements that can be made using A.I. assisted generation of test cases and how the tool can be scaled in the future. This thesis project is a proof of concept that using Scapy to create a fuzz testing tool tailored to the EtherNet/IP protocol is possible.
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| 906 |
Analyze and compare methods of bridging Layer 2 Tunneling Industrial Ethernet over IP-based networksStenberg, Eric, Abdennour, Rim January 2024 (has links)
This report aims to compare different layer 2 tunneling protocols in order to determine what advantages and disadvantages each protocol comes with. Since wireless communication is becoming more used demand for these protocols has risen. The main goal is to help industries, like Hardware Meets Software (HMS), choose the most suitable layer 2 tunneling protocol and give a detailed view of each protocol. To compare the protocols, information about various protocols was gathered as well as other studies done on layer 2 tunneling protocols. A decision was then made on the protocols to focus on, Layer 2 Tunneling Protocol (L2TP), Internet Protocol Security (IPsec), Virtual eXtensible Local-Area Network protocol (VXLAN), Generic Routing Encapsulation protocol (GRE), and Network Virtualization using Generic Routing Encapsulation protocol (NVGRE). Furthermore, tests were done on non-tunneling, L2TP together with IPsec and VXLAN, using two laptops, two gateways as well as a shark trap together with Wireshark to record the traffic. These tests were recorded and documented. The results of the tests were used to calculate the protocol’s latency, throughput and jitter. The background research together with the tests concluded in specific protocol characteristics, with different use cases for each protocol. The tests show that non-tunneling was the fastest communication. The L2TP together with the IPsec had better latency and jitter while VXLAN had better throughput. Using other studies together with our tests, different advantages and disadvantages with each protocol was discussed and it was concluded that deeper research would be needed toconclude which protocol best suits HMS, but that L2TP with IPsec outperformed VXLAN on 2 of the 3 main factors. Finally, the methodology is discussed with the factors of reliability, accuracy, and limitation.
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| 907 |
Utrustning för immersionsprovning i vatten vid prototypframtagning / Equipment for water immersion testing in prototype developmentFäldt, Martin, Jönsson, Anton January 2024 (has links)
Vatteninträngning är en viktig faktor som måste tas i beaktande vid konstruktion av komponenter som avses användas i krävande miljöer. Testning av vatteninträngning kan ske genom nedsänkning i en öppen vattenbehållare till önskat djup, men även genom ett simuleratvattendjup i en vattenfylld behållare som trycksätts. I följande arbete testas ett grundkoncept för konstruktion av en trycktank för IP-testnig av klasserna IPx7 samt IPx8, vilketinnebär att den utsätts för förhållandevis låga tryck. Grundkonceptet testas för att identifiera dess brister och förbättringar föreslås. Alternativa lösningar för konstruktionen testassedan och jämförs med grundkonceptet. Analysen av konstruktionerna bygger i huvudsakpå finita emementanalyser, men har även inslag av mekanikberäkningar. Resultatet visaratt en trycktank med rätblocksform kan vara en möjlig konstruktion om hörnförstyvningaranvänds, samt dess infästnigspunkter placeras in från trycktankens kanter. En cylindriskform på trycktank är dock att föredra framför en i formen av ett rätblock. Det visar ävenatt halvsfäriska ändar på trycktanken är att föredra jämfört med plana. Resultatet visaräven att en trycktank tillverkad i låglegerat stål är att föredra ur konstruktionssynpunkt,jämfört med en tillverkad i polymera material. Fortsatta arbeten krävs dock för analys avcylindriska trycktankar i stål med sfäriska ändar. / Water ingress is an important factor that should be considered when designing componentsintended for use in harsh environments. Water ingress can be tested by immersion to thedesired depth in an open water container, an alternative to this method is simulatingthe water depth in a pressurized water-filled container. In this study, a basic concept forthe construction of a pressure tank for IP testing of class IPx7 and IPx8 is examined,which means that it is exposed to relatively low pressures. The basic concept is examinedto identify its shortcomings and improvements are suggested. Alternative solutions forthe construction of a pressure tank are then investigated and compared with the basicconcept. The analysis of the constructions is mainly based on finite element analyses, butalso has elements of classical mechanics equations. This study shows that a pressure tankwith a shape like a cuboid could possibly be constructed if corner braces are used and itsattachment points are placed away from the edges of the pressure tank. This study showsthat a pressure tank in a cylindrical shape is preferable to one in a cuboid shape and thathemispherical pressure tank heads are preferable to flat ones. The study also shows thata pressure tank made from low-alloy steel is preferable from a construction standpoint,compared to one made of polymeric materials. However, further studies are required forthe analysis of cylindrical steel pressure tanks with hemispherical heads.
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| 908 |
從國際趨勢看智財策略管理與企業經營整合-以企業內部智財策略與實施為例 / Enterprise Strategic IP Management：Integrating IP and Business Management within Organization陳奕之, Alex Yi-Chih Chen Unknown Date (has links)
從轟動全球的鴻海與夏普併購案、安謀與英特爾兩個直接競爭者間的晶片架構授權、蘋果與三星纏身多年仍難分難解的設計專利訴訟，再再都顯示智慧財產的重要性，及妥適的規劃與運用企業智財策略管理，能為企業帶來
的競爭優勢與經營彈性，可惜的是相關文獻不僅相當少，既有策略管理文獻，對智慧財產層面之策略管理，又鮮有論述。為期許自己能夠對實務及學術領域皆盡棉薄之力，並推廣相關知識，本研究選擇企業智財策略管理為研究標的，以有無積極採取此面向策略管理之利弊分析為主軸，分別涉及之具體考量為核心，再輔以國際案例說明，以應證智財管理與企業經營整合之趨勢。
為完整探討企業智財策略管理，本研究前兩章先思考廣泛認知的策略管理面向，並套用至智慧財產層面，說明智財策略管理為何及其重要性，與企業應將其導入日常經營；於第三章與第四章，倚賴客觀嚴謹之文獻解讀與專家訪談，搭配靈活之商業邏輯分析，試圖拉近古今中外類似策略思維，說明此概念實非前所未聞，毋寧係吾人未善加利用之競爭策略，並由具體事項整理欠缺企業智財策略管理之危機與積極採取企業智財策略管理之國際趨勢，以充分說明欠缺注意之問題與徹底落實之好處，本研究更利用柯達和全錄，說明企業是如何從默默無聞到高度成功，後續又為何日漸衰敗，並以波音與安謀，描述其係如何日益壯大，與善用智財策略管理更上一層，應證前述分析，係實質可期之策略應用；於第五章嘗試歸納、分析與整合相關資料，經過多次思考、討論與修正，提出企業宜進行之內部組織調整及12步驟之企業智財策略管理，給予企業一套有具體步驟的策略指引，嘗試協助企業成就更上一層，維持高度競爭力，並永續經營；透過深入探討企業智財策略管理議題，亦希冀能夠達到拋磚引玉之效，激發更多討論，補充本研究之不足。 / From recent Foxconn-Sharp merger, licensing deal among ARM and Intel, and dogfight be-tween Apple and Samsung; the importance of intellectual property (IP) is self-evident. Enterprises could gain competiveness and flexibility if strategic IP management is carefully planned and applied. Generous IP activities remained, but only a handful of scholarships dedicated to the topic; more likely than not, these papers focused on traditional perspectives, rather than strategic IP management. This research intends to provide an account broadly discuss relevant issues, including, what strategic IP management is, how it should be treated by enterprises, and guidelines of integrating it to business management. Hope the thoughts provided could benefit current practices as well as academics.
Chapter I & II described how the research is done, delved into traditional perspectives of strate-gic management, and construed strategic IP management to show the necessities of proper integra-tion for enterprises. Banked on resources and professional insights, Chapter III & IV carefully drew connections between strategic IP management and ancient Chinese wisdoms, and shown threats, benefits, and trends on why enterprise should incorporate strategic IP management into business. Further, it used famous corporations including Eastman Kodak, Xerox, Boeing Company, and ARM Holdings to show how successful businesses have failed due to careless on strategic IP management, in contrast to businesses indeed can benefited from proper integration of such instrument. Chapter V scrutinized materials, and integrated different opinions and perspectives, then provided adjustments to organizations within corporations and formulated a 12-steps strategic IP management intended to provide enterprises a guideline that would lead to further success. Lastly, Chapter VI provided a ret-rospect of the research, and wished to set an example and to stimulate more discussions.
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| 909 |
Le "sacrifice" du Christ et le "sacrifice" des chrétiens dans la Lettre aux Romains et la Première lettre de Pierre : incidences herméneutiques d'une approche synchronique axée sur les métaphores et l'intertextualitéJodoin, Danielle January 2009 (has links)
Thèse numérisée par la Division de la gestion de documents et des archives de l'Université de Montréal.
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| 910 |
Entwicklung des Kommunikationsteilsystems für ein objektorientiertes, verteiltes BetriebssystemBecher, Mike 09 November 1998 (has links)
Thema dieser Arbeit ist die Entwicklung eines Kommunikationsteilsystems fuer
das Experimentiersystem CHEOPS zur Ermoeglichung einer Interobjektkommunika-
tion zwischen Objekten auf dem gleichen bzw. verschiedenen Systemen.
Ausgangspunkte stellen dabei eine verfuegbare Implementation eines Ethernet-
Treibers der Kartenfamilie WD80x3 fuer MS-DOS, eine geforderte Kommunikations-
moeglichkeit mit UNIX-Prozessen sowie die dort benutzbaren Protokoll-Familien
dar.
Die Arbeit beschaeftigt sich mit der Analyse und Konzipierung des Ethernet-
Treibers sowie der Internet-Protokoll-Familie fuer CHEOPS als auch deren
Implementation resultierend in einem minimalen Grundsystem. Weiterhin wird
ein erster Entwurf fuer ein spaeter weiterzuentwickelndes bzw. zu vervoll-
staendigendes Netz-Interface vorgeschlagen und durch eine Beispiel-Implemen-
tierung belegt.
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