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Advanced achievements in the area of RF circuit design led to a significant increase in availability of wireless communications in everyday life. However, the rapid growth in utilizing the RF equipment has brought several challenges in different aspects of RF circuit design. This has been motivating researchers to introduce solution to cope with these challenges and further improve the performance of the RF circuits. In this dissertation, we focus on the improvements in three aspects of the circuit design. High temperature and temperature compensated transmitter design, ultra-low phase noise signal generators, and compact and low complexity polar transmitter design. Increase in the ambient temperature can impact the performance of the entire communication system. However, the RF hardware is main part of the system that is under the impact of the temperature variations in which it can change the characteristics of the individual building blocks of the RF chain. Moreover, transistors are the main elements in the circuit whose performance variation must be consider when the design target is compensating the temperature effects. The influence of the temperature variation is studied on the transistors and the building blocks in order to find the most effective approaches to compensate these variations and stabilize the performance of the RF chain at temperatures up to 220 C. A temperature sensor is designed to sense these variations and adjust the characteristics of the circuit components (e.g. bias voltages), accordingly. Further, a new variable gain phase shifter (VGPS) architecture is introduced toward minimizing the temperature impact on its performance in a phased-array transmitter architecture. Finally, a power amplifier as the last stage in a transmitter chain is designed and the variation in its performance with temperature is compensated through the VGPS stage. The transmitter is prototyped to evaluate its performance in practice. Another contribution of this dissertation is to introduce a novel voltage-controlled oscillator (VCO) structure to reduce the phase noise level below state-of-the-art. The noise to phase noise mechanism in the introduced doubly tuned oscillator is studied using linear time-variant (LTV) theory to identify the dominant noise sources and either eliminate or suppress these noise sources by introducing effective mechanism such as impedance scaling. The designed VCO is fabricated and measurement results are carried out that justified the accuracy of the analyses and effectiveness of the introduced design approach. Lastly, we introduce a compact and simple polar transmitter architecture. This type of transmitters was firstly proposed to overcome the serious shortcomings in the IQ transmitters, such as IQ imbalance and carrier leakage. However, there is still several challenges in their design. We introduce a transmitter architecture that operates based on charge to phase translation mechanism in the oscillator. This leads to significantly reduction in the design complexity, die area, and power dissipation. Further, it eliminates a number of serious issues in the design such as sampling rate of the DACs. comprehensive post-layout simulations were also performed to evaluate its performance. / Doctor of Philosophy / To keep up with the ever-growing demand for exchanging information through a radio frequency (RF) wireless network, the specification of the communication hardware (i.e. transmitter and receiver) must be improved as the bottleneck of the system. This has been motivating engineers to introduce new and efficient approaches toward this goal. In this dissertation however, we study three aspects of the circuit design. First, variation in the ambient temperature can significantly degrade the performance of the communication system. Therefore, we study these variations on the performance of the transmitter at high temperature (i.e. above 200 C). Then, the temperature compensation approaches are introduced to minimize the impact of the temperature changes. The effectiveness of the introduced techniques are validated through measurements of the prototyped transmitter. Second, signal generators (i.e. oscillators) are the inseparable blocks of the transmitters. Phase noise is one of the most important specifications of the oscillators that can directly be translated to the quality and data rate of the communication. A new oscillator structure targeting ultra-low phase noise is introduced in the second part of this dissertation. The designed oscillator is fabricated and measured to evaluate its performance. Finally, a new polar transmitter architecture for low power applications is introduced. The transmitter offers design simplicity and compact size compared to other polar transmitter architectures while high performance.

Cette distinction est également valable pour le genre des individus (homme/femme). L'étude menée a montré que l'approche utilisant l'information spectrale des contours des phalanges permet une identification par seulement trois phalanges, à un taux EER (Equal Error Rate) inférieur à 0.24 %. Par ailleurs, il a été constaté « de manière surprenante » que la technique fondée sur les rapports de vraisemblance entre les phalanges permet d'atteindre un taux d'identification de 100 % et un taux d'EER de 0.37 %, avec une seule phalange. Hormis l'aspect identification/authentification, notre étude s'est penchée sur l'optimisation de la dose de rayonnement permettant une identification saine des individus. Ainsi, il a été démontré qu'il était possible d'acquérir plus de 12500/an d'images radiographiques de la main, sans pour autant dépasser le seuil administratif de 0.25 mSvL'avancement de la communication numérique optique dans les réseaux longue distance et d'accès a déclenché les technologies émergentes dans le domaine micro-ondes / ondes millimétriques. Ces systèmes hybrides sont fortement influencés non seulement par les déficiences de liens optiques mais aussi des effets de circuits électriques. Les effets optiques et électriques peuvent être ainsi étudiés en même temps en utilisant des outils assistés par ordinateur en développant des modèles de circuit équivalent de l'ensemble des composants de liaison tels que les lasers à semi-conducteurs, modulateurs, photo-détecteurs et fibre optique. Dans cette thèse, les représentations de circuit des composants de liaison photoniques sont développées pour étudier des architectures différentes. Depuis la source de lumière optique est le principal facteur limitant de la liaison optique, une attention particulière est accordée aux caractéristiques, y compris les plus importants de simples lasers en mode semi-conducteurs. Le modèle de circuit équivalent de laser qui représente l'enveloppe du signal optique est modifié pour inclure les propriétés de bruit de phase du laser. Cette modification est particulièrement nécessaire d'étudier les systèmes où le bruit de phase optique est important. Ces systèmes comprennent des systèmes de télécommande hétérodynes optiques et des systèmes auto-hétérodynes optiques. Les résultats de mesure des caractéristiques de laser sont comparés aux résultats de simulation afin de valider le modèle de circuit équivalent dans des conditions différentes. Il est démontré que le modèle de circuit équivalent peut prédire avec précision les comportements des composants pour les simulations au niveau du système. Pour démontrer la capacité du modèle de circuit équivalent de la liaison photonique pour analyser les systèmes micro-ondes / ondes millimétriques, le nouveau modèle de circuit du laser avec les modèles comportementaux des autres composants sont utilisés pour caractériser différents radio sur fibre (RoF) liens tels que la modulation d'intensité - détection directe (IM-DD) et les systèmes RoF hétérodynes optique. Signal sans fil avec des spécifications conformes à la norme de IEEE 802.15.3c pour la bande de fréquence à ondes millimétriques est transmis sur les liens RoF. La performance du système est analysée sur la base de l'évaluation de l'EVM. L'analyse montre que l'analyse efficace des systèmes de photonique micro-ondes / ondes millimétriques est obtenue en utilisant des modèles de circuit qui nous permet de prendre en compte les comportements à la fois électriques et optiques en même temps / The advancement of digital optical communication in the long-haul and access networks has triggered emerging technologies in the microwave/millimeter-wave domain. These hybrid systems are highly influenced not only by the optical link impairments but also electrical circuit effects. The optical and electrical effects can be well studied at the same time using computer aided tools by developing equivalent circuit models of the whole link components such as semiconductor lasers, modulators, photo detectors and optical fiber. In this thesis, circuit representations of the photonic link components are developed to study different architectures. Since the optical light source is the main limiting factor of the optical link, particular attention is given to including the most important characteristics of single mode semiconductor lasers. The laser equivalent circuit model which represents the envelope of the optical signal is modified to include the laser phase noise properties. This modification is particularly necessary to study systems where the optical phase noise is important. Such systems include optical remote heterodyne systems and optical self-heterodyne systems. Measurement results of the laser characteristics are compared with simulation results in order to validate the equivalent circuit model under different conditions. It is shown that the equivalent circuit model can precisely predict the component behaviors for system level simulations. To demonstrate the capability of the equivalent circuit model of the photonic link to analyze microwave/millimeter-wave systems, the new circuit model of the laser along with the behavioral models of other components are used to characterize different radio-over-fiber (RoF) links such as intensity modulation – direct detection (IM-DD) and optical heterodyne RoF systems. Wireless signal with specifications complying with IEEE 802.15.3c standard for the millimeter-wave frequency band is transmitted over the RoF links. The system performance is analyzed based on EVM evaluation. The analysis shows that effective analysis of microwave/millimeter-wave photonics systems is achieved by using circuit models which allows us to take into account both electrical and optical behaviors at the same time

Wireless communication is witnessing tremendous growth with the proliferation of various standards covering wide, local, and personal area networks, which operate at different frequency bands. Future wireless terminals will not only need to support multiple standards, but also need to be multi-functional to keep pace with the demands of the consumers. For such an implementation, the local oscillator (LO) turns out to be the bottleneck, which must exhibit frequency agility by generating a very wide range of carrier frequencies in order to access all the specified communication standards. This dissertation presents various design techniques to realize compact low-cost low-power and broadband oscillators in silicon-based technologies. The two most suitable techniques for broadband signal generation: (1) Use of widely tunable active inductor, and (2) Use of switched resonator have been thoroughly evaluated. A fully reconfigurable active inductor with a widely tunable feedback resistor has been proposed. Using the proposed tunable active inductor in a VCO generates frequency tuning ranges higher than 100%, and helps achieve the highest PFTN Figure-of-Merit among Si-based active inductor VCOs reported in literature till date. The large-signal non-linearity of the active inductor has been utilized to develop the first reported broadband harmonic active inductor-based VCO. The degradation of phase noise due to active inductors is partially solved by a noise optimization guideline for active inductors. Utilizing the low saturation voltage of HBT technologies and high-Q short line inductors seems to be very useful to reduce power consumption of cross-coupled VCOs while achieving low phase noise performance simultaneously.

High-speed serial data links are quickly gaining in popularity and replacing the conventional parallel data links in recent years when the data rate of communication exceeds one gigabits per second. Compared with parallel data links, serial data links are able to achieve higher data rate and longer transfer distance. This dissertation is focused on the design of CMOS integrated phase-locked loops (PLLs) and relevant building blocks used in multi-gigabits serial data link transceivers. Firstly, binary phase-locked loops (BPLLs, i.e., PLLs based on binary phase detectors) are modeled and analyzed. The steady-state behavior of BPLLs is derived with combined discrete-time and continuous-time analysis. The jitter performance characteristics of BPLLs are analyzed. Secondly, a 10 Gbps clock and data recovery (CDR) chip for SONET OC- 192, the mainstream standard for optical serial data links, is presented. The CDR is based on a novel referenceless dual-loop half-rate architecture. It includes a binary phase-locked loop based on a quad-level phase detector and a linear frequency-locked loop based on a linear frequency detector. The proposed architecture enables the CDR to achieve large locking range and small jitter generation at the same time. The prototype is implemented in 0.18 μm CMOS technology and consumes 250 mW under 1.8 V supply. The jitter generation is 0.5 ps-rms and 4.8 ps-pp. The jitter peaking and jitter tolerance performance exceeds the specifications defined by SONET OC-192 standard. Thirdly, a fully-differential divide-by-eight injection-locked frequency divider with low power dissipation is presented. The frequency divider consists of a four-stage ring of CML (current mode logic) latches. It has a maximum operating frequency of 18 GHz. The ratio of locking range over center frequency is up to 50%. The prototype chip is implemented in 0.18 μm CMOS technology and consumes 3.6 mW under 1.8 V supply. Lastly, the design and optimization techniques of fully differential charge pumps are discussed. Techniques are proposed to minimize the nonidealities associated with a fully differential charge pump, including differential mismatch, output current variation, low-speed glitches and high-speed glitches. The performance improvement brought by the techniques is verified with simulations of schematics designed in 0.35 μm CMOS technology.

Nachrichtentechnische Systeme werden stets durch unvermeidbare zufällige Störungen beeinflußt. Neben anderen Komponenten sind davon besonders Oszillatoren betroffen. Die durch die Störungen verursachten zufälligen Schwankungen in der Oszillatorausgabe können als Amplituden- und Phasenabweichungen modelliert werden. Dabei zeigt sich, daß vor allem zufällige Phasenfluktuationen von Bedeutung sind. Zufällige Phasenfluktuationen können unter Verwendung stochastischer Prozesse zweiter Ordnung mit kurzem oder langem Gedächtnis modelliert werden. Inhalt der Dissertation ist die Herleitung eines Verfahrens zur Simulation zufälliger Phasenfluktuationen von Oszillatoren mit kurzem Gedächtnis unter Berücksichtigung von Datenblattangaben.

Ο στόχος της διπλωματικής αυτής εργασίας είναι η μελέτη ενός διαφορικού ταλαντωτή Collpits ο οποίος λειτουργεί ως διαιρέτης συχνότητας με έγχυση ρεύματος στην πηγή, χαμηλού θορύβου και διαφορικής εισόδου, ως προς την κατανάλωση και το θόρυβο. Επίσης συγκρίνεται η απόδοσή του σε αυτούς τους τομείς με την απόδοση άλλων τοπολογιών αναλογικών διαιρετών συχνότητας αλλά και ψηφιακών. / The objective of this thesis is to study a Collpits differential oscillator which works as a low noise and differential input, current source injection frequency divider, by taking into account consumption and noise. Also the performance in these areas is compared with other topologies of analogue and/or digital frequency dividers.

Sources of flicker noise generation in the cross-coupled negative resistance oscillator (NMOS, PMOS, and CMOS) are explored. Also, prior and current work in the area of phase noise modeling is reviewed, including the work of Leeson, Hajimiri, Hegazi, and others, seeking the mechanisms by which flicker noise is upconverted. A Figure of Merit (FOM) methodology suitable to the 1/f3 phase noise region is also developed, which allows a new quantity, FOM1, to be defined. FOM1 is proportional to flicker noise upconverted, thus allowing the effectiveness of flicker noise upconversion suppression techniques to be evaluated, despite possibly changing bias points or tank Q, which would change phase noise and FOM in the 1/f2 region. The work of Hajimiri is extended with a simple Amplitude ISF DC component estimator for the special case of LC CMOS oscillators. A method of adaptive control of an oscillator core is presented, as well, comprised of a CMOS oscillator with a digitally adjustable N and P width, and a circuit (which is essentially a tracking ADC) which repeatedly adjusts the relative N to P width dependent on the estimate to maintain the condition of minimum flicker noise upconversion. A fixed calibration constant is sufficient to allow convergence to within 0.7dB of optimal FOM1 for all cases of N width, for a varactorless oscillator test cell. Finally, a circuit is proposed which would allow the flicker noise reduction technique of cycling to accumulation to be applied to continuous time oscillators, but is not rigorously vetted.

The recent development of the commercially viable thin film electro-acoustic technology has triggered a growing interest in the research of plate guided wave or Lamb wave components owing to their unique characteristics. In the present thesis i) an experimental study of the thin film plate resonators (FPAR) performance operating on the lowest symmetrical Lamb wave (S0) propagating in highly textured AlN membranes versus a variety of design parameters has been performed. The S0 mode is excited through an Interdigital Transducer and confined within the structure by means of reflection from metal strip gratings. Devices operating in the vicinity of the stop-band center exhibiting a Q-value of up to 3000 at a frequency around 900MHz have been demonstrated. Temperature compensation of this type of devices has been studied theoretically and successfully realized experimentally for the first time. Further, integrated circuit-compatible S0 Lamb based two-port FPAR stabilized oscillators exhibiting phase noise of -92 dBc/Hz at 1 kHz frequency offset with feasible thermal noise floor below -180 dBc/Hz have been tested under high power for a couple of weeks. More specifically, the FPARs under test have been running without any performance degradation at up to 27 dBm loop power. Further, the S0 mode was experimentally demonstrated to be highly mass and pressure sensitive as well as suitable for in-liquid operation, which together with low phase noise and high Q makes it very suitable for sensor applications; ii) research in view of FPARs operating on other types of Lamb waves as well as novel operation principles has been initiated. In this work, first results on the design, fabrication and characterization of two novel type resonators: The Zero Group Velocity Resonators (ZGVR) and The Intermode-Coupled Thin Film Plate Acoustic Resonators (IC-FPAR), exploiting new principles of operation have been successfully demonstrated. The former exploits the intrinsic zero group velocity feature of the S1 Lamb mode for certain combination of design parameters while the latter takes advantage of the intermode interaction (involving scattering) between S0 and A1 Lamb modes through specially designed metal strip gratings (couplers). Thus both type of resonators operate on principles of confining energy under IDT other than reflection.

Timing jitter and phase noise are important design considerations in most electronic systems, particularly communication systems. The desire for faster transmission speeds and higher levels of integration, combined with lower signal levels and denser circuit boards has placed greater emphasis on managing problems related to phase noise, timing jitter, and timing distribution. This thesis reports original work on phase noise modelling in electronic systems. A new model is proposed which predicts the up-conversion of baseband noise to the carrier frequency in RF amplifiers. The new model is validated by comparing the predicted phase noise performance to experimental measurements as it applies to a common emitter (CE), bipolar junction transistor (BJT) amplifier. The results show that the proposed model correctly predicts the measured phase noise, including the shaping of the noise about the carrier frequency, and the dependence of phase noise on the amplifier parameters. In addition, new work relating to timing transfer in digital communication systems is presented. A new clock recovery algorithm is proposed for decoding timing information encoded using the synchronous residual time-stamp (SRTS) method. Again, theoretical analysis is verified by comparison with an experimental implementation. The results show that the new algorithm correctly recovers the source clock at the destination, and satisfies the jitter specification set out by the ITU-T for G.702 signals.