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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

オープンアクセスジャーナルの現状

三根, 慎二, Mine, Shinji 08 1900 (has links)
No description available.
2

Advanced Site-Specific Propagation Prediction Techniques

Durgin, Gregory David 11 May 1998 (has links)
This thesis describes advanced techniques for site-specific propagation prediction. The need for accurate site-specific propagation is discussed in the context of current trends in the wireless industry. The first half of the report is dedicated to measuring and modeling continuous wave (CW) local-area path loss. Specifically, the text uses examples from a 5.85 GHz CW measurement campaign in and around suburban homes. Not only do these measurements demonstrate the validity of the original models and techniques presented in the thesis, but the results themselves may prove particularly useful for developing in-home wireless devices operating in the National Information Infrastructure band. This unlicensed spectrum was allocated in January of 1997 and holds promising applications for public and private telecommunications, home-based wireless internet, wireless local loops, and any number of wideband wireless applications. There is an in-depth development of deterministic propagation prediction techniques in the latter half of the thesis. The use of geometrical optics for terrestrial microwave propagation is discussed as well as an overview of the numerous ray tracing techniques that exist in the literature. Finally, a new 3D ray launching method is presented which improves upon many of the existing ray tracing algorithms. The thesis demonstrates how this algorithm is capable of recovering very detailed channel information from a wideband deterministic propagation prediction. / Master of Science
3

Mapping and Modeling Chlorophyll-a Concentrations in Utah Lake Using Landsat 7 ETM+ Imagery

Narteh, Victor Nii Afum 13 July 2011 (has links) (PDF)
This study shows the results of testing previous research that used remote sensing techniques to determine chlorophyll-a concentrations in turbid surface waters, and developing similar methods and models for Utah Lake using Landsat 7 ETM+ satellite imagery and field measured concentrations of chlorophyll-a. The data for the study included images acquired on June 22 and July 8, 2009. The field data included ground measurements taken on June 22 and July 6, 2009 from seven water quality sampling locations. The 48 hour time difference between the Landsat image acquisition (July 8) and the field measurement (July 6), and the small sample size for the data analysis were potential sources of error. The log transformation of red/near-infrared reflectance (i.e. ln[Band3/Band4]) had a high correlation with the field measured chlorophyll-a concentrations (R^2 = 0.9337). With this relationship, a model and 19 contour maps showing the spatial distribution of chlorophyll-a concentrations over Utah Lake was developed for the spring, summer, and fall seasons of 2003 to 2010. Generally about 90% of the Lake area had chlorophyll-a concentrations lower than 20µg/L. High concentrations of Chlorophyll-a (355µg/L and over) were observed mostly at the Provo Bay and Goshen Bay areas of the Lake. Occasionally, elevated levels of chlorophyll-a were observed at the northeastern, middle, and western sections of the lake. Utah Lake's average chlorophyll-a concentration is declining over time. In spring, the Lake average chlorophyll-a concentration reduced from 30.51µg/L in 2004 to 7.08µg/L in 2010. In summer, this average reduced from 132.13µg/L in 2003 to 36.58µg/L in 2010. Finally, in fall, the Lake average chlorophyll-a concentration reduced from 273.40µg/L in 2006 to 33.59µg/L in 2010. Field measured concentrations of phosphorus and model estimates for chlorophyll-a concentrations were highly correlated (R^2 = 0.9046). This suggests that the elevated levels of chlorophyll-a might be a result of the point and non-point discharge of phosphorus-laden wastewater from treatment plants, municipal storm drains, and agricultural activities.
4

Impact of Inflation on Return and Pricing of Swedish Bank Stocks : A Fama-French Analysis on Monthly Stock Returns and Pricing of Handelsbanken, Swedbank, SEB and Nordea

Westerberg, Carl, Rolder, Elvin January 2023 (has links)
This study explores the influence of inflation on the monthly total stock returns and stock pricing of Swedish banks. The research question is systematically examined througha cross sectional and time series analysis, utilizing Fama-French, Carhart, and Fama-Macbeth metodologies. Contrary to the initial hypothesis, the outcomes from the Fama-French-Carhart regression, incorporating the inflation factor, reveal a consistently negative effect of inflationon stock returns across Swedish banks. This unexpected result challenges the anticipated relationship between inflation and stock returns. Furthermore, the assessment of risk premiums via the Fama-Macbeth regression does not identify a statistically significant risk premium for inflation exposure. These findings contribute to understanding the dynamics between inflation and the financial performance of Swedish banks, prompting further inquiry into the factors influencing stock returns in the presence of inflationary pressures.
5

5-6 GHz RFIC Front-End Components in Silicon Germanium HBT Technology

Johnson, Daniel Austin 10 May 2001 (has links)
In 1997 the Federal Communications Commission (FCC) released 300 MHz of spectrum between 5-6 GHz designated the unlicensed national information infrastructure (U-NII) band. The intention of the FCC was to provide an unlicensed band of frequencies that would enable high-speed wireless local area networks (WLANs) and facilitate wireless access to the national information infrastructure with a minimum interference to other devices. Currently, there is a lack of cost-effective technologies for developing U-NII band components. With the commercial market placing emphasis on low cost, low power, and highly integrated implementations of RF circuitry, alternatives to the large and expensive distributed element components historically used at these frequencies are needed. Silicon Germanium (SiGe) BiCMOS technology represents one possible solution to this problem. The SiGe BiCMOS process has the potential for low cost since it leverages mature Si process technologies and can use existing Si fabrication infrastructure. In addition, SiGe BiCMOS processes offer excellent high frequency performance through the use of SiGe heterojunction bipolar transistors (HBTs), while coexisting Si CMOS offers compatibility with digital circuitry for high level 'system-on-a-chip' integration. The work presented in this thesis focuses on the development of a SiGe RFIC front-end for operation in the U-NII bands. Specifically, three variants of a packaged low noise amplifier (LNA) and a packaged active x2 sub-harmonic mixer (SHM) have been designed, simulated and measured. The fabrication of the Rifts was through the IBM SiGe foundry; the packaging was performed by RF Micro devices. The mixer and LNA designs were fabricated on separate die, packaged individually, and on-chip matched to a 50 ohm system so they could be fully characterized. Measurements were facilitated in a coaxial system using standard FR4 printed circuit boards. The LNA designs use a single stage, cascoded topology. The input ports are impedance matched using inductive emitter degeneration through bondwires to ground. One version of the LNA uses an shunt inductor/series capacitor output match while the other two variation use a series inductor output match. Gain, isolation, match, linearity and noise figure (NF) were used to characterize the performance of the LNAs in the 5 - 6 GHz frequency band. The best LNA design has a maximum gain of 9 dB, an input VSWR between 1.6:1 and 2:1, an output match between 1.7:1 and 3.6:1, a NF better than 3.9 dB and an input intercept point (IIP3) greater than 5.4 dBm. The LNA operates from a 3.3 V supply voltage and consumes 4 mA of current. The SHM is an active, double-balance mixer that achieves x2 sub-harmonic mixing through two quadrature (I/Q) driven, stacked Gilbert-cell switching stages. Single-ended-to-differential conversion, buffering and I/Q phase separation of the LO signal are integrated on-chip. Measurements were performed to find the optimal operating range for the mixer, and the mixer was characterized under these sets of conditions. It was found that the optimal performance of the mixer occurs at an IF of 250-450 MHz and an LO power of -5 dBm. Under these conditions, the mixer has a measured conversion gain of 9.3 dB, a P_1-dB of -15.7 dBm and an 2LO/RF isolation greater than 35 dB at 5.25 GHz. At 5.775 GHz, the conversion gain is 7.7 dB, the P<sub>1-dB</sub> is -15.0 dBm, and the isolation is greater than 35 dB. The mixer core consumes 9.5 mA from a 5.0 V supply voltage. This work is sponsored by RF Microdevices (RFMD)through the CWT affiliate program.The author was supported under a Bradley Foundation fellowship. / Master of Science
6

A 5-6 Ghz Silicon-Germanium Vco With Tunable Polyphase Outputs

Sanderson, David Ivan 22 May 2003 (has links)
In-phase and quadrature (I/Q) signal generation is often required in modern transceiver architectures, such as direct conversion or low-IF, either for vector modulation and demodulation, negative frequency recovery in direct conversion receivers, or image rejection. If imbalance between the I and Q channels exists, the bit-error-rate (BER) of the transceiver and/or the image rejection ratio (IRR) will quickly deteriorate. Methods for correcting I/Q imbalance are desirable and necessary to improve the performance of quadrature transceiver architectures and modulation schemes. This thesis presents the design and characterization of a monolithic 5-6 GHz Silicon Germanium (SiGe) inductor-capacitor (LC) tank voltage controlled oscillator (VCO) with tunable polyphase outputs. Circuits were designed and fabricated using the Motorola 0.4 ìm CDR1 SiGe BiCMOS process, which has four interconnect metal layers and a thick copper uppermost bump layer for high-quality radio frequency (RF) passives. The VCO design includes full-wave electromagnetic characterization of an electrically symmetric differential inductor and a traditional dual inductor. Differential effective inductance and Q factor are extracted and compared for simulated and measured inductors. At 5.25 GHz, the measured Q factors of the electrically symmetric and dual inductors are 15.4 and 10.4, respectively. The electrically symmetric inductor provides a measured 48% percent improvement in Q factor over the traditional dual inductor. Two VCOs were designed and fabricated; one uses the electrically symmetric inductor in the LC tank circuit while the other uses the dual inductor. Both VCOs are based on an identical cross-coupled, differential pair negative transconductance -GM oscillator topology. Analysis and design considerations of this topology are presented with a particular emphasis on designing for low phase noise and low-power consumption. The fabricated VCO with an electrically symmetric inductor in the tank circuit tunes from 4.19 to 5.45 GHz (26% tuning range) for control voltages from 1.7 to 4.0 V. This circuit consumes 3.81 mA from a 3.3 V supply for the VCO core and 14.1 mA from a 2.5 V supply for the output buffer. The measured phase noise is -115.5 dBc/Hz at a 1 MHz offset and a tank varactor control voltage of 1.0 V. The VCO figure-of-merit (FOM) for the symmetric inductor VCO is -179.2 dBc/Hz, which is within 4 dBc/Hz of the best reported VCO in the 5 GHz frequency regime. The die area including pads for the symmetric inductor VCO is 1 mm x 0.76 mm. In comparison, the dual inductor VCO tunes from 3.50 to 4.58 GHz (27% tuning range) for control voltages from 1.7 to 4.0 V. DC power consumption of this circuit consists of 3.75 mA from a 3.3 V supply for the VCO and 13.3 mA from a 2.5 V supply for the buffer. At 1 MHz from the carrier and a control voltage of 0 V, the dual inductor VCO has a phase noise of -104 dBc/Hz. The advantage of the higher Q symmetric inductor is apparent by comparing the FOM of the two VCO designs at the same varactor control voltage of 0 V. At this tuning voltage, the dual inductor VCO FOM is -166.3 dBc/Hz compared to -175.7 dBc/Hz for the symmetric inductor VCO -- an improvement of about 10 dBc/Hz. The die area including pads for the dual inductor VCO is 1.2 mm x 0.76 mm. In addition to these VCOs, a tunable polyphase filter with integrated input and output buffers was designed and fabricated for a bandwidth of 5.15 to 5.825 GHz. Series tunable capacitors (varactors) provide phase tunability for the quadrature outputs of the polyphase filter. The die area of the tunable polyphase with pads is 920 ìm x 755 ìm. The stand-alone polyphase filter consumes 13.74 mA in the input buffer and 6.29 mA in the two output buffers from a 2.5 V supply. Based on measurements, approximately 15° of I/Q phase imbalance can be tuned out using the fabricated polyphase filter, proving the concept of tunable phase. The output varactor control voltages can be used to achieve a potential ±5° phase flatness bandwidth of 700 MHz. To the author's knowledge, this is the first reported I/Q balance tunable polyphase network. The tunable polyphase filter can be integrated with the VCO designs described above to yield a quadrature VCO with phase tunable outputs. Based on the above designs I/Q tunability can be added to VCO at the expense of about 6 mA. Future work includes testing of a fabricated version of this combined polyphase VCO circuit. / Master of Science
7

SiGe BiCMOS RF ICs and Components for High Speed Wireless Data Networks

Svitek, Richard M. 28 April 2005 (has links)
The advent of high-fT silicon CMOS/BiCMOS technologies has led to a dramatic upsurge in the research and development of radio and microwave frequency integrated circuits (ICs) in silicon. The integration of silicon-germanium heterojunction bipolar transistors (SiGe HBTs) into established "digital" CMOS processes has provided analog performance in silicon that is not only competitive with III-V compound-semiconductor technologies, but is also potentially lower in cost. Combined with improvements in silicon on-chip passives, such as high-Q metal-insulator-metal (MIM) capacitors and monolithic spiral inductors, these advanced RF CMOS and SiGe BiCMOS technologies have enabled complete silicon-based RF integrated circuit (RFIC) solutions for emerging wireless communication standards; indeed, both the analog and digital functionalities of an entire wireless system can now be combined in a single IC, also known as a wireless "system-on-a-chip" (SoC). This approach offers a number of potential benefits over multi-chip solutions, such as reductions of parasitics, size, power consumption, and bill-of-materials; however, a number of critical challenges must be considered in the integration of such SoC solutions. The focus of this research is the application of SiGe BiCMOS technology to on-going challenges in the development of receiver components for high speed wireless data networks. The research seeks to drive SoC integration by investigating circuit topologies that eliminate the need for off-chip components and are amenable to complete on-chip integration. The first part of this dissertation presents the design, fabrication, and measurement of a 5--6GHz sub-harmonic direct-conversion-receiver (DCR) front-end, implemented in the IBM 0.5um 5HP SiGe BiCMOS process. The design consists of a fully-differential low-noise amplifier (LNA), a set of quadrature (I and Q)x~2 sub-harmonic mixers, and an LO conditioning chain. The front-end design provides a means to address performance limitations of the DCR architecture (such as DC-offsets, second-order distortion, and quadrature phase and amplitude imbalances) while enabling the investigation of high-frequency IC design complications, such as package parasitics and limited on-chip isolation. The receiver front-end has a measured conversion gain of ~18dB, an input second-order intercept point of +17.5dBm, and a noise figure of 7.2dB. The quadrature phase balance at the sub-harmonic mixer IF outputs was measured in the presence of digital switching noise; 90<degree> balance was achieved, over a specific range of LO power levels, with a square wave noise signal injected onto the mixer DC supply rails. The susceptibility of receiver I/Q balance to mixed-signal effects in a SoC environment motivates the second part of this dissertation --- the design of a phase and amplitude tunable, quadrature voltage-controlled oscillator (QVCO) for the on-chip synthesis of quadrature signals. The QVCO design, implemented in the Freescale (formerly Motorola) 0.18um SiGe:C RFBiCMOS process, uses two identical, differential LC-tank VCOs connected such that the two oscillator outputs lock in quadrature to the same frequency. The QVCO designs proposed in this work provide the additional feature of phase-tunability, i.e. the relative phase balance between the quadrature outputs can be adjusted dynamically, offering a simulated tuning range of ~90<degree>+/-10â ¹degree> in addition, a variable-gain buffer/amplifier circuit that provides amplitude tunability is introduced. One potential application of the QVCO is in a self-correcting RF receiver architecture, which, using the phase and amplitude tunability of the QVCO, could dynamically adjust the IF output quadrature phase and amplitude balance, in near real-time, in the analog-domain. The need for high-quality inductors in both the DCR and QVCO designs motivates the third aspect of this dissertation --- the characterization and modeling of on-chip spiral inductors with patterned ground shields, which are placed between the inductor coil and the underlying substrate in order to improve the inductor quality factor (Q). The shield prevents the coupling of energy away from the inductor spiral to the typically lossy Si substrate, while the patterning disrupts the flow of induced image currents within the shield. The experimental effort includes the fabrication and testing of a range of inductors with different values, and different types of patterned ground shields in different materials. Two-port measurements show a ~50% improvement in peak-Q and a ~20% degradation in self-resonant frequency for inductors with shields. From the measured results, a scalable lumped element model is developed for the rapid simulation of spiral inductors with and without patterned ground shields. The knowledge gained from this work can be combined and applied to a range of future RF/wireless SoC applications. The designs developed in this dissertation can be ported to other technologies (e.g. RF CMOS) and scaled to other frequency ranges (e.g. 24GHz ISM band) to provide solutions for emerging applications that require low-cost, low-power RF/microwave circuit implementations. / Ph. D.
8

Design and Characterization of RFIC Voltage Controlled Oscillators in Silicon Germanium HBT and Submicron MOS Technologies

Klein, Adam Sherman 18 August 2005 (has links)
Advances in wireless technology have recently led to the potential for higher data rates and greater functionality. Wireless home and business networks and 3G and 4G cellular phone systems are promising technologies striving for market acceptance, requiring low-cost, low-power, and compact solutions. One approach to meet these demands is system-on-a-chip (SoC) integration, where RF/analog and digital circuitry reside on the same chip, creating a mixed-signal environment. Concurrently, there is tremendous incentive to utilize Si-based technologies to leverage existing fabrication and design infrastructure and the corresponding economies of scale. While the SoC approach is attractive, it presents major challenges for circuit designers, particularly in the design of monolithic voltage controlled oscillators (VCOs). VCOs are important components in the up or downconversion of RF signals in wireless transceivers. VCOs must have very low phase noise and spurious emissions, and be extremely power efficient to meet system requirements. To meet these specifications, VCOs require high-quality factor (Q) tank circuits and reduction of noise from active devices; however, the lack of high-quality monolithic inductors, along with low noise transistors in traditional Si technologies, has been a limiting factor. This thesis presents the design, characterization, and comparison of three monolithic 3-4 GHz VCOs and an integrated 5-6 GHz VCO with tunable polyphase outputs. Each VCO is designed around a differential -G_{M} core with an LC tank circuit. The circuits exploit two Si-based device technologies: Silicon Germanium (SiGe) Heterojunction Bipolar Transistors (HBTs) for a cross-coupled collectors circuit and Graded-Channel MOS (GC-MOS) transistors for a complementary (CMOS) implementation. The circuits were fabricated using the Motorola 0.4 μm CDR1 SiGe BiCMOS process, which consists of four interconnected metal layers and a thick copper (10 μm) metal bump layer for improved inductive components. The VCO implementations are targeted to meet the stringent phase noise specifications for the GSM/EGSM 3G cellular standard. The specifications state that the VCO output cannot exceed -162 dBc/Hz sideband noise at 20 MHz offset from the carrier. Simultaneously, oscillators must be designed to address other system level effects, such as feed-through of the local oscillator (LO). LO feed-through directly results in self-mixing in direct conversion receivers, which gives rise to unwanted corrupting DC offsets. Therefore, a system-level strategy is employed to avoid such issues. For example, multiplying the oscillator frequency by two or four times can help avoid self-mixing during downconversion by moving the LO out of the bandwidth of the RF front-end. Meanwhile, direct conversion or low-IF (intermediate frequency) receiver architectures utilize in-phase and quadrature (I/Q) downconversion signal recovery and image rejection. Any imbalance between the I and Q channels can result in an increase in bit-error-rate (BER) and/or decrease in the image rejection ratio (IRR). To compensate for such an imbalance, an integrated tunable polyphase filter is implemented with a VCO. Control voltages between the differential I and Q channels can be individually controlled to help compensate for I/Q mismatches. This thesis includes an introduction to design flow and layout strategies for oscillator implementations. A detailed comparison of the advantages and disadvantages of the SiGe HBTs and GC-MOS device in 3-4 GHz VCOs is presented. In addition, an overview of full-wave electromagnetic characterization of differential dual inductors is given. The oscillators are characterized for tuning range, output power, and phase noise. Finally, new measurement techniques for the 5-6 GHz VCO with a tunable polyphase filter are explored. A comparison between the time and frequency approaches is also offered. / Master of Science
9

IRRBB in a Low Interest Rate Environment / : IRRBB i en lågräntemiljö

Berg, Simon, Elfström, Victor January 2020 (has links)
Financial institutions are exposed to several different types of risk. One of the risks that can have a significant impact is the interest rate risk in the bank book (IRRBB). In 2018, the European Banking Authority (EBA) released a regulation on IRRBB to ensure that institutions make adequate risk calculations. This article proposes an IRRBB model that follows EBA's regulations. Among other things, this framework contains a deterministic stress test of the risk-free yield curve, in addition to this, two different types of stochastic stress tests of the yield curve were made. The results show that the deterministic stress tests give the highest risk, but that the outcomes are considered less likely to occur compared to the outcomes generated by the stochastic models. It is also demonstrated that EBA's proposal for a stress model could be better adapted to the low interest rate environment that we experience now. Furthermore, a discussion is held on the need for a more standardized framework to clarify, both for the institutions themselves and the supervisory authorities, the risks that institutes are exposed to. / Finansiella institutioner är exponerade mot flera olika typer av risker. En av de risker som kan ha en stor påverkan är ränterisk i bankboken (IRRBB). 2018 släppte European Banking Authority (EBA) ett regelverk gällande IRRBB som ska se till att institutioner gör tillräckliga riskberäkningar. Detta papper föreslår en IRRBB modell som följer EBAs regelverk. Detta regelverk innehåller bland annat ett deterministiskt stresstest av den riskfria avkastningskurvan, utöver detta så gjordes två olika typer av stokastiska stresstest av avkastningskurvan. Resultatet visar att de deterministiska stresstesten ger högst riskutslag men att utfallen anses vara mindre sannolika att inträffa jämfört med utfallen som de stokastiska modellera genererade. Det påvisas även att EBAs förslag på stressmodell skulle kunna anpassas bättre mot den lågräntemiljö som vi för tillfället befinner oss i. Vidare förs en diskussion gällande ett behov av ett mer standardiserat ramverk för att tydliggöra, både för institutioner själva och samt övervakande myndigheter, vilka risker institutioner utsätts för.
10

台灣網際網路的變遷:一個政治經濟角度的初步考察(1979-1999) / The Internet Movement in Taiwan from the Perspective of Political Economy (1979-1999)

黃慧櫻, Huang, Hui-Ying Unknown Date (has links)
1995年網際網路正式成為台灣社會的消費產品,以往則是侷限於學術領域的非營利使用;1996年以後,科技官僚與通訊和資訊業者履稱網際網路已成為「全民運動」。本研究的主題即分析網際網路作為一項新事物,諸種政治與經濟力量如何塑造其於台灣社會的發展過程。首先探討發展現況,指出網際網路因循傳播資源分配的不平等現象,而且國家機器、通訊和資訊業資本連袂將公眾變賣為消費者。其次爬梳網際網路在台灣的變遷歷程,由於1970年代國家機器訂定資訊工業為策略工業,鋪造未來發展網際網路所需要的技術條件,以及國家機器主導科技政策協助經濟發展的局面;時至1996年,網際網路被國家機器扶為國家資訊通信基本建設(NII)的主軸,用以謀求經濟的進一步發展。在這期間國家機器不斷製造的高科技意識型態,經由重視通訊和資訊業廣告預算的傳播媒體再生產與銷售「全民運動」的假象與迷思。

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