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High-frequency and large amplitude current is a driving requirement for applications such as induction heating, wireless power transfer, power amplifier for magnetic resonant imaging, electronic ballasts, and ozone generators. Voltage-fed resonant inverters are normally employed, however, current-fed (CF) resonant inverters are a competitive alternative when the quality factor of the load is significantly high. The input current of a CF resonant inverter is considerably smaller than the output current, which benefits efficiency. A simple, parallel resonant tank is sufficient to create a high-power sinusoidal signal at the output. Additionally, input current is limited at the no-load condition, providing safe operation of the system. Drawbacks of the CF resonant inverter are associated with the implementation of the equivalent current source. A large input inductor is required to create an equivalent dc current source, to reduce power density and the bandwidth of the system. For safety, a switching stage is implemented using bidirectional voltage-blocking switches, which consist of a series connection of a diode and a transistor. The series diode experiences significant conduction loss because of large on-state voltage. The control of the output current amplitude for constant-frequency inverters requires a pre-regulation stage, typically implemented as a cascaded hard-switched dc/dc buck converter. The pre-regulation also reduces the efficiency. In this dissertation, a variety of CF resonant inverters with two input inductors and two grounded switches are investigated for an inductive-load driver with loaded quality factor larger than ten, constant and high-frequency (~500 kHz) operation, high reactive output power (~14 kVA), high bandwidth (~100 kHz), and high efficiency (over 95 %). The implementation of such system required to question the fundamental operation of the CF resonant inverter. The input inductance is reduced by around an order of magnitude, ensuring sufficient bandwidth, and allowing rich harmonic content in the input current. Of particular importance are fundamental and second harmonic components since they influence synchronization of the zero-crossing of the output voltage and the turn-on of the switches. The synchronization occurs at a particular frequency, termed synchronous frequency, and it allows for zero switching loss in the switches, which greatly boosts efficiency. The synchronous conditions were not know prior this work, and the dependence among circuit parameters, input current harmonics, and synchronous frequency are derived for the first time. The series diode of the bidirectional switch can reduce the efficiency of the system to below 90 %, and has to be removed from the system. The detrimental current-spikes can occur if the inverter is not operated in synchronous condition, such as in transients, or during parametric variations of the load coil. The resistance of the load coil has a wide variance, five times or more, while the inductance changes as well by a few percent. To accommodate for non-synchronous conditions, a low-loss current snubber is proposed as a safety measure to replace lossy diodes. The center-piece of the dissertation is the proposal of a two-phase zero-voltage switching buck pre-regulator, as it enables fixed frequency and synchronous operation of the inverter under wide parametric variations of the load. The synchronous operation is controlled by phase-shifting the switching functions of the pre-regulator and inverter. The pre-regulator reduces the dc current in the input inductors, which is a main contributor to current stress and conduction losses in the inverter switches. Total loss of the inverter switches is minimized since no switching loss is present and minimal conduction losses are allowed. The dc current in the input inductors, once seen as a means to transfer power to load, is now contradictory perceived as parasitic, and the power is transferred to the load using a fundamental frequency harmonic! The input current to the resonant tank, previously designed to be a square-wave, now resembles a sine-wave with very rich harmonic content. Additionally, the efficiency of the pre-regulator at heavy-load condition is improved by ensuring ZVS for with an additional inductive tank. The dissertation includes five chapters. The first chapter is an introduction to current-fed resonant inverters, applications, and state-of-the-art means to ensure constant frequency operation under load's parametric variations. The second chapter is dedicated to the optimization of the CF resonant inverter topology with a dc input voltage, two input inductors, and two MOSFETs. The topology is termed as a boost amplifier. If the amplifier operates away from the synchronous frequency, detrimental current spikes will flow though the switches since the series diodes are eliminated. Current spikes reduce the efficiency up to few percent and can create false functioning of the system. Operation at the synchronous frequency is achieved with large, bulky, input inductors, typically around 1-2 mH or higher, when the synchronous frequency follows the resonant frequency of the tank at 500 kHz. The input inductance cannot be reduced arbitrarily to meet the system bandwidth requirement, since the synchronous frequency is increased based on the inductance value. The relationship between the two (input inductance and the synchronous frequency) was unknown prior this work. The synchronous frequency is determined to be a complicated mathematical function of harmonic currents through the input inductors, and it is found using the harmonic decomposition method. As a safety feature, a current snubber is implemented in series with the resonant tank. Snubber utilizes a series inductance of cable connection between the tank and the switching stage, and it is more efficient than the previously employed series diodes. Topology optimization and detailed design procedure are provided with respect to efficiency and system dynamics. The mathematics is verified by a prototype rated at 14 kVA and 1.25 kW. The input inductance is reduced by around an order of magnitude, with the synchronous frequency increase of 2 %. The efficiency of the power amplifier reached 98.5 % and might be improved further with additional optimization. Silicon carbide MOSFETs are employed for their capability to operate efficiently at high frequency, and high temperature. The third chapter is dedicated to the development of the boost amplifier's large signal model using the Generalized State-space Averaging (GSSA) method. The model accurately predicts amplifier's transient and steady-state operation for any type of input voltage source (dc, dc with sinusoidal ripple, pulse-width modulated), and for either synchronous or non-synchronous operating frequency. It overcomes the limitation of the low-frequency model, which works well only for dc voltage-source input and at synchronous frequency. As the measure of accuracy, the zero-crossing of the resonant voltage is predicted with an error less than 2° over a period of synchronous operation, and for a range of interest for input inductance (25 μH – 1000 μH) and loaded-quality factor (10 – 50). The model is validated both in simulation and hardware for start-up transient and steady-state operation. It is then used in the synthesis of modulated output waveforms, including Hann-function and trapezoidal-function envelopes of the output voltage/current. In the fourth chapter, the GSSA model is employed in development of the PWM compensation method that ensures synchronous operation at constant frequency for the wide variation of the load. The boost amplifier is extended with a cascaded pre-regulator whose main purpose is to control the output resonant voltage. The pre-regulator is implemented as two switching half-bridges with same duty-cycle and phase-shift of 180°. The behavior of the cascaded structure is the same as of the buck converter, so the half-bridges are named buck pre-regulators. ZVS operation is ensured by putting an inductive tank between the half-bridges. Each output of half-bridges is connected to each of input inductors of the boost to provide the PWM excitation. Using the GSSA model, the synchronous condition and control laws are derived for the amplifier. Properties of the current harmonics in the input inductors are well examined. It is discovered that the dc harmonic, once used to transfer power, is unwanted (parasitic) since it increases conduction loss in switches of the boost. A better idea is to use the fundamental harmonic for power transfer, since it does not create loss in the switches. Complete elimination of the dc current is not feasible for constant frequency operation of the amplifier since the dc current depends on the load coil's resistance. However, significant mitigation of around 55 % is easily achievable. The proposed method improves significantly the efficiency of both the buck pre-regulator and the boost. Synchronous operation is demonstrated in hardware for fixed switching frequency of 480 kHz, power level up to 750 W, input voltage change from 300 V to 600 V, load coil's resistance change of three times, and load coil's inductance change of 3.5 %. Measured efficiency is around 95 %, with a great room for improvements. Chapter five summarizes key contributions and concludes the dissertation. / Ph. D.

This paper describes the design, fabrication, and testing of a 1.2 kV, 6.5 mΩ, half-bridge, SiC MOSFET power module to evaluate the impact of parametric device tolerances on electrical and thermal performance. Paralleling power devices increases current handling capability for the same bus voltage. However, inherent parametric differences among dies leads to unbalanced current sharing causing overstress and overheating. In this design, a symmetrical DBC layout is utilized to balance parasitic inductances in the current pathways of paralleled dies to isolate the impact of parametric tolerances. In addition, the paper investigates the benefits of flexible PCB in place of wire bonds for the gate loop interconnection to reduce and minimize the gate loop inductance. The balanced modules have dies with similar threshold voltages while the unbalanced modules have dies with unbalanced threshold voltages to force unbalanced current sharing. The modules were placed into a clamped inductive DPT and a continuous, boost converter. Rogowski coils looped under the wire bonds of the bottom switch dies to observe current behavior. Four modules performed continuously for least 10 minutes at 200 V, 37.6 A input, at 30 kHz with 50% duty cycle. The modules could not perform for multiple minutes at 250 V with 47.7 A (23 A/die). The energy loss differential for a ~17% difference in threshold voltage ranged from 4.52% (~10 µJ) to -30.9% (~30 µJ). The energy loss differential for a ~0.5% difference in V_th ranged from -2.26% (~8 µJ) to 5.66% (~10 µJ). The loss differential was dependent on whether current unbalance due to on-state resistance compensated current unbalance due to threshold voltage. While device parametric tolerances are inherent, if the higher threshold voltage devices can be paired with devices that have higher on-state resistance, the overall loss differential may perform similarly to well-matched dies. Lastly, the most consistently performing unbalanced module with 17.7% difference in V_th had 119.9 µJ more energy loss and was 22.2°C hotter during continuous testing than the most consistently performing balanced module with 0.6% difference inV_th. / Master of Science / This paper describes the design, construction, and testing of advanced power devices for use in electric vehicles. Power devices are necessary to supply electricity to different parts of the vehicle; for example, energy is stored in a battery as direct current (DC) power, but the motor requires alternating current (AC) power. Therefore, power electronics can alter the energy to be delivered as DC or AC. In order to carry more power, multiple devices can be used together just as 10 people can carry more weight than 1 person. However, because the devices are not perfect, there can be slight differences in the performance of one device to another. One device may have to carry more current than another device which could cause failure earlier than intended. In this research project, multiple power devices were placed into a package, or "module." In a control module, the devices were selected with similar properties to one another. In an experimental module, the devices were selected with properties very different from one another. It was determined that the when the devices were 17.7% difference, there was 119.9 µJ more energy loss and it was 22.2°C hotter than when the difference was only 0.6%. However, the severity of the difference was dependent on how multiple device characteristics interacted with one another. It may be possible to compensate some of the impact of device differences in one characteristic with opposing differences in another device characteristic.

This work investigates the voltage scaling feasibility of several low voltage SiC MOSFET modules operated as a single series-connected switch using active gate control. Both multilevel and two-level topologies are capable of achieving higher blocking voltages in high-power converter applications. Compared to multilevel topologies, two-level switching topologies are of interest due to less complex circuitry, higher density, and simpler control techniques. In this work, to balance the voltage between series-connected MOSFETs, device turn-off speeds are dynamically controlled on active gate-drivers using active gate control. The implementation of the active gate control technique (specifically, turn-off dv/dt control) is described in this thesis. Experimental results of the voltage balancing behavior across eight 1.7 kV rated SiC MOSFET devices in series (6 kV total dc bus voltage) with the selected active dv/dt control scheme are demonstrated. Finally, the voltage balancing performance and switching behavior of series-connected SiC MOSFET devices are discussed. / Master of Science / According to ABB, 40% of the world's power demand is supplied by electrical energy. Specifically, in 2018, the world's electrical demand has grown by 4% since 2010. The growing need for electric energy makes it increasingly essential for systems that can efficiently and reliably convert and control energy levels for various end applications, such as electric motors, electric vehicles, data centers, and renewable energy systems. Power electronics are systems by which electrical energy is converted to different levels of power (voltage and current) depending on the end application. The use of power electronics systems is critical for controlling the flow of electrical energy in all applications of electric energy generation, transmission, and distribution. Advances in power electronics technologies, such as new control techniques and manufacturability of power semiconductor devices, are enabling improvements to the overall performance of electrical energy conversion systems. Power semiconductor devices, which are used as switches or rectifiers in various power electronic converters, are a critical building block of power electronic systems. In order to enable higher output power capability for converter systems, power semiconductor switches are required to sustain higher levels of voltage and current. Wide bandgap semiconductor devices are a particular new category of power semiconductors that have superior material properties compared to traditional devices such as Silicon (Si) Insulated-Gate Bipolar Junction Transistors (IGBTs). In particular, wide bandgap devices such as Silicon Carbide (SiC) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have better ruggedness and thermal capabilities. These properties provide wide bandgap semiconductor devices to operate at higher temperatures and switching frequencies, which is beneficial for maximizing the overall efficiency and volume of power electronic converters. This work investigates a method of scaling up voltage in particular for medium-voltage power conversion, which can be applied for a variety of application areas. SiC MOSFET devices are becoming more attractive for utilization in medium-voltage high-power converter systems due to the need to further improve the efficiency and density of these systems. Rather than using individual high voltage rated semiconductor devices, this thesis demonstrates the effectiveness of using several low voltage rated semiconductor devices connected in series in order to operate them as a single switch. Using low voltage devices as a single series-connected switch rather than a using single high voltage switch can lead to achieving a lower total on-state resistance, expectedly maximizing the overall efficiency of converter systems for which the series-connected semiconductor switches would be applied. In particular, this thesis focuses on the implementation of a newer approach of compensating for the natural unbalance in voltage between series-connected devices. An active gate control method is used for monitoring and regulating the switching speed of several devices operated in series in this work. The objective of this thesis is to investigate the feasibility of this method in order to achieve up to 6 kV total dc bus voltage using eight series-connected SiC MOSFET devices.

ABSTRACT The Lateral Double-Diffused Metal-Oxide-Semiconductor Field Effect Transistor (LDMOSFET or LDMOS) has made an enormous impact in the field of power electronics. Its integration, low cost, and power performance have made it the popular choice for power system on chips (SoC's). Over the years, much research has gone into ways of optimizing this crucial power device. Particularly, the safe operating area (SOA) has become a focus of research in order to allow a wide range of various bias schemes. More so, device ruggedness is an important factor in the usability of these devices as there are many circuits in which high current and voltage are present in a device. In this study, a conventional LDMOS is simulated using a 2-D device simulator. Two specific device enhancement techniques are implemented and analyzed, including a p+ bottom layer and an n-adaptive layer. The parasitic BJT of the LDMOS and its effect on SOA is investigated by using meaningful and in depth device cross-section analysis. The ruggedness of these devices are then considered and analyzed by means of an undamped inductive switching test (UIS). The purpose is to realize the relationship and the possible trade-offs between safe operating area enhancement and device ruggedness.

Satisfaire les besoins en énergie de manière responsable est possible grâce aux énergies renouvelables, notamment éoliennes et solaires. Cependant ces centres de captation d’énergie sont éloignés dans zones de consommation. Le transport de l’énergie via des réseaux HVDC (haute tension courant continu) permet un rendement et une flexibilité avantageuse face au transport HVAC (haute tension courant alternatif). Ceci est rendu possible grâce aux convertisseurs utilisant l’électronique de puissance. Les récents développements sur les semi-conducteurs à large bande interdite, plus particulièrement le carbure de silicium (SiC) offrent la possibilité de concevoir ces convertisseurs plus simples, utilisant des briques technologiques de plus fort calibre (≤ 10 kV). Cependant le packaging, essentiel à leur bon fonctionnement, ne suit pas ces évolutions. Dans cette thèse, nous explorons les technologies actuelles ainsi que les limites physique et normatives liées au packaging haute tension. Des solutions innovantes sont proposées pour concevoir un module de puissance haute tension, impactant que faiblement les paramètres connexes (résistance thermique, isolation électrique et paramètres environnementaux). Les éléments identifiés comme problématiques sont traités individuellement. La problématique des décharges partielles sur les substrats céramiques métallisés est développée et une solution se basant sur les paramètres géométriques a été testée. Le boitier standard type XHP-3 a été étudié et une solution permettant de le faire fonctionner à 10 kV à fort degré de pollution a été développée. / The supply of carbon-free energy is possible with renewable energy. However, windfarms and solar power plants are geographically away from the distribution points. Transporting the energy using the HVDC (High Voltage Direct Current) technology allow for a better yield along the distance and result in a cost effective approach compared to HVAC (High Voltage Alternative Current) lines. Thus, there is a need of high voltage power converters using power electronics. Recent development on wide bandgap semiconductors, especially silicon carbide (SiC) allow a higher blocking voltage (around 10 kV) that would simplify the design of such power electronic converters. On the other hand, the development on packaging technologies needs to follow this trend. In this thesis, an exploration of technological and normative limitation has been done for a high voltage power module design. The main hot spot are clearly identified and innovative solutions are studied to provide a proper response with a low impact on parasitic parameters. Partial Discharges (PD) on ceramic substrates is analyzed and a solution of a high Partial Discharge Inception Voltage (PDIV) is given based on geometrical parameters. The XHP-3 like power modules are studied and a solution allowing a use under 10 kV at a high pollution degree (PD3) is given.

Cette étude porte sur l’intégration hybride de transistors à un électron (single-electron transistor, SET) dans un noeud technologique CMOS. Les SETs présentent de forts potentiels, en particulier en termes d’économies d’énergies, mais ne peuvent complètement remplacer le CMOS dans les circuits électriques. Cependant, la combinaison des composants SETs et MOS permet de pallier à ce problème, ouvrant la voie à des circuits à très faible puissance dissipée, et à haute densité d’intégration. Cette thèse se propose d’employer pour la réalisation de SETs dans le back-end-of-line (BEOL), c'est-à-dire dans l’oxyde encapsulant les CMOS, le procédé de fabrication nanodamascène, mis au point par C. Dubuc. / This study deals with the hybrid integration of Single Electron Transistors (SET) on a CMOS technology node. SET devices present high potentiels, particularly in terms of energy efficiency, but can't completely replace CMOS in electrical circuits. However, SETs and CMOS devices combination can solve this issue, opening the way toward very low operating power circuits, and high integration density. This thesis proposes itself to use for Back-End-Of-Line (BEOL) SETs realization, meaning in the oxide encapsulating CMOS, the nanodamascene fabrication process devised by C. Dubuc.

Im Rahmen dieser Arbeit werden haftstellen-basierte Speicherzellen als mögliche Alternative zum bestehenden Floating-Gate Konzept untersucht. Hierbei wird zunächst mittels Simulation und ausgewählten Messverfahren das Verständnis der Funktionsweise vertieft. Der darauffolgende Abschnitt befasst sich mit der Verbesserung der elektrischen Eigenschaften, basierend auf Änderungen der verwendeten Materialien und dem räumlichen Aufbau. Abschließend erfolgt die Untersuchung der Anwendbarkeit des Zellkonzeptes in hochdichten Zellenfeldern.