This paper explores the noise shaping and noise producing qualities of Delta-Sigma Modulators (DSM) and Pulse-Width Modulators (PWM). DSM has long been dominant in the Delta Sigma Analog-to-Digital Converter (DSADC) as a noise-shaped quantizer and time discretizer, while PWM, with a similar self oscillating structure, has seen use in Class D Power Amplifiers, performing a similar function. It has been shown that the PWM in Class D Amplifiers outperforms the DSM [1], but could this advantage be used in DSADC use-cases? LTSpice simulation and printed circuit board implementation and test are used to present data on four variations of these modulators: The DSM, PWM, the out-of-loop discretized PWM (OOLDP), and the cascaded modulator. A generic form of an Nth order loop filter is presented, where three orders of this generic topology are analyzed in simulation for each modulator, and two orders are used in physical testing.

The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the transistor's breakdown caused by short channel effects. An alternative solution to this is the FinFET transistor technology, where the gate of the transistor is a three dimensional fin that surrounds the transistor and prevents the breakdown caused by scaling and short channel effects. FinFET devices are reported to have excellent control over short channel effects, high On/Off Ratio, extremely low gate leakage current and relative immunization over gate edge line roughness. Sub 20 nm node size is perceived to be the limit of scaling the CMOS transistors, but FinFETs can be scaled down further because of its unique design. Due to these advantages, the VLSI industry has now shifted to FinFET in implementation of their designs. However, these transistors have not been completely opened to academia. Analyzing and observing the effects of these devices can be pivotal in gaining an in-depth understanding of them. This thesis explores the implementation of FinFETs using a standard cell library designed using these transistors. The FinFET package file used to design these cells is a 15nm FinFET technology file developed by NCSU in collaboration with Cadence and Mentor Graphics. Post design, the cells were characterized, the results were analyzed and compared with cells designed using CMOS transistors at different node sizes to understand and extrapolate conclusions on FinFET devices.

Radio Frequency (RF) and Microwave devices are typically implemented in Integrated Circuit (IC) form to minimize parasitics, increase precision and tolerances, and minimize size. Although IC fabrication for students and independent engineers is cost-prohibitive, an abundance of low-cost, easily accessible printed circuit board (PCB) and electronic component manufacturers allows affordable PCB fabrication. While nearly all microwave voltage-controlled oscillator (VCO) designs are IC-based, this study presents a discrete PCB-level cross-coupled, differential LC VCO to demonstrate this more affordable and accessible approach. This thesis presents a 65 mW, discrete component VCO PCB with industry-comparable RF performance. A phase noise of -103.7 dBc/Hz is simulated at a 100 kHz offset from a 4.05 GHz carrier. This VCO achieves a 532 MHz (13.25%) tuning bandwidth. A figure of merit, FOMP, [1] value of -177.7 dB (includes phase noise and power consumption) is calculated at 4.05 GHz. This surpasses the performance of an industry standard VCO (HMC430LPx, Analog Devices), -176.5 dB, and four other commercially available VCOs. Furthermore, this study presents novel discrete design implementations to minimize both power consumption and capacitive loading effects, while optimizing phase noise. Finally, this project serves as a reference for analyzing and implementing low-level, complex RF and Microwave circuits on a PCB accessible to all students and independent engineers.

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with the transitions. Creating a noiseless standard cell library with MCML allows use of circuitry that uses low voltage switching with 1.5V between logic levels in a quiet or mixed-signal environment as opposed to the full rail to rail swinging of CMOS logic. This allows cohesive implementation with analog circuitry on the same chip due to constant current and lower switching ranges not creating rail noise during digital switching. Standard cells allow for the Cadence tools to automatically generate circuits and Cadence serves as the development platform for the MCML standard cells. The theory surrounding MCML is examined along with current and future applications well-suited for MCML are researched and explored with the goal of highlighting valid candidate circuits for MCML. Inverters and NAND gates with varying current drives are developed to meet these specialized goals and are simulated to prove viability for quiet, mixed-signal applications. Analysis and results show that MCML is a superior implementation choice compared toCMOSfor high speed and mixed signal applications due to frequency independent power dissipation and lack of generated noise during operation. Noise results show rail current deviations of 50nA to 300nA during switching over an average operating current of 20µA to 80µA respectively. The multiple order of magnitude difference between noise and signal allow the MCML cells to dissipate constant power and thus perform with no noise added to a system. Additional simulated results of a 31-stage ring oscillator result in a frequency for MCML of 1.57GHz simulated versus the 150.35MHz that MOSIS tested on a fabricated 31-stage CMOS oscillator. The layouts designed for the standard cell library conform to existing On Semiconductor ami06 technology dimensions and allow for design of any logical function to be fabricated. The I/O signals of each cell operate at the same input and output voltage swings which allow seamless integration with each other for implementation in any logical configuration.

Smart structure control systems commonly use piezoceramic sensors or accelerometers as vibration measurement devices. These measurement devices often produce noisy and/or low-precision signals, which makes it difficult to measure small-amplitude vibrations. Laser interferometry devices pose as an alternative high-precision position measurement method, capable of nanometer-scale resolution. The aim of this research is to utilize a model-based design approach to develop and implement a real-time Linear Quadratic Gaussian (LQG) regulator for a piezoelectric actuated smart structure using a high-precision laser interferometry measurement system to suppress the excitation of vibratory modes. The analytical model of the smart structure is derived using the extended Hamilton Principle and Euler-Bernoulli beam theory, and the equations of motion for the system are constructed using the assumed-modes method. The analytical model is organized in state-space form, in which the effects of a low-pass filter and sampling of the digital control system are also accounted for. The analytical model is subsequently validated against a finite-element model in Abaqus, a lumped parameter model in Simscape Multibody, and experimental modal analysis using the physical system. A discrete-time proportional-derivative (PD) controller is designed in a heuristic fashion to serve as a baseline performance criterion for the LQG regulator. The Kalman Filter observer and Linear Quadratic Regulator (LQR) components of the LQG regulator are also derived from the state-space model. It is found that the behavior of the analytical model closely matches that of the physical system, and the performance of the LQG regulator exceeds that of the PD controller. The LQG regulator demonstrated quality estimation of the state variables of the system and further constitutes an exceptional closed-loop control system for active vibration control and disturbance rejection of the smart structure.

<p>The compressive sensing (CS) paradigm provides an efficient image acquisition technique through simultaneous sensing and compression. Since the imaging philosophy in CS imagers is different from conventional imaging systems, new physical structures are required to design cameras suitable for CS imaging.</p> <p>While this work is focused on the hardware implementation of CS encoding for CMOS sensors, the image reconstruction problem of CS is also studied. The energy compaction properties of the image in different domains are exploited to modify conventional reconstruction problems. Experimental results show that the modified methods outperform the 1-norm and TV (total variation) reconstruction algorithms by up to 2.5dB in PSNR.</p> <p>Also, we have designed, fabricated and measured the performance of two real-time and area-efficient implementations of the CS encoding for CMOS imagers. In the first implementation, the idea of active pixel sensor (APS) with an integrator and in-pixel current switches are used to develop a compact, current-mode implementation of CS encoding in analog domain. In another implementation, the conventional three-transistor APS structure and switched capacitor (SC) circuits are exploited to develop the analog, voltage-mode implementation of the CS encoding. With the analog and block-based implementation, the sensing and encoding are performed in the same time interval, thus making a real-time encoding process. The proposed structures are designed and fabricated in 130nm technology. The experimental results confirm the scalability, the functionality of the block read-out, and the validity of the design in making monotonic and appropriate CS measurements.</p> <p>This work also discusses the CS-CMOS sensors for high frame rate CS video coding. The method of multiple-camera with coded exposure video coding is discussed and a new pixel and array structure for hardware implementation of the method is presented.</p> / Doctor of Philosophy (PhD)

A continuous increase in demands from the utility grid and traction applications have steered public attention toward the integration of energy storage (ES) and hybrid ES (HESS) solutions. Modern technologies are no longer limited to batteries, but can include supercapacitors (SC) and flywheel electromechanical ES well. However, insufficient control and algorithms to monitor these devices can result in a wide range of operational issues. A modern day control platform must have a deep understanding of the source. In this dissertation, specialized modular Energy Storage Management Controllers (ESMC) were developed to interface with a variety of ES devices. The EMSC provides the capability to individually monitor and control a wide range of different ES, enabling the extraction of an ES module within a series array to charge or conduct maintenance, while remaining storage can still function to serve a demand. Enhancements and testing of the ESMC are explored in not only interfacing of multiple ES and HESS, but also as a platform to improve management algorithms. There is an imperative need to provide a bridge between the depth of the electrochemical physics of the battery and the power engineering sector, a feat which was accomplished over the course of this work. First, the ESMC was tested on a lead acid battery array to verify its capabilities. Next, physics-based models of lead acid and lithium ion batteries lead to the improvement of both online battery management and established multiple metrics to assess their lifetime, or state of health. Three unique HESS were then tested and evaluated for different applications and purposes. First, a hybrid battery and SC HESS was designed and tested for shipboard power systems. Next, a lithium ion battery and SC HESS was utilized for an electric vehicle application, with the goal to reduce cycling on the battery. Finally, a lead acid battery and flywheel ES HESS was analyzed for how the inclusion of a battery can provide a dramatic improvement in the power quality versus flywheel ES alone.

論文摘要 台灣半導體產業協會（2005）對台灣主要IC公司營運狀況所做的調查統計結果所發表「台灣半導體產業對國家的貢獻」研究報告顯示：IC產業無論在產值、營運附加價值、創匯收入、投資、政府投資獲利、所帶動的週邊效益…等，都有穩定到持續成長之表現，為台灣深具競爭力之產業。在先進半導體製造技術進步之下，「智慧工廠自動化」技術成為半導體製造廠商的核心能力的重要部分。根據資策會市場情報中心的1998年分析研究，「智慧工廠自動化」系統技術創新屬於「系統整合」類型的軟體創新。 本研究主要採用文獻探討以及個案訪談作為主要的研究方法，先藉由文獻探討建立起論文整體之架構以及相關理論之說明定義所需探討之研究變項，之後再透過台灣半導體製造標竿企業的六個系統整合專案訪談加以實證。本研究以研究「系統整合專案類型」、「技術知識特質」、與「組織架構特質」對「系統整合創新平台」的關聯，來探討台灣半導體智慧工廠系統整合軟體開發的管理作為，說明所觀察現象的具體意義，以及背後的思考邏輯。而可得到以下初步之研究結論： 一、系統整合專案類型與技術知識特質 1.不同的系統整合專案類型，有不同的技術知識特質。製程發展攸關類型專案，技術知識的多元性較高。資訊系統改造類型專案，技術知識的內隱性較低、多元性較低、標準化程度較高、路徑相依程度較高。 2.製程發展攸關專案在不同階段可能因應技術開發標的不同，會有不同的技術知識特質。早期發展階段將現有的作業流程「自動化」，所以技術知識內隱性為較低。在後期發展階段以採用新技術使系統「智慧化」，所以技術知識內隱性為較高。 二、技術知識特質與系統整合的創新平台 3.系統整合專案的技術知識的內隱程度差異，使外部知識的來源有所差異。系統整合專案的技術知識的內隱程度愈低，外部知識的來源愈傾向專業廠商。系統整合專案的技術知識的內隱程度愈高，外部知識的來源愈傾向大學等研究機構。 4.系統整合專案的技術知識的多元程度愈高，使用者參與程度愈傾向「共同開發」。多元程度愈低，使用者參與程度愈傾向「交付模式或是隔牆交易」。 三、組織結構特質與系統整合的創新平台 5.台灣半導體製造業隨著組織正式化的程度提高，傾向將跨部門的整合溝通活動，予以正式的組織化。這些組織的成員也是來自各個知識領域。 6.在台灣半導體製造企業內的正式組織與臨時性的專案組織之間，選擇「虛擬組織」結構以吸收、創造、積蓄、與擴散重要的跨部門技術知識。 四、其他發現 7.整合跨部門知識領域來創造出新的知識，進而由新知識來創造出新的軟體系統。 8.製程發展攸關類型系統整合專案之技術知識內隱程度愈低，使用者需求定義書對於專案的成功就愈重要。反之，技術知識內隱程度愈高，使用者需求定義書對於專案的成功就愈不相關。 關鍵字：半導體製造、系統整合、智慧工廠自動化、技術知識特質、組織結構特質、創新平台 / Taiwan Semiconductor Industry Association (2005) delivered a report “The national contribution of Taiwan semiconductor industry”, which claimed that IC industry is very critical to Taiwan economic growth and a very competitive industry in the world. In 2004, Taiwan was the first in IC foundry industry with more than 70% market share, the second large cluster of IC design houses with market share 28.2%, and the third in the DRAM industry in the word. In recent years, “Intelligent Fab Automation” technology has become the crucial component of the core competence of nanotechnology IC manufacturing. Based on the software classification of 1998 Institute for Information Industry, “Intelligent fab automation” is one kind of “System Integration” computer software innovation. It includes the advanced Manufacturing Execution System (MES), Advanced Process Control (APC), Advanced Material Handling System (AMHS), equipment automation systems, Engineering Data Analysis (EDA), and etc. “Intelligent fab automation” builds up the proprietary manufacturing capability. This thesis attempts to take an exploratory study of the relationship between characteristics of system integration project, characteristics of technological knowledge, characteristics of organization structure, and innovation platform on the benchmark semiconductor company in Taiwan. This thesis adopts reference and case study as the main research approach. It sets up the thesis whole structure by reference and relevant theories to define the factors. Afterward, to demonstrate the thesis structure by interview six system integration software projects of that company. There are primary figures found in the thesis： 1.The relationship between characteristics of system integration projects and characteristics of technological knowledge a)Different kinds of system integration projects have different characteristics of technological knowledge. The manufacturing-process relevant system development projects associate with high degree of technology diversity. The IT system reengineering projects associate with low degree of technology diversity and manufacturing technology advance. b)The manufacturing-process relevant system development project consists of different development stages that have different technology development targets. In the early stage, the development target is procedure automation with codified technology knowledge. In the later stage, it turns to intelligent system with tacit technology knowledge. 2.The relationship between characteristics of technological knowledge and innovation platform a)Different kinds of system integration projects have different types of project organizations. The IT system reengineering projects tend to adopt the “Function Team” to operate, but the manufacturing-process relevant projects tend to adopt a team type between the “Heavyweight Team” and the “Lightweight Team”. b)The IT system reengineering projects are not different from the manufacturing-process relevant projects in their joint problem resolution ways. They both tend to adopt “Experiments and Prototypes”. Projects with higher degree of tacit technology knowledge tend more to adopt prototypes and experiments to resolve problems jointly. c)System integration project with codified technology knowledge tend to collaborate with professional software house. However, those projects with tacit technology knowledge tend to collaborate with research institutes, such as university labs. d)Projects with higher technology diversity require more the end-user management and IT management to conduct the project vision together, and project team will consists of more different kinds of skills. Project manager tends to hire a manager with T-type or A-type management skills. e)Degree of technology diversity determines degree of user engagement in development. Projects with high degree of technology diversity tend to engage user in the joint development mode. Projects with low degree of technology diversity tend to engage user in the “Offering Mode”. f)All project teams tend to share knowledge internally through the “project meeting” regularly. g)If there is no sound industry standard, Taiwan semiconductor manufacturing company tends to define its own internal standard in order to reduce development cost. 3.The relationship between characteristics of organization structure and innovation platform a)High degree of organization formalization associates with the effort to formalize the communication and coordination activities across organizations. b)High-Tech manufacturing company tends to establish the virtualized organization before a formalized organization to absorb, create, accumulate, and diffuse cross-function technology knowledge. c)High degree of organization formalization associates with “structural” intenal knowledge sharing sessions. 4.Others a)New technology knowledge development leads to new system development. b)URD (User Requirement Definition) document becomes less important for the new system development projects, which associate with tacit technology knowledge. So does for project success. There are primary recommendations for managers in the relevant high-tech manufacturing industries: a)Understand that characteristics of technology determine technology innovation behaviors. b)Develop the manufacturing-process relevant technogies in the step-by-step approach - “procedure standardization”, “procedure automation”, and “intelligent system”. c)Encourage prototyping and experiements. d)Practively develop leaders with diversed skills. e)Follow or build the internal technology standards. f)Establish the dedicated organization to absorb, create, accumulate, and diffuse cross-function technology knowledge. g)Choose the software development model carefully. Keywords: semiconductor manufacturing, system integration, intelligent fab automation, characteristics of technological knowledge, characteristics of organization structure, innovation platform

二十一世紀初的經濟不景氣橫掃了全球的DRAM製造產業，讓全世界的DRAM製造產商大賠了120億美金，國內廠商受傷尤其嚴重，甚至發生公司債之債務不履行事件，國內廠商岌岌可危。本論文主要係以案例探討之方式，研究國內DRAM製造廠商之經營模式、產業特性與風險管理問題，尤其在面對國際間產業劇烈之競爭下，國內之DRAM製造商的經營條件比國際大廠更為艱困，例如：金融環境、政府支援程度、生產規模、技術自主問題等與國外廠商皆有一段差距，因此在經營上所面對之風險與其他國家製造商相較，其實更為險峻。 / 本文以案例公司發生公司債之債務不履行事件為切入點，深入地了解一家在本國企業中屬於中大型企業之DRAM製造公司，為何會有債務不履行之情況發生？其近因似為案例公司在財務上過度倚賴公司債為籌資工具，且公司債之到期或轉換公司債之履約期間過於密集，以致產生流動性問題，然而其遠因乃在於DRAM產品價格快速的滑落，廠商缺乏適當的風險管理工具及機制以應付DRAM之價格風險。DRAM產品為成本競爭導向之標準產品，成本競爭來自於生產良率、製程微縮與新建更大尺寸廠房，當每家廠商都競逐於經濟規模以降低成本時產業會變得不穩定而暴起暴落，在產品價格處於高點時，所有廠商將產能利用率(稼動率)推到最高，此時因產能稼動率高，因此平均每單位晶片之生產成本較低，所以廠商獲利頗豐，並可輕易自資本市場取得資金擴充產能；等到市場供過於求，產品價格下跌處於低點時，廠商只好減產以降低損失，在其他條件不變下，此時因產能稼動率低，因此平均每單位晶片之生產成本反而較產品價格好時還要高，產品價格下跌所帶來的巨額損失，對廠商的虧損有乘數效果，此時廠商在資本市場或銀行等間接金融市場都不容易籌措到資金，本文以案例公司所面對之風險管理問題，提供幾個避險之建議，其中包括金融業、政府等應該能夠扮演更積極的角色，創造共贏共榮的局面，並避免類似之事件再發生，此為本文最大之貢獻。

台灣高科技公司的技術來源主要有兩種途徑，一是自行或共同研發，另一種就是直接移轉量產技術。台灣高科技公司建構生產線的資金來源不外乎獨資或合資生產。因此，台灣動態記憶體產業與國際各大廠之間的技術互動，影響了臺灣動態記憶體產業發展。 本研究採用個案探討之方式，參考知識管理及智慧資本存量的構面，同時將組織由外部及內部輸入資源的機制一起考慮，以 (1)、智慧資本的存量，(2)、有助於累積智慧資本的知識管理相關之組織活動及組織系統 (知識管理四大構面)，兩大類別來分析個案公司。 個案分析中的兩家台灣動態記憶體公司，分別採用不同營運策略模式，以兩種不同類型的技術引進方式，累積本身的核心能力；一家採用與結盟公司共同研發，另一家採用合資及移轉生產技術。 本研究經由訪談、實際案例等方法推演出個案，藉此比較不同營運策略的兩家公司，在知識管理構面和智慧資本存量的差異，並提出分析討論。 本研究發現，營運策略模式的選擇，對公司的知識管理構面和智慧資本存量會產生影響，主要發現這兩家公司有下述的異同，不同的營運策略模式的選擇，會使得兩家公司有下述的差異： (1)、關係資本存量不同，(2)、結構資本存量不同，(3)、獲取外界技術的途徑不同，(4)、取得知識的機制不同，(5)、輸入技術知識的外部來源不同，(6)、創造與整合量產技術的方式不同，(7)、內隱技術知識蓄積的手法不同，(8)、導入生產與整合新技術時機有差異，(9)、在知識創造的過程中，科層組織與專案組織兩者是不可或缺的，但運作方式及目的並不相同，(10)、有相似的知識市集形態，但內容有些差異；技術性的研討活動及組織人員輪調，有利於研發環境的培養。 除了上述較大的差異外，兩家公司在下述知識管理構面也有些相近的地方，但內容因策略選擇而有些差異： (1)、管理外顯知識蓄積的手法相近，(2)、解決問題之手法相似，(3)、運用系統化的管理方式，將分散各地的人力資本所擁有之資訊和智慧，轉化成組織性的知識。 本研究最後並提出一些實務上與後續研究上的建議。 / There are two major technology sources of Taiwan Hi-Tech companies, first, they develop technology by themselves or joint develop technology with technical cooperation partners; second, they transfer the production technology directly from technical cooperation partners. They set up their production line either by themselves or joint venture with other companies. So the technology alliance relationship between Taiwan DRAM companies and world wide major DRAM supplier will affect the long term development of Taiwan DRAM industry. This research takes the utilization of internal and external resources of the organization into consideration and focus on the knowledge management and the intellectual capital constructs of a company. I base on the following two categories to analyze the cases: (1) the stock of the intellectual capital, (2) the knowledge management related organizations and activities contributing to accumulate the intelligence capital (four major constructs of knowledge management). The research takes two Taiwan DRAM companies as an example; the two companies have different operation strategy and different technology implementation strategy to accumulate their core compentance. One company joint develops technology with technical cooperation partners; another company sets up the joint venture production line and transfers the production technology directly from technical cooperation partners. This research digs deeply into these two companies and wishes to find some useful clues to compare and explain the differences between these two differerent operational strategy companies about the constructs of the knowledge management and intellectual capital. This research finds the selection of the operation strategy will affect the constructs of the knowledge management and intellectual capital; the differences can be summarized as bellow: (1) the stock of relational capital is different, (2) the stock of structual capital is different, (3) the ways to get external technology are different, (4) the mechanisms of making knowledge are different, (5) the external sources of inputting technology knowledge are different, (6) the ways to create and integrate production technology are different, (7) the tactics that accumulate tacit technical knowledge are different, (8) the time to implement technology to mass production and integrate new technology is different, (9) while knowledge creation stage, the hierarchical organization and project team are both needed, but the operation method and purpose are not the same, (10) having the similar knowledge market, but the content is different; Technical workshop and job rotation are good for the research and development environment. Beside the above major differences, there are some similar knowledge management constructs, but the contents are different: (1) The tactics of managing explicit knowledge are similar, (2) the tactics of problem solving are similar, (3) to transfer the information and intelligence everywhere into the organization knowledge by using the systematic management tactics. Finally, this research proposes some suggestions for working level and future study reference.