Numbers convey different meanings when used in different contexts (Wiese, 2003). In a cardinal context, a number will tell us how many entities are in a set and convey quantity meaning. In an ordinal context, a number will refer to the relative position (or rank) of one element within a sequence; non-numerical ordered series (e.g. the letters of the alphabet) can also be used to provide meaningful order information. Because quantity and order are linked up with each other in the cognitive number domain (the larger the quantity a number refers to, the later it is located in the conventional number sequence), the question of whether they rely on some common or distinct underlying mechanism(s) is theoretically relevant and was addressed in the present thesis. Experimental studies showed evidence of both similarities (similar distance and SNARC effects, recruitment of parietal and frontal regions, and conjoint impairment or preservation after brain damage) and dissociations (different developmental course, dissociation after cerebral lesion, and specific behavioural markers) between quantity and order neuro-functional processes. The aim of the present thesis was to clarify the relationship between numerical quantity and order processing and to test the hypothesis that they rely on (at least partially) dissociated mechanisms. We tested this hypothesis in a single case study, an electrophysiological study and in two behavioural experiments. In the neuropsychological study, we reported the case of patient CO, who showed Gerstmann syndrome after bilateral parietal damage and became unable to process sequence order relations (e.g. he couldn't recite the number sequence backwards, nor decide whether a number, letter, day or month comes before or after a given target in the corresponding sequence, and he was unable to verify the order of items in a pair). Nonetheless, the patient had largely preserved quantity processing abilities (he could compare numbers and dot patterns to find the smaller or larger, and showed a standard distance effect, he could produce a number smaller or larger than a given target, and match dot patterns with Arabic numerals). Overall, CO's pattern of performance was interpreted as reflecting the involvement of different mechanisms when processing quantity or sequence order relations. Our electrophysiological study corroborated this finding since different spatio-temporal patterns of the distance effect were observed when subjects had to process numbers in a quantity comparison task or in an order judgment task. Quantity processing elicited an early distance effect over the P2p component on left parietal sites, whereas the distance effect was slightly delayed and bilaterally distributed in the numerical order judgment task; and this latter task additionally recruited prefrontal regions on a later (P3-counterpart) component. Finally, our behavioural study further emphasized the involvement of different mechanisms underlying the processing of quantity and numerical order and provided some evidence about the nature of these specific mechanisms. In the number comparison (quantity) task, the standard distance effect was proposed to reflect the involvement of a magnitude comparison mechanism; whereas the reverse distance effect observed in the numerical order verification task was taken as evidence for the recruitment of a serial search (recitation) process. Besides, the pair-order effect was also found to specifically affect order but not quantity judgments. Taken together, the data collected in the present thesis lend further support to the hypothesis that quantity and numerical order rely on distinct processing mechanisms that can be damaged selectively after cerebral lesions, that recruit similar brain areas but with a different spatio-temporal course and that show specific behavioural markers.

Dans ce travail, nous proposons des procédures de test paramétriques et nonparamétriques localement et asymptotiquement optimales au sens de Hajek et Le Cam, pour deux modèles de données de panel. Notre approche est fondée sur la théorie de Le Cam d'une part, pour obtenir les propriétés de normalité asymptotique, bases de la construction des tests paramétriques optimaux, et la théorie de Hajek d'autre part, qui, via un principe d'invariance, permet d'obtenir les procédures nonparamétriques. Dans le premier chapitre, nous considérons un modèle à erreurs composées et nous nous intéressons au problème qui consiste à tester l'absence de l'effet individuel aléatoire. Nous établissons la propriété de normalité locale asymptotique (LAN), ce qui nous permet de construire des procédures paramétriques localement et asymptotiquement optimales (“les plus stringentes”) pour le problème considéré. L'optimalité de ces procédures est liée à la densité-cible f1. Ces propriétés d'optimalité sont hautement paramétriques puisqu'elles requièrent que la densité sous-jacente soit f1. De plus, ces procédures ne seront valides que si la densité-cible f1 et la densité sous-jacent g1 coincïdent. Or, en pratique, une spécification correcte de la densité sous-jacente g1 est non réaliste, et g1 doit être considérée comme un paramètre de nuissance. Pour éliminer cette nuisance, nous adoptons l'argument d'invariance et nous nous restreignons aux procédures fondées sur des statistiques qui sont mesurables par rapport au vecteur des rangs. Les tests que nous obtenons restent valide quelle que soit la densité sous-jacente et sont localement et asymptotiquement les plus stringents. Afin d'avoir des renseignements sur l'efficacité des tests fondés sur les rangs sous différentes lois, nous calculons les efficacités asymptotiques relatives de ces tests par rapport aux tests pseudo-gaussiens, sous des densités g1 quelconques. Enfin, nous proposons quelques simulations pour comparer les performances des procédures proposées. Dans le deuxième chapitre, nous considérons un modèle à erreurs composées avec autocorrélation d'ordre 1 et nous montrons que ce modèle jouit de la propriété LAN. A partir de ce résultat, nous construisons des tests optimaux, au sens local et asymptotique, pour trois problèmes de tests importants dans ce contexte : (a) test de l'absence d'effet individuel et d'autocorrélation; (b) test de l'absence d'effet individuel en présence d'une autocorrélation non spécifiée; et (c) test de l'absence d'autocorrélation en présence d'un effet individuel non spécifié. Enfin, nous proposons quelques simulations pour comparer les performances des tests pseudogaussiens et des tests classiques.

Abstract Title: Serial recall of two-voice lists: Words are not perceptually organized by voice. The present study examined how voice affects the perceptual grouping of words in short-term memory that are auditory presented. Three different voice-lists were used: single-voice, alternating-voice and split-voice. In single-voice lists all words were presented in the same voice. In alternating-voice lists words were presented alternately in a male and a female voice. Finally, in split-voice lists words were presented grouped four and four in a male and a female voice. It was hypothesized that recall would be best for split-voice lists, especially at serial position 4 and 5. This was not confirmed. However, in line with earlier investigations, a recall advantage of single-voice lists was found in comparison with recall of alternating-voice lists at the beginning of the serial position curve. Taken together, these results suggest that words are not perceptually organized by voice in short-term memory. Like earlier studies this study found that recall of single-voice lists was better than alternating-voice lists at the first serial position, a result that yet has to be explained. Keywords: Multi-voice lists, serial recall, short-term memory, perceptual organization

A 5-bit MMIC serial to parallel converter has been designed in Gallium Arsenide. It is intended to be used together with a 5-bit True Time Delay (TTD) circuit, but it can easily be expanded into an arbitrary number of bits. The circuit has been designed with a logic style called DCFL and a 0.20 mm process (ED02AH) from OMMIC has been used to fabricate the circuit. The chip size of this 5-bit MMIC serial to parallel converter is 2.0x0.8 mm (including pads) and close to two hundred transistors are used. Due to the complexity of the transistor models the complete serial to parallel converter has not been fully simulated. However, the smaller building blocks like inverter, latch, etc. have been simulated successfully. These blocks were assembled into the complete circuit.

L' esclerosi múltiple (EM) és una de les malalties inflamatòries més comunes del sistema nerviós central (SNC). En l'EM es produeix una desmielinització de les fibres nervioses que dificulten o interrompen la conducció de l'impuls nerviós en el SNC donant lloc a una simptomatologia molt variada, amb signes i símptomes motors, sensitius i alteracions cognitives. D'entre un 40- 65% dels pacients d'EM avaluats en els serveis d'atenció sanitària presenten algun tipus d'alteració cognitiva, fins i tot en fases de recent diagnostic de la malaltia, provocant aquestes alteracions cognitives dificultats en les activitats de la vida diària. És per a tots aquests factors, que en els últims anys s'ha desencadenat un gran interès no només per a l'estudi dels dèficits cognitius en aquesta malaltia, sinó també en el desenvolupament d'eines diagnostiques ràpides i eficaces per a valorar les alteracions cognitives en aquesta població clínica.Una de les eines d'avaluació més utilitzada es la prova Paced Auditory Serial Addition Test (PASAT), en la qual els pacients d'EM presenten un baix rendiment i tema central d'aquesta tesi doctoral. Aquesta prova es una de les més utilitzades per a l'avaluació dels dèficits cognitius d'aquests pacients, tant en l'àmbit clínic com en el de la investigació. Aquest fet fa que, ja sigui com a prova única en bateries de tipus neurològic o formant part d'altres bateries neuropsicològiques més extenses, el PASAT s'utilitze quasi de forma sistemàtica per a la valoració cognitiva en l'EM. Per altre banda, aquesta prova no es troba exempta de problemes, degut a que, per una banda l' execució correcta d'aquesta tasca implica la realització coordinada d'una serie de funcions cognitives resulten, en segon lloc, una prova difícil de realitzar no sols per als pacients, sino també en grups de persones sense alteració neurològica.

Achieving high performance is one of the most difficult challenges in designing digital circuits. Flip-flops and adders are key blocks in most digital systems and must therefore be designed to yield highest performance. In this thesis, a new high performance serial adder is developed while power consumption is attained. Also, a statistical framework for the design of flip-flops is introduced that ensures that such sequential circuits meet timing yield under performance criteria. Firstly, a high performance serial adder is developed. The new adder is based on the idea of having a constant delay for the addition of two operands. While conventional adders exhibit logarithmic delay, the proposed adder works at a constant delay order. In addition, the new adder's hardware complexity is in a linear order with the word length, which consequently exhibits less area and power consumption as compared to conventional high performance adders. The thesis demonstrates the underlying algorithm used for the new adder and followed by simulation results. Secondly, this thesis presents a statistical framework for the design of flip-flops under process variations in order to maximize their timing yield. In nanometer CMOS technologies, process variations significantly impact the timing performance of sequential circuits which may eventually cause their malfunction. Therefore, developing a framework for designing such circuits is inevitable. Our framework generates the values of the nominal design parameters; i.e., the size of gates and transmission gates of flip-flop such that maximum timing yield is achieved for flip-flops. While previous works focused on improving the yield of flip-flops, less research was done to improve the timing yield in the presence of process variations.

The goal of this project was to implement and compare Invere Discrete Cosine Transform using three methods i.e. by bit parallel, digit serial and bit serial. This application describes a one dimensional Discrete Cosine Transform by bit prallel method and has been implemented by 0.35 ìm technology. When implementing a design, there are several considerations like word length etc. were taken into account. The code was implemented using WHDL and some of the calculations were done in MATLAB. The VHDL code was the synthesized using Design Analyzer of Synopsis; power was calculated and the results were compared.

Achieving high performance is one of the most difficult challenges in designing digital circuits. Flip-flops and adders are key blocks in most digital systems and must therefore be designed to yield highest performance. In this thesis, a new high performance serial adder is developed while power consumption is attained. Also, a statistical framework for the design of flip-flops is introduced that ensures that such sequential circuits meet timing yield under performance criteria. Firstly, a high performance serial adder is developed. The new adder is based on the idea of having a constant delay for the addition of two operands. While conventional adders exhibit logarithmic delay, the proposed adder works at a constant delay order. In addition, the new adder's hardware complexity is in a linear order with the word length, which consequently exhibits less area and power consumption as compared to conventional high performance adders. The thesis demonstrates the underlying algorithm used for the new adder and followed by simulation results. Secondly, this thesis presents a statistical framework for the design of flip-flops under process variations in order to maximize their timing yield. In nanometer CMOS technologies, process variations significantly impact the timing performance of sequential circuits which may eventually cause their malfunction. Therefore, developing a framework for designing such circuits is inevitable. Our framework generates the values of the nominal design parameters; i.e., the size of gates and transmission gates of flip-flop such that maximum timing yield is achieved for flip-flops. While previous works focused on improving the yield of flip-flops, less research was done to improve the timing yield in the presence of process variations.

Sammanfattning       Syftet med uppsatsen har varit att analysera och diskutera hur rädsla utvecklas i samband med överfallsvåldtäkter, och undersöka samband mellan media och kvinnors rädsla. Syftet har också varit att relatera rädslans betydelse i förhållande till jämställdhet.   Den övergripande problemfrågan har varit: - Finns det samband mellan medias nyhetsförmedling och kvinnors rädsla för överfallsvåldtäkt? Följande undersökningsfrågor har använts: - Hur ser forskningen på problemet med kvinnors rädsla för brott och våldtäkt? - På vilket sätt kan nyhetsklippen i Nerikes Allehanda ha påverkat utvecklingen av rädsla för överfallsvåldtäkter i Örebro?   Undersökningen har gjorts i två delar. Först genom en undersökning av vad tidigare forskning kommit fram till om kvinnors rädsla för brott och våldtäkt. Sedan genom en textanalys av nyhetsklipp i Nerikes Allehanda, och hur dessa kan ha påverkat rädsla för överfallsvåldtäkter i Örebro. Tidsrummet sträcker sig från september 2009 till september 2010. Som utgångspunkt för textanalysen har Göran Bergström och Kristina Boréus metodbok Textens mening och makt använts. Jag har utgått från en teori om att medierna sätter dagordningen för vilka frågor som blir viktiga.   Genomgående har analyserna genomförts från ett genusperspektiv, som utgår från att män och kvinnor har olika positioner i förhållande till våldtäkt. Ett tema om kvinnors tillgång till det offentliga rummet har en central plats i uppsatsen. För att relatera resultaten till ett vidare jämställdhetsperspektiv har Susan Brownmillers teori, om våldtäkt som uttryck för makt och social kontroll, använts.   Slutsatsen är att det verkar finnas samband mellan medias nyhetsförmedling och kvinnors rädsla för överfallsvåldtäkt. Nerikes Allehandas nyhetsklipp är utformade på ett sätt som kan verka uppskrämmande på många kvinnor. Det gäller t.ex. signalerande nyheter, som är utformade på ett sätt som varnar kvinnor att de kan bli serievåldtäktsmannens nästa offer. Det sker också genom varningar från polisen, medierade genom media. Samspelet mellan Nerikes Allehandas kriminaljournalistik och polisen som huvudsaklig källa till nyhetsartikarna, har troligen haft en central roll i genererandet av en genuskodad rädsla, utan att varken polis eller Nerikes Allehanda haft något syfte att skrämma kvinnor. Ett sätt varigenom rädslan kunnat föras vidare är genom ett kulturellt narrativ, som skapas genom nyhetsklippen. / Abstract   The aim of this essay has been to analyze and discuss how fear develops in the context of rape attacks and investigate the relationship between media and women's fear. The aim has been to relate the importance of fear to gender equality. The overall question has been: - Is there a connection between media coverage and women's fear of sexual assault? The research issues that have been used: - How does research regard questions concerning women's fear of crime and rape? - How can newspaper articles in Nerikes Allehanda have influenced the development of fear of rape attacks in Örebro? The study was conducted in two parts. The first part was carried out as an examination of what previous research has concluded on women’s fear of crime and rape. Then through a textual analysis of newspaper articles in Nerikes Allehanda and how these may have affected the fear of rape attacks in Örebro. The time span is September 2009 to September 2010. Göran Bergström and Kristina Boréus method book Textens mening och makt was used as a basis for the text analysis. My point of departure has been a theory that the media set the agenda for what issues are important. The analysis was conducted from a gender perspective that assumes that men and women have different positions in relation to rape. A theme about women's access to public space has a central place in the essay. In order to relate the results to a wider gender equality perspective, Susan Brownmiller's theory of rape as an expression of power and social control has been used. The conclusion is that news media and women's fear of assault and rape seems to be linked. Newspaper articles in Nerikes Allehanda are designed in a way that may seem frightening to many women. This applies, for instance, to signaling news stories designed to warn women that they may become the next victim of a serial rapist. It also applies to warnings from the police, mediated through the media. The interaction between the crime coverage of Nerikes Allehanda and the police, as the main source of the news stories, probably played a central role in the generation of a gender-coded fear, without neither the police nor Nerikes Allehanda having any intent to scare women. A way that fear seems to have been passed on is through the creation of a cultural narrative that is created by the design of news articles.

<p>A full custom integrated circuit design of a serial bitstream processor is proposed for remote smart sensor systems. This dissertation describes details of the architectural exploration, circuit implementation, algorithm simulation, and testing results. The design is fabricated and demonstrated to be a successful working processor for basic algorithm functions. In addition, the energy performance of the processor, in terms of energy per operation, is evaluated. Compared to the multi-bit sensor processor, the proposed sensor processor provides improved energy efficiency for serial sensor data processing tasks, and also features low transistor count and area reduction advantages.</p><p>Operating in long-term, low data rate sensing environments, the serial bitstream processor developed is targeted at low-cost smart sensor systems with serial I/O communication through wireless links. This processor is an attractive option because of its low transistor count, easy on-chip integration, and programming flexibility for low data duty cycle smart sensor systems, where longer battery life, long-term monitoring and sensor reliability are critical. </p><p>The processor can be programmed for sensor processing algorithms such as delta sigma processor, calibration, and self-test algorithms. It also can be modified to utilize Coordinate Rotation Digital Computer (CORDIC) algorithms. The applications of the proposed sensor processor include wearable or portable biomedical sensors for health care monitoring or autonomous environmental sensors.</p> / Dissertation