Die Entwicklung von Telekommunikationsnetzwerken unterliegt einer Reihe von Herausforderungen. Hohe Komplexität, hohe Bandbreite mit veränderlichen Anforderungen, kurze Entwicklungszyklen und sich ständig ändernde Marktanforderungen sind verbunden mit sich immer schneller ändernden Standards. Daraus resultieren hohe Risiken für die Entwicklung von Kommunikationslösungen. Die Kombination von rekonfigurierbaren und ASIC-Technologien bietet eine Möglichkeit, die Vorteile der ASICTechnologie weitestgehend zu erhalten und dem Risiko von Standardänderungen und Designfehlern zu begegnen. Dieser Beitrag stellt anhand eines Ethernet-verarbeitenden SoC eine Möglichkeit vor, paketorientierte Netzwerkknoten hinsichtlich zukünftiger Änderungen flexibel zu implementieren. Der Netzwerkknoten kann über spezielle Ethernet-Pakete rekonfiguriert und somit an geänderte Anforderungen angepasst werden.

We present a generic proof methodology to automatically prove correctness of design transformations introduced at the Register-Transfer Level (RTL) to achieve lower power dissipation in hardware systems. We also introduce a new algorithm to reduce switching activity power dissipation in microprocessors. We further apply our technique in a completely different domain of dynamic power management of Systems-on-Chip (SoCs). We demonstrate our methodology on real-life circuits. In this thesis, we address the dual problem of transforming hardware systems at higher levels of abstraction to achieve lower power dissipation, and a reliable way to verify the correctness of the afore-mentioned transformations. The thesis is in three parts. The first part introduces Instruction-driven Slicing, a new algorithm to automatically introduce RTL/System level annotations in microprocessors to achieve lower switching power dissipation. The second part introduces Dedicated Rewriting, a rewriting based generic proof methodology to automatically prove correctness of such high-level transformations for lowering power dissipation. The third part implements dedicated rewriting in the context of dynamically managing power dissipation of mobile and hand-held devices. We first present instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level in order to achieve lower power dissipation. Our technique automatically annotates existing RTL code to optimize the circuit for lowering power dissipated by switching activity. Our technique can be applied at the architectural level as well, achieving similar power gains. We first demonstrate our technique on architectural and RTL models of a 32-bit OpenRISC pipelined processor (OR1200), showing power gains for the SPEC2000 benchmarks. These annotations achieve reduction in power dissipation by changing the logic of the design. We further extend our technique to an out-of-order superscalar core and demonstrate power gains for the same SPEC2000 benchmarks on architectural and RTL models of PUMA, a fixed point out-of-order PowerPC microprocessor. We next present dedicated rewriting, a novel technique to automatically prove the correctness of low power transformations in hardware systems described at the Register Transfer Level. We guarantee the correctness of any low power transformation by providing a functional equivalence proof of the hardware design before and after the transformation. Dedicated rewriting is a highly automated deductive verification technique specially honed for proving correctness of low power transformations. We provide a notion of equivalence and establish the equivalence proof within our dedicated rewriting system. We demonstrate our technique on a non-trivial case study. We show equivalence of a Verilog RTL implementation of a Viterbi decoder, a component of the DRM System-On-Chip (SoC), before and after the application of multiple low power transformations. We next apply dedicated rewriting to a broader context of holistic power management of SoCs. This in turn creates a self-checking system and will automatically flag conflicting constraints or rules. Our system will manage power constraint rules using dedicated rewriting specially honed for dynamic power management of SoC designs. Together, this provides a common platform and representation to seamlessly cooperate between hardware and software constraints to achieve maximum platform power optimization dynamically during execution. We demonstrate our technique in multiple contexts on an SoC design of the state-of-the-art next generation Intel smartphone platform. Finally, we give a proof of instruction-driven slicing. We first prove that the annotations automatically introduced in the OR1200 processor preserve the original functionality of the machine using the ACL2 theorem prover. Then we establish the same proof within our dedicated rewriting system, and discuss the merits of such a technique and a framework. In the context of today's shrinking hardware and mobile internet devices, lowering power dissipation is a key problem. Verifying the correctness of transformations which achieve that is usually a time-consuming affair. Automatic and reliable methods of verification that are easy to use are extremely important. In this thesis we have presented one such transformation, and a generic framework to prove correctness of that and similar transformations. Our methodology is constructed in a manner that easily and seamlessly fits into the design cycle of creating complicated hardware systems. Our technique is also general enough to be applied in a completely different context of dynamic power management of mobile and hand-held devices. / text

With the rapid development of wireless and wireline communications, a variety of new standards and applications are emerging in the marketplace. In order to achieve higher levels of integration, RF circuits are frequently embedded into System on Chip (SoC) or System in Package (SiP) products. These developments, however, lead to new challenges in manufacturing test time and cost. Use of traditional RF test techniques requires expensive high frequency test instruments and long test time, which makes test one of the bottlenecks for reducing IC costs. This research is in the area of built-in self test technique for RF subsystems. In the test approach followed in this research, on-chip detectors are used to calculate circuits specifications, and data converters are used to collect the data for analysis by an on-chip processor. A novel on-chip amplitude detector has been designed and optimized for RF circuit specification test. By using on-chip detectors, both the system performance and specifications of the individual components can be accurately measured. On-chip measurement results need to be collected by Analog to Digital Converters (ADCs). A novel time domain, low power ADC has been designed for this purpose. The ADC architecture is based on a linear voltage controlled delay line. Using this structure results in a linear transfer function for the input dependent delay. The time delay difference is then compared to a reference to generate a digital code. Two prototype test chips were fabricated in commercial CMOS processes. One is for the RF transceiver front end with on-chip detectors; the other is for the test ADC. The 940MHz RF transceiver front-end was implemented with on-chip detectors in a 0.18 [micrometer] CMOS technology. The chips were mounted onto RF Printed Circuit Boards (PCBs), with tunable power supply and biasing knobs. The detector was characterized with measurements which show that the detector keeps linear performance over a wide input amplitude range of 500mV. Preliminary simulation and measurements show accurate transceiver performance prediction under process variations. A 300MS/s 6 bit ADC was designed using the novel time domain architecture in a 0.13 [micrometer] standard digital CMOS process. The simulation results show 36.6dB Signal to Noise Ratio (SNR), 34.1dB Signal to Noise and Distortion Ratio (SNDR) for 99MHz input, Differential Non-Linearity (DNL)<0.2 Least Significant Bit (LSB), and Integral Non-Linearity (INL)<0.5LSB. Overall chip power is 2.7mW with a 1.2V power supply. The built-in detector RF test was extended to a full transceiver RF front end test with a loop-back setup, so that measurements can be made to verify the benefits of the technique. The application of the approach to testing gain, linearity and noise figure was investigated. New detector types are also evaluated. In addition, the low-power delay-line based ADC was characterized and improved to facilitate gathering of data from the detector. Several improved ADC structures at the system level are also analyzed. The built-in detector based RF test technique enables the cost-efficient test for SoCs. / text

Sverige är bland de länder som tar emot flest flyktingar, utav dessa utgör en del ensamkommande barn som vanligtvis varit med om hemska upplevelser och lider av olika hälsoproblem som tar sig både psykiska eller fysiska uttryck. Det är således viktigt att personal som arbetar med denna målgrupp kan förse dem med stöd och kunskap. Studien har undersökt personalens uppfattningar om arbetet på boenden med ensamkommande flyktingbarn är ur ett hälsofrämjande perspektiv. Teorierna KASAM med dess tre delkomponenter: meningsfullhet, begriplighet samt hanterbarhet och socialt stöd ligger som grund. I studien har en kvalitativ ansats tillämpats där fem personal på två boenden blivit intervjuade med en semistrukturerad metod. Resultatet visade att personalens synsätt på hälsofrämjande var olika för alla i personalen men grunderna densamma. Ett hälsofrämjande arbete genomfördes på boendena där personal arbetade med bland annat informationspridning, fysisk aktivitet och delaktighet. Underlättande faktorer på boendet var kommunikationen och det sociala samspelet med ungdomarna samt sina medarbetare. Kommunikationen var även ett hinder eftersom att språkbarriäerna kom emellan eller att tolk inte översatte korrekt. Slutsatserna i studien är att personalens synsätt på hälsofrämjande är lika i grunden, personalens arbetssätt är hälsofrämjande och det finns både underlättande samt försvårande faktorer i det hälsofrämjande arbetet. / Sweden is among the countries that is receiving the most refugees, a part of these are unaccompanied children who usually been through terrible experiences and are suffering from various health problems that is displayed both mentally and physically. It is therefore important that staff working with this target group can provide them with the support and knowledge. This study examined the staff´s perceptions of their work, with unaccompanied refugee children, as being conducted from a from a health promotion perspective. The theories SOC, which has three subcomponents: meaningfulness, comprehensibility and manageability and social support are the foundation. The study has applied a qualitative approach where five staff’s on two accommodation were interviewed using a semi-structured approach. The results showed that the approach of a health promotion perspective was different for all the staff however the basics where the same. Health promotion were conducted on both accommodations where the staff worked among other things with the dissemination of information, physical activity and with participation. Facilitators at the accommodation was communication and social interaction with the young people and the workers. Communication was also a major obstacle since the language barrier came between or the interpreter did not translate correctly. The conclusions of the study is that the staff's approach to health promotion is equal fundamentally, the staff's approach are health promoting and there are both facilitating and aggravating factors in the health promotion work.

The fields of System-On-Chip (SOC) and Embedded Systems Design have received a lot of attention in the last years. As part of an effort to increase productivity and reduce the time-to-market of new products, different approaches for Electronic System-Level Design frameworks have been proposed. These different methods promise a transparent co-design of hardware and software without having to focus on the final hardware/software split. In our work, we focused on enhancing the component database, modeling and synthesis capabilities of the System-On-Chip Environment (SCE). We investigated two different virtual platform emulators (QEMU and OVP) for integration into SCE. Based on a comparative analysis, we opted on integrating the Open Virtual Platforms (OVP) models and tested the enhanced SCE simulation, design and synthesis capabilities with a JPEG encoder application, which uses both custom hardware and software as part of the system. Our approach proves not only to provide fast functional verification support for designers (10+ times faster than cycle accurate models), but also to offer a good speed/accuracy relationship when compared against integration of cycle accurate or behavioral (host-compiled) models. / text

In a System on a Chip (SoC), interconnect is the factor limiting Performance, Power, Area and Schedule (PPAS). Distributed crossbar switches also called as Switching Central Resources (SCR) are often used to implement high performance interconnect in a SoC – Network on a Chip (NoC). Multiple issue bus protocols like AXI (from ARM), VBUSM (from TI) are used in paths critical to the performance of the whole chip. Experimental analysis of effects on PPAS by architectural modifications to the SCRs is carried out, using synthesis tools and Texas Instruments (TI) in house power estimation tools. The effects of scaling of SCR sizes are discussed in this report. These results provide a quick means of estimation for architectural changes in the early design phase. Apart from SCR design, the other major domain, which is a concern, is deadlocks. Deadlocks are situations where the network resources are suspended waiting for each other. In this report various kinds of deadlocks are classified and their respective mitigations in such networks are provided. These analyses are necessary to qualify distributed SCR interconnect, which uses multiple issue protocols, across all scenarios of transactions. The entire analysis in this report is carried out using a flagship product of Texas Instruments. This ASIC SoC is a complex wireless base station developed in 2010- 2011, having 20 major cores. Since the parameters of crossbar switches with multiple issue bus protocols are commonly used in SoCs across the semiconductor industry, this reports provides us a strong basis for architectural/design selection and validation of all such high performance device interconnects. This report can be used as a seed for the development of an interface tool for architects. For a given architecture, the tool suggests architectural modifications, and reports deadlock situations. This new tool will aid architects to close design problems and bring provide a competitive specification very early in the design cycle. A working algorithm for the tool development is included in this report. / text

This study aims to explore purposes of daily workshops for persons with disabilities. The method used was qualitative interviews. An inductive research strategy was used. Half-structured interviews with six managers of daily workshops were carried out, wherein they expressed their intentions with the daily workshops and the reasons for people to participate. The interviews were analysed with Antonovsky´s salutogenetic perspective, in which Sense of Coherence, SOC is a main concept, and with the normalisation principle. The study indicates that the managers aim to create a good, rather than a normalizing work situation for their participants. The main result is that the managers want the work to be meaningful, appreciated and for the benefit of others.

This essay aims to examine the meaning work at daily activity centers gives people with intellectual disabilities and the questions these people consider necessary to ask in quality surveys. This has been done by interviews with twelve respondents in various daily activitiy centers within a private care company in the Stockholm area. The theories that has been used to analyze the empirical data is SOC - sence of coherence, stigma and empowerment. The result shows that the meaning of daily activity is to create and maintain social contacts, feeling important and needed by others and an opportunity to feel “normal” and like everybody else. Furthermore, the results show that the possibility of self-determination, the fellowship with personal and other participants and to have tasks with moderate severity are necessary questions to ask in quality surveys. Another result shows that the respondents are aware that the absence of salary differs a regular job from work in a daily activity center.

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Studier som undersöker hemlösa människors upplevelser med annat fokus än det elände de befinner sig i kan bidra med förståelse och kunskap som behövs för att kunna hjälpa de sämst ställda. Det salutogena begreppet känsla av sammanhang (KASAM) hos försäljare av Situation Sthlm, en grupp hemlösa, före detta hemlösa och socialt utsatta människor, är inte tidigare känt och syftet med den här studien är att kvantitativt undersöka var på KASAM-13 skalan försäljare av Situation Sthlm befinner sig och kvalitativt att beskriva hur fyra individer ur urvalet upplever och beskriver sin känsla av sammanhang.   Slutsatser av studien kan sammanfattas i att levnadsvillkor påverkar en persons känsla av sammanhang, att försäljare av Situation Sthlm har KASAM-värden (54,67 p.) långt från medelvärdet i en befolkningsundersökning (70.83 p.) och att en låg skattning på KASAM Livsfrågeformulär (under medelvärdet 54,67) inte behöver betyda att en person inte upplever känsla av sammanhang i sitt liv och omvänt, en hög skattning (över medelvärdet 54,67 p.) inom undersöknings-gruppen försäljare av Situation Sthlm av KASAM behöver inte betyda att en person upplever känsla av sammanhang. / Studies examining homeless people's experiences with different focus than the misery they are in can help with understanding and knowledge needed to help people in need. The salutogenetic concept sense of coherence (SOC) of vendors of Situation Sthlm, a group homeless, formerly homeless and socially vulnerable people, is not known and the purpose of this study is to quantitatively examine where on the SOC-13 scale vendors of Situation Stockholm is placed and qualitatively to describe how four individuals from the sample perceive and describe their sense of coherence.  Conclusions from the study can be summarized in that living conditions affect a person's sense of coherence, that vendors of Situation Sthlm has SOC-values (54,67 p.) far from the mean in a population survey (70,83 p.) and that a low score (below 54,67 p) of the SOC Life Questionnaire does not necessarily mean that a person does not experience a sense of coherence in life and conversely, a high SOC-score (above 54,67 p.) within the study  group vendors of Situation Sthlm  does not mean that a person experience sense of coherence.