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Wireless sensors are used widely for condition monitoring in electric machines. The metal enclosure of an electric motor restricts the signal from sensors to radiate outside. The signal from the metal cavity needs to be guided to the only opening in the enclosure, through a narrow gap between the stator and the rotating rotor. Gap waveguide technology is proposed as a solution by texturing the stator surface with electromagnetic band gap (EBG) structures. Arrays of periodic holey structures are used to realize the metasurface waveguide. Two Bravais lattice structures – square and hexagonal, are explored for guiding waves along a desired path in a parallel plate waveguide. Simulations are carried out to study the influence of various dimensions of the unit cells. A waveguide with hexagonal hole-type unitcell is designed and manufactured for experimental verification. The possibility of extending the same technology to cylindrical surface is confirmed by simulations. / Trådlösa sensorer används allmänt för tillståndsövervakning i elektriska maskiner. Metallhöljet hos en elektrisk motor begränsar signalen från sensorerna från att stråla utåt. Signalen från metallhåligheten behöver styras till den enda öppningen i höljet, genom ett smalt mellanrum mellan statorn och den roterande rotorn. Gap-vågledarteknik föreslås som en lösning genom att strukturera statorytan med elektromagnetiska bandgap-strukturer (EBG). Arrayer av periodiskt håliga strukturer används för att realisera metayt-vågledare. Två Bravais gitterkonstruktioner –kvadratiska och sexkantiga, undersöks för styrning av vågor längs en önskad väg i en parallellplattvågledare. Simuleringar utförs för att studera påverkan av olika dimensioner hos enhetscellerna. En vågledare med hexagonal håltypsenhetscell är konstruerad och tillverkad för experimentell verifiering. Möjligheten att utvidga samma teknik till cylindrisk yta bekräftas genom simuleringar.

Advances in wide-bandgap semiconductor devices have increased the allowable operating temperature of power electronic systems. High-temperature devices can benefit applications such as renewable energy, electric vehicles, and space-based power electronics that currently require bulky cooling systems for silicon power devices. Cooling systems can typically be reduced in size or removed by adopting wide-bandgap semiconductor devices, such as silicon carbide. However, to do this, semiconductor device packaging with high reliability at high temperatures is necessary. Transient liquid phase (TLP) die-attach has shown in literature to be a promising bonding technique for this packaging need. In this work TLP has been comprehensively investigated and characterized to assess its viability for high-temperature power electronics applications. The reliability and durability of TLP die-attach was extensively investigated utilizing electrical resistivity measurement as an indicator of material diffusion in gold-indium TLP samples. Criteria of ensuring diffusive stability were also developed. Samples were fabricated by material deposition on glass substrates with variant Au–In compositions but identical barrier layers. They were stressed with thermal cycling to simulate their operating conditions then characterized and compared. Excess indium content in the die-attach was shown to have poor reliability due to material diffusion through barrier layers while samples containing suitable indium content proved reliable throughout the thermal cycling process. This was confirmed by electrical resistivity measurement, EDS, FIB, and SEM characterization. Thermal and mechanical characterization of TLP die-attached samples was also performed to gain a newfound understanding of the relationship between TLP design parameters and die-attach properties. Samples with a SiC diode chip TLP bonded to a copper metalized silicon nitride iv substrate were made using several different values of fabrication parameters such as gold and indium thickness, Au–In ratio, and bonding pressure. The TLP bonds were then characterized for die-attach voiding, shear strength, and thermal impedance. It was found that TLP die-attach offers high average shear force strength of 22.0 kgf and a low average thermal impedance of 0.35 K/W from the device junction to the substrate. The influence of various fabrication parameters on the bond characteristics were also compared, providing information necessary for implementing TLP die-attach into power electronic modules for high-temperature applications. The outcome of the investigation on TLP bonding techniques was incorporated into a new power module design utilizing TLP bonding. A full half-bridge inverter power module for low-power space applications has been designed and analyzed with extensive finite element thermomechanical modeling. In summary, TLP die-attach has investigated to confirm its reliability and to understand how to design effective TLP bonds, this information has been used to design a new high-temperature power electronic module.

The thesis focuses on designing and characterizing SiC 3.3 kV Diffused Metal-Oxide Semiconductor Field-Effect Transistor (DMOSFET)s with a Ron that is significantly lower than that of current commercial devices. The On-state resistance and breakdown voltage are then adjusted by adding a Super-Junction structure. Because of the pillar structure below the p-base area, the depletion will occur both vertically and horizontally and keeps the electric field distribution throughout the drift layer constant. The Super Junction Metal-Oxide Semiconductor Field-Effect Transistor (SJ MOSFET) has a good advantage compared to DMOSFETs. Due to its capacity to tolerate higher breakdown voltages and the fact that it does not require an increase in cell pitch to reach higher voltages, the Super-Junction approach is now the subject of effective research as compared to IGBTs and DMOSFETs. Silicon Carbide , a material with a wide bandgap that facilitates high temperature operation, high blocking voltage, high current flow and high switching frequency, is used to construct the device. In order to maintain a consistent electric field throughout the device, the concentration of the n and p pillars was chosen with a good charge balance between them. The outcomes of designing and simulating a DMOSFET, a Semi-SJ MOSFET, and a Full SJ MOSFET are compared in this research. The semi SJ device resulted in a Ron of 18.4 mΩcm2 and a Vb of 4.1 kV. The full SJ device reached a Ron of 12.4 mΩcm2 and a breakdown voltage of 4.2 kV. One optimized device was chosen from the semi SJ devices and used in several TCAD simulations, and the outcomes were evaluated based on the JFET width, pillar thickness, and charge imbalance between the p and n pillars. In this study, the device was also modelled for 6.5 kV and 10 kV SiC blocking voltage capabilities; the findings are also discussed. / Denna uppsats fokuserar på att utveckla och karakterisera 3.3 kV kiselkarbidbaserade DMOSFET-transistorer med betydligt lägre framspänningsfall jämfört med kommersiella halvledarkomponenter. Framspänningsfallet och spärrspänningen modifieras genom att använda en pelarliknande halvledarstruktur i drift regionen, dvs. en super-junction [SJ] struktur. På grund av pelarstrukturen under p-bas området, uppträder utarmningsområdet av laddningsbärare både vertikalt och horisontellt och ger ett konstant elektriskt fält genom drift-regionen. Super-junction transistorer har flera fördelar jämfört med komponenter i DMOSFET struktur. På grund av sin kapacitet att motstå högre spärrspänningar och genom att strukturen inte behöver en större enhetscellbredd för att nå högre spärrspänning, så är just nu super-junction strukturer i stort forskningsfokus jämfört med IGBT och DMOSFET komponenter. Kiselkarbid, ett material med ett brett bandgap, möjliggör komponenter för höga temperaturer, höga spärrspänningar, höga elektriska strömmar, samt höga växlingsfrekvenser, har använts för att bygga de undersökta komponenterna. För att generera ett konstant elektriskt fält över drift-regionen, så har dopningsnivåerna för n- och p- pelarna valts för att hålla en bra laddningsbalans mellan dem. Simuleringsresultaten av dessa komponentstrukturer, DMOSFET, halv-SJ MOSFET, och hel-SJ MOSFET är jämförda i detta projekt. Halv-SJ MOSFET transistorn resulterade i ett framspänningsfall på 18.4 mΩcm2 och når en spärrspänning av 4.1 kV. Hel-SJ MOSFET strukturen uppnår ett framspänningsfall på 12.4 mΩcm2 och med spärrspänning av 4.2 kV. En optimerad halv-SJ struktur valdes ut för att genomföra ytterligare TCAD simuleringsstudier om effekterna av JFET bredd, pelartjocklek, samt laddningsobalans mellan n- och p- pelarna. I den här studien simulerades även komponentstrukturer för 6.5 kV och 10 kV spärrspänningsklasser; även dessa resultat diskuteras i rapporten.

Density functional theory (DFT) calculations of polyethylene (PE) HVDC cable insulation have been performed for systems containing four different chemical impurities: acetophenone, cumene, $\alpha$-methyl styrene and $\alpha$-cumyl alcohol. Systems were generated by molecular dynamics (MD) equilibration at four different temperatures relevant for cable insulation applications: 277 K, 293 K, 343 K and 363 K. With the goal of gaining better measure of variations in hole and electron traps energies, four initial configurations were also stochastically generated at each temperature, which yielded four different final configurations after equilibration. The counterpoise correction scheme was implemented for DFT calculations, by distributing ghost atoms thought any empty pockets of space in between the PE chains. The PBE functional was selected for DFT simulations. The resulting band gaps were in agreement with those of earlier GGA-based studies, and thus lower by 3 eV than empirical band gaps. For all impurities, the first HOMO state and the first two LUMO states were generally located on the impurity molecule, forming one hole trap and two electron traps, but certain configurations generated increased electron trap numbers, or eliminated hole traps. No dependence could be derived between temperature and trap depth for either electron or hole traps. Mean electron trap energies were largely in agreement with results from earlier studies, they were deepest for acetophenone, and they varied by as much as 0.6 eV between different configurations. Hole traps are universally shallow and vary by up to 0.7 eV between configurations, and are similar in depth for all impurities. Results suggest that electron trap depths correlate with the presence of molecular features such as oxygen atoms and conjugated double bonds. The dependence of trap depth on the spatial configuration of the impurity molecule suggests that results could be improved by more precise quantum mechanical treatment of the dynamics of the impurity. / Täthetsfunktionalteori (DFT) har använts för beräkningar av isolering till HVDC kablar som består av polyeten innehållande fyra olika kemiska orenheter: acetofenon, kumen, alfa-metylstyren och alfa-kumylalkohol. System att studera genererades genom molekylärdynamisk ekvilibrering vid fyra olika temperaturer relevanta för tillämning till kabelisolering: 277 K, 293 K, 343 K och 363 K. För att få ett mått på de variationer som existerar i energierna på hål- och elektronfällor genererades stokastiskt fyra initialkonfigurationer vid varje temperatur, vilket fyra olika konfigurationer efter relaxering. Motviktskorrigering implementerades för DFT-beräkningar, genom att fördela "spökatomer" i de tomrum som bildas mellan PE-kedjorna i den amorfa fasen. PBE-funktionalen användes för DFT-simuleringar. De resulterande bandgapen stämde överens med tidigare GGA-baserade studier, och var därmed runt 3 eV smalare än empiriskt uppmätta bandgap. För alla orenheter var det första HOMO-tillståndet och de två första LUMO-tillstånden i allmänhet placerade på orenheten, vilket resulterade i en hålfälla och två elektronfällor, men vissa konfigurationer gav upphov till fler elektronfällor, eller eliminerade hålfällorna. Inget samband kunde härledas mellan temperaturen och djupet på fällorna för vare sig elektron- eller hålfällor. Medelvärdet på elektronfällornas energier överensstämde till stor del med resultat från tidigare studier, energierna var högst för acetofenon, och de varierade med så mycket som 0,6 eV mellan olika konfigurationer. Hålfällorna var genomgående grunda, varierade med upp till 0,7 eV mellan olika konfigurationer, och hade likartat djup för alla orenheter. Resultaten indikerar att variationerna elektronfällornas medeldjup uppstår på grund av orenheternas olika molekylära uppbyggnad: förekomst av syreatomer och konjugerade dubbelbindningar i orenheterna leder till djupare elektronfällor. Det faktum att djupet på elektron- och hålfällor varierar mellan olika rumsliga konfigurationer av av orenheten och polyetenstrukturen ger en antydan om att resultaten kan komma att förbättras om dynamiken hos orenheten simuleras med mer exakta kvantmekanisk metoder.

Recombination mechanisms in gallium arsenide have been studied using temperature-dependent time-resolved photoluminescence-decay. New analytical methods are presented to improve the accuracy in bulk lifetime measurement, and these have been used to resolve the temperature-dependent lifetime. Fits to temperature-dependent lifetime yield measurement of the radiative-efficiency, revealing that samples grown by the Czochralski and molecular-beam-epitaxy methods are limited by radiative-recombination at 77K, with defect-mediated nonradiative-recombination becoming competitive at 300K and above. In samples grown with both doping types using molecular-beam-epitaxy, a common exponential increase in capture cross-section characterized by a high value of E_infinity=(258 +/- 1)meV was observed from the high-level injection lifetime over a wide temperature range (300-700K). This common signature was also observed from 500-600K in the hole-lifetime observed in n-type Czochralski GaAs where E_infinity=(261 +/- 7)meV was measured, which indicates that this signature parametrizes the exponential increase in hole-capture cross-section. The high E_infinity value rules out all candidate defects except for EL2, by comparison with hole-capture cross-section data previously measured by others using deep-level transient spectroscopy. / Thesis / Doctor of Philosophy (PhD)

Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.

Enhancing performance of power electronics converters has always been an interesting topic in the power electronics community. Over the years, researchers and engineers are developing new high performance component, novel converter topologies, smart control methods and optimal design procedures to improve the efficiency, power density, reliability and reducing the cost. Besides pursuing high performance, researchers and engineers are striving to modularize the power electronics converters, which provides redundancy, flexibility and standardization to the end users. The trend of modularization has been seen in photovoltaic inverters, telecommunication power supplies, and recently, HVDC applications. A systematic optimal design approach for modular power converters is developed in this dissertation. The converters are developed for aerospace applications where there are stringent requirement on converter form factor, loss dissipation, thermal management and electromagnetic interference (EMI) performance. This work proposed an optimal design approach to maximize the nominal power of the power converters considering all the constraints, which fully reveals the power processing potential. Specifically, this work studied three-phase active front-end converter, three-phase isolated ac/dc converter and inverter. The key models (with special attention paid to semiconductor switching loss model), detailed design procedures and key design considerations are elaborated. With the proposed design framework, influence of key design variables, e.g. converter topology, switching frequency, etc. is thoroughly studied. Besides optimal design procedure, control issues in paralleling modular converters are discussed. A master-slave control architecture is used. The slave controllers not only follow the command broadcasted by the master controller, but also synchronize the high frequency clock to the master controller. The control architecture eliminates the communication between the slave controllers but keeps paralleled modules well synchronized, enabling a fully modularized design. Furthermore, the implementation issues of modularity are discussed. Although modularizing converters under form factor constraints adds flexibility to the system, it limits the design space by forbidding oversized components. This work studies the influence of the form factor by exploring the maximal nominal power of a double-sized converter module and comparing it with that of two paralleled modules. The tradeoff between modularity and performance is revealed by this study. Another implementation issue is related to EMI. Scaling up system capacity by paralleling converter modules induces EMI issues in both signal level and system level. This work investigates the mechanisms and provides solutions to the EMI problems. / Ph. D. / As penetration of power electronics technologies in electric power delivery keeps increasing, performance of power electronics converters becomes a key factor in energy delivery efficacy and sustainability. Enhancing performance of power electronics converters reduces footprint, energy waste and delivery cost, and ultimately, promoting a sustainable energy use. Over the years, researchers and engineers are developing new technologies, including high performance component, novel converter topologies, smart control methods and optimal design procedures to improve the efficiency, power density, reliability and reducing the cost of power electronics converters. Besides pursuing high performance, researchers and engineers are striving to modularize the power electronics converters, enabling power electronics converters to be used in a “plug-and-play” fashion. Modularization provides redundancy, flexibility and standardization to the end users. The trend of modularization has been seen in applications that process electric power from several Watts to Megawatts. This dissertation discusses the design framework for incorporating modularization into existing converter design procedure, synergically achieving performance optimization and modularity. A systematic optimal design approach for modular power converters is developed in this dissertation. The converters are developed for aerospace applications where there is stringent v requirement on converter dimensions, loss dissipation, and thermal management. Besides, to ensure stable operation of the onboard power system, filters comprising of inductors and capacitors are necessary to reduce the electromagnetic interference (EMI). Owning to the considerable weight and size of the inductors and capacitors, filter design is one of the key component in converter design. This work proposed an optimal design approach that synergically optimizes performance and promotes modularity while complying with the entire aerospace requirement. Specifically, this work studied three-phase active front-end converter, three-phase isolated ac/dc converter and three-phase inverter. The key models, detailed design procedures and key design considerations are elaborated. Experimental results validate the design framework and key models, and demonstrates cutting-edge converter performance. To enable a fully modularized design, control of modular converters, with focus on synchronizing the modular converters, is discussed. This work proposed a communication structure that minimizes communication resources and achieves seamless synchronization among multiple modular converters that operate in parallel. The communication scheme is demonstrated by experiments. Besides, the implementation issues of modularity are discussed. Although modularizing converters under form factor constraints adds flexibility to the system, it limits the design space by forbidding oversized components. This work studies the impact of modularity by comparing performance of a double-sized converter module with two paralleled modules. The tradeoff between modularity and performance is revealed by this study.