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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
71

Investigation of Existing Release Policies and Development of a Few Efficient Release Policies for Wafer Fabrication System - A Simulation Approach

Singh, Rashmi January 2016 (has links) (PDF)
Since 1970s, ever growing attention has been devoted by worldwide researchers and practitioners to the investigation of job release control. However, the need for control of flow of job/wafer into the wafer fabrication system is identified in the late 1988s. Subsequently, many release policies are developed and presented in the literature for improving its performance with respect to cycle time and throughput. Even though it is pointed out in the literature that there is a need for the development and analysis of policy that control the flow of job/wafer through the manufacturing process, still there is no exhaustive study in view of the previously developed release policies in the literature. Moreover, many new opportunities have evolved in the field of release policy in wafer fabrication industry due to the advancement in technology and computer science. It implies that near real-time decision making for efficient release policy is possible based on the global factory state. However, it appears from the literature that still to date the release policies, which are employed in real wafer fabrication system, are usually based on the static information. Release control/policy is emerging as an important research topic in the wafer fabrication industry given the extremely large capital investment and sales revenue of this industry. Release policy also hold practical significance for manufacturing managers, since neglecting it can lead to wide variations in shop workloads, can cause excessive backlogs, accomplishment of orders will be either too early or too late and there can be frequent need for expediting. All the challenges associated with the performance of the wafer fabrication system discussed here and the puzzle around the release policies and its impact on the wafer fabrication process, this research attempts to investigate existing release policies and proposing a few efficient release policies based on the knowledge gained from the existing release policies strength and weakness. Based on the insights gained from the existing release policies, three new closed loop release policies constant workload (CONSTWL), constant batch machine workload (CONSTBWL) and layer wise control (LWC) are developed by considering the parameters: workload in general, workload in batch machine, and re-entrant characteristics of the wafer fabrication system respectively. The conceptual significance in favour of these proposed closed loop release policies in improving performance of the wafer fabrication system is also outlined in this study. In the literature, few researchers clearly indicate that dispatching rule(s) influence the performance of wafer fabrication system either independently or in integration with release policies. Therefore, to empirically validate this fact, release policy is integrated with dispatching rule particularly applying on bottleneck (discrete processing machine) work station in this study. With these, the aims of proposed release policies are to efficiently improve the system performances in terms of average cycle time, standard deviation of cycle time and throughput. Accordingly, a simulation model is proposed and developed using Arena software for evaluating the performance of release policies in integration with dispatching rule applied on bottleneck work station in wafer fabrication environment. Further, to set the values of parameters in the simulation model, the cause and effect analysis is explored in this study by considering eight critical parameters or factors of the simulated wafer fabrication environment. It includes arrival rate, arrival distribution, processing time, maintenance schedule, operator’s schedule, batch size, dispatching rule and release policy. Simulation based cause and effect analysis not only helps in setting up the values of parameters in the proposed simulation model, but it also helps in strengthening the face validity of the developed simulation model. The verification and validation of the developed simulation model, which is a vital and fundamental aspect of simulation is discussed in detail in this study. Based on the analysis and the results observed from the cause and effect analysis, some modifications are incorporated and subsequently, the parameters values are set in the proposed simulation model for evaluating the performance of release policies integrating with dispatching rules. A series of simulation experiments are conducted using the proposed simulation model with systems conditions such as product mix, complexity of the process, level of machine unreliability, and system congestion level to study the relative effects of each of 18 release policies (one open loop release policy, 14 existing closed loop release policies, and 3 proposed release policies) in integration with dispatching rules (FIFO, LIFO and SRPT), considered in this study, at various throughput levels in the wafer fabrication environment. Particularly, the relative effect of integrating release policies and the dispatching rules are observed and analysed in terms of (a) the effect of dispatching rule on release policy, and (b) the effects of release policies on dispatching rules. It is observed from the overall inferences that dispatching rule: SRPT outperformed both FIFO and LIFO dispatching rule for all the considered release policies, except for the release policy: ‘TOTAL_CT’. Additionally, it is observed that for each of the eighteen release policies integrated with considered, the dispatching rule: SRPT produces less WIP inventory at the bottleneck work station for all throughput levels. The maximum deviation in delay (cycle time) is produced by dispatching rule: LIFO in all the release policies considered except for the release policy: ‘TOTAL_CT’ in which dispatching rule: SRPT produces maximum deviation in delay. Moreover, it is observed that the difference in mean delay with all three dispatching rules (FIFO, LIFO and SRPT) increases with the increase in throughput levels. Furthermore, it is observed that the throughput rate under all release policies (except ‘TOTAL_CT’) is more for dispatching rule: SRPT in comparison with both dispatching rules: FIFO and LIFO for nearly the same threshold values. The experimental results showed that proposed release policy: LWC reliably improves the system performance followed by the proposed release policy: CONSTWL and CONSTBWL with respect to both mean delay and standard deviation for corresponding throughput levels in wafer fabrication system. The characteristics of the proposed release policy: LWC are summarized and the same is presented as follows because this is proven to be best release policy among all the release policies considered in the proposed simulation model. The proposed release policy: LWC is a new measure of the work quantity on the shop floor system, which takes into account the location of jobs/wafers along the production line by employing re-entrant property of wafer fabrication system. As a result, it offers quick response to the stochastic events of the manufacturing system and can compensated the system disturbances in time. The proposed release policy: LWC offers more efficient control of flow of job/wafer in the wafer fabrication system with reduced delay (cycle time) and the standard deviation of delay (cycle time) for a given throughput level in comparison with almost all the release policies considered in this study in integration with all three dispatching rules considered and applied on bottleneck work station. For instance, from the analysis of simulation model, the proposed release policy: LWC reduces the average delay up to 98%, 95%, 90%, 89%, 49%, 35%, 21%, 17%, 13%, 12%, 10%, 9%, 9%, 9%, 6% and 4%, and reduces the standard deviation of delay up to 96%, 98%, 94%, 93%, 34%, 22%, 4%, 13%, 11%, 6%, 9%, 14%, 4%, 4%, 10% and 7% for a given throughput level, respectively in relation to other release polices: FRCP, EWIP, TOTAL_CT, PWR, EWC, DRCP, CONLOAD, WIPLCtrl, Droll, DEC, CONWIP, SA, RCONWIP, WR, CONSTBWL and CONSTWL respectively in integration with dispatching rule: SRPT. These improvements can also be understood from another aspect, that is, LWC can increase the system throughput rate for a given cycle time. The improvement is statistically significant according to the two sample t-test for all throughput values with a 95% confidence level. As the improvement of the proposed release policy: LWC is relatively less on the proposed release policies: CONSTWL and CONSTBWL with respect to mean delay, it can be inferred that the performance of CONSTWL and CONSTBWL is relatively better than other existing closed loop release policies for the scenarios considered in the simulation model. However, the best release policy: LWC provides satisfactory performance in comparison with other release policies for almost all scenarios considered in the simulation model. It is important to note that these proposed release policies can be easily applied in real wafer manufacturing systems because it possesses a simple logic and only the reference level need to be prescribed. The performance of four existing closed release policies that are FRCP, EWIP, TOTAL_CT and PWR are relatively worst in comparison with open loop release policy CONST. This is contradicting to the conclusions given in the literature by many authors that closed loop release policies are always better than open loop release policy with respect to cycle time and throughput measures. In fact, a reasonable closed loop release policy can provide better results than open loop release policy, if its objective and the release parameter are designed carefully, so that the release parameter can respond effectively to the dynamics of the manufacturing system. The reason for worst performance of these four existing closed loop release policies in comparison with open loop release policy and other existing policies is described in detail in this study. In order to see the impact of dispatching rules on a particular work station, batch machine work station, which usually has highest processing time in fabrication process, is considered in this study. The entire simulation experiments are replicated in the same manner except the basis that dispatching rules are applied on batch machine work station instead of bottleneck work station. Based on the analysis of the simulation results, the important observations are as follow: It is observed from the overall inferences that the influence of dispatching rules when applied to batch processing machine (diffusion) work station was not much on individual release policies, since the performance of all three dispatching rules provides nearly same performance at higher throughput level in the proposed simulation model. However, the performances of dispatching rule: SRPT in integration with all release policies considered in this study are summarized here because it produces less mean delay at most of the throughput values. In addition, from the analysis of simulation model, the proposed release policy: LWC reduces the average delay up to 97%, 93%, 87%, 85%, 22%, 17%, 15%, 15%, 13%, 11%, 10%, 10%, 9%, 6%, 6% and 2%, and reduces the standard deviation of delay up to 96%, 97%, 92%, 93%, 21%, 5%, 10%, 2%, 16%, 7%, 14%, 4%, 20%, 10%, 10% and 11% for a given throughput level, respectively in relation to FRCP, EWIP, PWR, TOTAL_CT, EWC, DEC, Droll, CONLOAD, SA, RCONWIP, WIPLCtrl, WR, DRCP, CONWIP, CONSTWL and CONSTBWL in integration with dispatching rule: SRPT, when applied on batch processing machine work station. The improvement is statistically significant according to the two sample t-test for most of the throughput values with a 95% confidence level. It is observed from overall inferences that the performance of all the release policies, considered in this study, in integration with dispatching rule: SRPT is better with respect to both mean delay and standard deviation of delay, when the dispatching rule is applied on the bottleneck (discrete machine, lithography) work station in the proposed simulation model. The performance of most of the release policies, considered in this study, in integration with dispatching rule: LIFO is better with respect to standard deviation of delay, when the dispatching rule is applied on the batch (batch machine, diffusion) work station. These results indicate that there is an influence of dispatching rule on the performance of wafer fabrication system if applied on batch machine work station or on bottleneck work station in integration with release policies. In addition, the effects of dispatching rules are highly dependent upon both the type of release policy used and the work station on which it is applied. Overall, the performance of the proposed release policies is proven to be very effective to system variability’s in scenarios considered in the simulation model. The significant impact of the choice of release policies on wafer manufacturing system performance is justified by the simulation experiments. It can be safely concluded that the efficient closed loop release policies that utilizes system information carefully based on the global factory state data can significantly improve the performance of wafer fabrication system. This thesis provides an extensive literature review covering several aspects of wafer fabrication process. Thereafter, a three new efficient closed loop release policies are developed and their workability are conceptually demonstrated with a framework and a flow diagram. The strength and the weakness of the existing release policies are conceptually highlighted and later it is proven to be true through comprehensive simulation study. A simulation model is developed by considering all the real-life fabrication environment for evaluating the performance of release policies in integration with dispatching rules. Cause and effect analysis is explored in proposed simulation model to set the parameters value. A series of simulation experiments are also constructed to empirically justify the conceptual significance of the proposed release policies.
72

Simulation and Analysis of Analog Circuit and PCM (Process Control Monitor) Test Structures in Circuit Design

Sobe, Udo, Rooch, Karl-Heinz, Mörtl, Dietmar 08 June 2007 (has links)
PCM test structures are commonly used to check the produced wafers from the standpoint of the technologist. In general these structures are managed inside the FAB and are focused on standard device properties. Hence their development and analysis is not driven by analog circuit blocks, which are sensitive or often used. Especially for DFM/Y of analog circuits the correlation between design and technology has to be defined. The knowledge of electrical behavior of test structures helps to improve the designer's sensitivity to technological questions. This paper presents a method to bring the PCM methodology into the analog circuit design to improve design performance, yield estimation and technology correlation. We show how both analog circuit and PCM blocks can be simulated and analyzed in the design phase.
73

Contribución de la Red Chilena de Fab Labs al ecosistema de innovación local para alcanzar el desarrollo sostenible.

Valenzuela Zubiaur, Macarena del Pilar 30 May 2022 (has links)
[ES] El presente estudio pretende establecer la importancia de la colaboración como un elemento integral para el desarrollo de la Red Chilena de Fab Labs y su vinculación con el ecosistema de innovación local. Esta noción se apoya en un marco teórico que valida la colaboración como un elemento clave al interior de la innovación abierta y su implementación en los espacios de innovación, en este caso específico, los Fab Labs. Junto con ello, surge el concepto de Cosmo-localismo, como un modelo integrador de la colaboración y la innovación, que busca el bienestar de los territorios y sus comunidades. Este se fundamenta en la cultura maker, la cual vincula el diseño abierto con las tecnologías de fabricación digital, para la generación de un nuevo conocimiento, siendo estos distribuidos globalmente. Es aquí donde los Fab Labs juegan un rol fundamental como espacios de articulación, buscando empoderar a sus comunidades mediante el acceso a herramientas, para generar un impacto positivo en lo social, económico y medioambiental. A partir de la importancia de vincular el entorno dentro de la innovación, surge la Quíntuple hélice como un elemento integrador en el proceso de innovación actual, reforzando la importancia del concepto de desarrollo sostenible. Bajo una investigación de enfoque mixto, se analizan los Fab Labs en Chile, caracterizándolos según su ubicación, modelo de trabajo, temáticas y disciplinas. A modo de identificar la vinculación de estos laboratorios con el ecosistema de innovación, se analiza el contexto chileno según el Modelo TE-SER, el cual establece sus características basadas en los roles de cada actor. De la misma forma, se establece para la Red Chilena de Fab Labs y los laboratorios que la componen. Como resultado de esta investigación se propone el diseño de un modelo de colaboración para el desarrollo de la Red Chilena de Fab Labs que promueva su vinculación con el ecosistema de innovación local para alcanzar el desarrollo sostenible de sus territorios, apoyándose en los principios del diseño abierto y la cultura maker. Los hallazgos identificados se basan en la importancia del ODS 17, "Alianza para cumplir todos los objetivos", al interior de la comunidad Fab Lab. Y también en el perfilamiento de los Fab Labs chilenos, el cual puede delinear los roles y actividades de los laboratorios al interior de la red y del ecosistema de innovación local. Además, a partir del modelo propuesto, se identifican actores claves para articular instancias de colaboración de forma eficiente, lo que desarrolla una estrategia de implementación basada en el Cosmo-localismo, promoviendo la Quíntuple hélice. / [CA] Aquest estudi pretén establir la importància de la col·laboració com un element integral per al desenvolupament de la Xarxa Xilena de Fab Labs i la vinculació amb l'ecosistema d'innovació local. Aquesta noció es recolza en un marc teòric que valida la col·laboració com un element clau a l'interior de la innovació oberta i la seva implementació als espais d'innovació, en aquest cas específic, els Fab Labs. Juntament amb això, sorgeix el concepte de Cosmo- localisme, com un model integrador de la col·laboració i la innovació, que cerca el benestar dels territoris i les seves comunitats. Aquest es fonamenta en la cultura maker, la qual vincula el disseny obert amb les tecnologies de fabricació digital, per a la generació d'un nou coneixement, i aquests es distribueixen globalment. És aquí on els Fab Labs juguen un rol fonamental com a espais d'articulació, buscant empoderar les seves comunitats mitjançant l'accés a eines, per generar un impacte positiu en allò social, econòmic i mediambiental. A partir de la importància de vincular l'entorn dins de la innovació, la Quíntuple hèlix sorgeix com un element integrador en el procés d'innovació actual, reforçant la importància del concepte de desenvolupament sostenible. Sota una investigació d'enfocament mixt, s'analitzen els Fab Labs a Xile, caracteritzant-los segons la ubicació, el model de treball, les temàtiques i les disciplines. Per identificar la vinculació d'aquests laboratoris amb l'ecosistema d'innovació, s'analitza el context xilè segons el Model TE-SER, el qual estableix les seves característiques basades en els rols de cada actor. De la mateixa manera, s'estableix per a la Xarxa Xilena de Fab Labs i els laboratoris que la componen. Com a resultat d'aquesta investigació es proposa el disseny d'un model de col·laboració per al desenvolupament de la Xarxa Xilena de Fab Labs que promogui la seva vinculació amb l'ecosistema d'innovació local per assolir el desenvolupament sostenible dels territoris, recolzant-se en els principis del disseny obert i la cultura maker. Les troballes identificades es basen en la importància de l'ODS 17, "Aliança per complir tots els objectius", a l'interior de la comunitat Fab Lab. I també en el perfilament dels Fab Labs xilens, el qual pot delinear els rols i activitats dels laboratoris dins de la xarxa i de l'ecosistema d'innovació local. A més, a partir del model proposat, s'identifiquen actors claus per articular instàncies de col·laboració de forma eficient, cosa que desenvolupa una estratègia d'implementació basada en el Cosmo-localisme, promovent la Quíntuple hèlix. / [EN] This study aims to establish the importance of collaboration as an integral element for the development of the Chilean Network of Fab Labs and its link with the local innovation ecosystem. This notion is supported by a theoretical framework that validates collaboration as a key element within open innovation and its implementation in innovation spaces, in this specific case, the Fab Labs. Along with this, the concept of Cosmo- localism, as an integrating model of collaboration and innovation, which seeks the well-being of the territories and their communities. This is based on the maker culture, which links open design with digital manufacturing technologies, for the generation of new knowledge, which is distributed globally. This is where the Fab Labs play a fundamental role as spaces for articulation, seeking to empower their communities through access to tools, to generate a positive social, economic and environmental impact. Based on the importance of linking the environment within innovation, the Quintuple Helix emerges as an integrating element in the current innovation process, reinforcing the importance of the concept of sustainable development. Under a mixed approach research, the Fab Labs in Chile are analyzed, characterizing them according to their location, work model, themes and disciplines. In order to identify the link between these laboratories and the innovation ecosystem, the Chilean context is analyzed according to the TE-SER Model, which establishes its characteristics based on the roles of each actor. In the same way, it is established for the Chilean Network of Fab Labs and the laboratories that comprise it. As a result of this research, the design of a collaborative model is proposed for the development of the Chilean Network of Fab Labs that promotes its link with the local innovation ecosystem to achieve the sustainable development of its territories, based on the principles of open design. and the maker culture. The identified findings are based on the importance of SDG 17, "Alliance to meet all objectives", within the Fab Lab community. And also, on the profiling of Chilean Fab Labs, which can outline the roles and activities of the Fab Labs. laboratories within the network and the local innovation ecosystem. In addition, based on the proposed model, key actors are identified to efficiently articulate instances of collaboration, which develops an implementation strategy based on Cosmo-localism, promoting the Fivefold Helix. / Valenzuela Zubiaur, MDP. (2022). Contribución de la Red Chilena de Fab Labs al ecosistema de innovación local para alcanzar el desarrollo sostenible [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/183278 / TESIS
74

半導體晶圓廠投資策略與預測

莊坤榮 Unknown Date (has links)
在全球持續電子化的過程中,台灣一路扮演著落實有效製造與實現設計的推手,無論從主機板、被動元件、面板、晶片設計、晶圓製造以及封裝甚至高精密組裝無所不包,在如此資本密集產業,如何操作才能達到供需平衡,為整體產業經濟創造出良性的競爭平台,避免惡性競爭,就成了不可輕忽的課題。 本文以晶圓產業為探討對象。全球產能平均利用率多年來總維持於中檔 (88%), 且平均銷售單價只能緩降而無強勢反彈,近年企業無不減少資本支出來度過低潮,整合元件製造廠(IDM)相繼喊出工廠資產輕化(fab-lite)的營運策略,這時我們的命題即是:要不要繼續投資?如何調整價值鏈? 本研究中,我們會先檢視目前市場對半導體成長預測的準確度,再經由產業價值活動代表性指標回歸分析法對相關參數做一整合之解析,對晶圓需求量與銷售價建立配適之模型,找出先行指標來達到預測,並定義上下限以供快速比對分析,最後再根據分析結果提出可能之產業趨勢議題。 / This thesis analyzes the semiconductor industry growth worldwide. The leading index via regressions has been established to achieve a reliable forecast on worldwide ASP, wafer demand and revenue. In the long run, we expect the semiconductor demand will continue to grow at CAGR 8% (compound annual growth rate) and display less extreme cycles than past decade. However, revenue’s CAGR might be diluted to around 5%, lower than demand’s growth. Moreover, it might go down to zero-growth for some times since the ASP still slightly trend down before emerging market demand really expanded. Continuous outsourcing is one possible solution for IDM to be fab-lite, since fab’s fix charge is billion- base that needs high utilization to maintain break-even operation. But what is the solution for foundry side to avoid ASP erosion all the way down? Our analysis identifies a need for executive managers to well predict the demand on capital expenditure when making decision.
75

Leseverstehen als Ausgangspunkt für die Entwicklung der Ausdrucks- und Schreibfertigkeiten / Reading comprehension as a starting point for the development of expression and writing abilities

Zatsepina, Nataliya 23 January 2009 (has links)
No description available.
76

Kognitive Determinanten unterschiedlicher Rechenleistungen in der Primarstufe: Arbeitsgedächtnismerkmale und Aufmerksamkeitsaspekte / Cognitive determinants of arithmetic performance in elementary school: The role of working memory and visual selective attention

Roick, Thorsten 04 July 2006 (has links)
No description available.
77

台灣半導體智慧工廠系統整合創新平台之研究 / The Study of Taiwan Semiconductor Intelligent Manufacturing IT System Innovation

盧元慶 Unknown Date (has links)
論文摘要 台灣半導體產業協會(2005)對台灣主要IC公司營運狀況所做的調查統計結果所發表「台灣半導體產業對國家的貢獻」研究報告顯示:IC產業無論在產值、營運附加價值、創匯收入、投資、政府投資獲利、所帶動的週邊效益…等,都有穩定到持續成長之表現,為台灣深具競爭力之產業。在先進半導體製造技術進步之下,「智慧工廠自動化」技術成為半導體製造廠商的核心能力的重要部分。根據資策會市場情報中心的1998年分析研究,「智慧工廠自動化」系統技術創新屬於「系統整合」類型的軟體創新。 本研究主要採用文獻探討以及個案訪談作為主要的研究方法,先藉由文獻探討建立起論文整體之架構以及相關理論之說明定義所需探討之研究變項,之後再透過台灣半導體製造標竿企業的六個系統整合專案訪談加以實證。本研究以研究「系統整合專案類型」、「技術知識特質」、與「組織架構特質」對「系統整合創新平台」的關聯,來探討台灣半導體智慧工廠系統整合軟體開發的管理作為,說明所觀察現象的具體意義,以及背後的思考邏輯。而可得到以下初步之研究結論: 一、系統整合專案類型與技術知識特質 1.不同的系統整合專案類型,有不同的技術知識特質。製程發展攸關類型專案,技術知識的多元性較高。資訊系統改造類型專案,技術知識的內隱性較低、多元性較低、標準化程度較高、路徑相依程度較高。 2.製程發展攸關專案在不同階段可能因應技術開發標的不同,會有不同的技術知識特質。早期發展階段將現有的作業流程「自動化」,所以技術知識內隱性為較低。在後期發展階段以採用新技術使系統「智慧化」,所以技術知識內隱性為較高。 二、技術知識特質與系統整合的創新平台 3.系統整合專案的技術知識的內隱程度差異,使外部知識的來源有所差異。系統整合專案的技術知識的內隱程度愈低,外部知識的來源愈傾向專業廠商。系統整合專案的技術知識的內隱程度愈高,外部知識的來源愈傾向大學等研究機構。 4.系統整合專案的技術知識的多元程度愈高,使用者參與程度愈傾向「共同開發」。多元程度愈低,使用者參與程度愈傾向「交付模式或是隔牆交易」。 三、組織結構特質與系統整合的創新平台 5.台灣半導體製造業隨著組織正式化的程度提高,傾向將跨部門的整合溝通活動,予以正式的組織化。這些組織的成員也是來自各個知識領域。 6.在台灣半導體製造企業內的正式組織與臨時性的專案組織之間,選擇「虛擬組織」結構以吸收、創造、積蓄、與擴散重要的跨部門技術知識。 四、其他發現 7.整合跨部門知識領域來創造出新的知識,進而由新知識來創造出新的軟體系統。 8.製程發展攸關類型系統整合專案之技術知識內隱程度愈低,使用者需求定義書對於專案的成功就愈重要。反之,技術知識內隱程度愈高,使用者需求定義書對於專案的成功就愈不相關。 關鍵字:半導體製造、系統整合、智慧工廠自動化、技術知識特質、組織結構特質、創新平台 / Taiwan Semiconductor Industry Association (2005) delivered a report “The national contribution of Taiwan semiconductor industry”, which claimed that IC industry is very critical to Taiwan economic growth and a very competitive industry in the world. In 2004, Taiwan was the first in IC foundry industry with more than 70% market share, the second large cluster of IC design houses with market share 28.2%, and the third in the DRAM industry in the word. In recent years, “Intelligent Fab Automation” technology has become the crucial component of the core competence of nanotechnology IC manufacturing. Based on the software classification of 1998 Institute for Information Industry, “Intelligent fab automation” is one kind of “System Integration” computer software innovation. It includes the advanced Manufacturing Execution System (MES), Advanced Process Control (APC), Advanced Material Handling System (AMHS), equipment automation systems, Engineering Data Analysis (EDA), and etc. “Intelligent fab automation” builds up the proprietary manufacturing capability. This thesis attempts to take an exploratory study of the relationship between characteristics of system integration project, characteristics of technological knowledge, characteristics of organization structure, and innovation platform on the benchmark semiconductor company in Taiwan. This thesis adopts reference and case study as the main research approach. It sets up the thesis whole structure by reference and relevant theories to define the factors. Afterward, to demonstrate the thesis structure by interview six system integration software projects of that company. There are primary figures found in the thesis: 1.The relationship between characteristics of system integration projects and characteristics of technological knowledge a)Different kinds of system integration projects have different characteristics of technological knowledge. The manufacturing-process relevant system development projects associate with high degree of technology diversity. The IT system reengineering projects associate with low degree of technology diversity and manufacturing technology advance. b)The manufacturing-process relevant system development project consists of different development stages that have different technology development targets. In the early stage, the development target is procedure automation with codified technology knowledge. In the later stage, it turns to intelligent system with tacit technology knowledge. 2.The relationship between characteristics of technological knowledge and innovation platform a)Different kinds of system integration projects have different types of project organizations. The IT system reengineering projects tend to adopt the “Function Team” to operate, but the manufacturing-process relevant projects tend to adopt a team type between the “Heavyweight Team” and the “Lightweight Team”. b)The IT system reengineering projects are not different from the manufacturing-process relevant projects in their joint problem resolution ways. They both tend to adopt “Experiments and Prototypes”. Projects with higher degree of tacit technology knowledge tend more to adopt prototypes and experiments to resolve problems jointly. c)System integration project with codified technology knowledge tend to collaborate with professional software house. However, those projects with tacit technology knowledge tend to collaborate with research institutes, such as university labs. d)Projects with higher technology diversity require more the end-user management and IT management to conduct the project vision together, and project team will consists of more different kinds of skills. Project manager tends to hire a manager with T-type or A-type management skills. e)Degree of technology diversity determines degree of user engagement in development. Projects with high degree of technology diversity tend to engage user in the joint development mode. Projects with low degree of technology diversity tend to engage user in the “Offering Mode”. f)All project teams tend to share knowledge internally through the “project meeting” regularly. g)If there is no sound industry standard, Taiwan semiconductor manufacturing company tends to define its own internal standard in order to reduce development cost. 3.The relationship between characteristics of organization structure and innovation platform a)High degree of organization formalization associates with the effort to formalize the communication and coordination activities across organizations. b)High-Tech manufacturing company tends to establish the virtualized organization before a formalized organization to absorb, create, accumulate, and diffuse cross-function technology knowledge. c)High degree of organization formalization associates with “structural” intenal knowledge sharing sessions. 4.Others a)New technology knowledge development leads to new system development. b)URD (User Requirement Definition) document becomes less important for the new system development projects, which associate with tacit technology knowledge. So does for project success. There are primary recommendations for managers in the relevant high-tech manufacturing industries: a)Understand that characteristics of technology determine technology innovation behaviors. b)Develop the manufacturing-process relevant technogies in the step-by-step approach - “procedure standardization”, “procedure automation”, and “intelligent system”. c)Encourage prototyping and experiements. d)Practively develop leaders with diversed skills. e)Follow or build the internal technology standards. f)Establish the dedicated organization to absorb, create, accumulate, and diffuse cross-function technology knowledge. g)Choose the software development model carefully. Keywords: semiconductor manufacturing, system integration, intelligent fab automation, characteristics of technological knowledge, characteristics of organization structure, innovation platform
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Kognitive Kontrolle bei Aufmerksamkeits Defizit / Hyperaktivitäts Störung / Cognitive Control in Attention Deficit / Hyperactivity Disorder

Albrecht, Björn 23 October 2009 (has links)
No description available.
79

Low Intensity Transcranial Electrical Stimulation: Effects on Categorization and Methodological Aspects / Transkranielle Stromstimulation mit geringen Intensitäten: Die Effekte auf Kategorisierungsleistung und methodische Aspekte

Ambrus, Géza Gergely 21 May 2012 (has links)
No description available.
80

The role of human medial frontal cortex in cognition investigated by functional magnetic resonance imaging. / Die Rolle des menschlichen medialen frontalen Kortex in der Kognition untersucht mit Hilfe der funktionellen Magnetresonanztomographie.

Lütcke, Henry 19 October 2007 (has links)
No description available.

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